1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s 3 4--- 5name: test_fcanonicalize 6tracksRegLiveness: true 7legalized: true 8body: | 9 bb.0: 10 liveins: $vgpr0 11 12 ; CHECK-LABEL: name: test_fcanonicalize 13 ; CHECK: liveins: $vgpr0 14 ; CHECK-NEXT: {{ $}} 15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 16 ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] 17 ; CHECK-NEXT: $vgpr0 = COPY [[FCANONICALIZE]](s32) 18 %0:_(s32) = COPY $vgpr0 19 %1:_(s32) = G_FCANONICALIZE %0 20 %2:_(s32) = G_FCANONICALIZE %1 21 $vgpr0 = COPY %2(s32) 22... 23 24--- 25name: test_fconstant 26tracksRegLiveness: true 27legalized: true 28body: | 29 bb.0: 30 31 ; CHECK-LABEL: name: test_fconstant 32 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+10 33 ; CHECK-NEXT: $vgpr0 = COPY [[C]](s32) 34 %0:_(s32) = G_FCONSTANT float 1.0e10 35 %1:_(s32) = G_FCANONICALIZE %0 36 $vgpr0 = COPY %1(s32) 37... 38 39# FIXME: Mode fields are redundant and not considered. 40--- 41name: test_denormal_fconstant 42tracksRegLiveness: true 43legalized: true 44machineFunctionInfo: 45 mode: 46 fp64-fp16-output-denormals: false 47 fp64-fp16-input-denormals: false 48body: | 49 bb.0: 50 51 ; CHECK-LABEL: name: test_denormal_fconstant 52 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.618950e-319 53 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[C]](s64) 54 %0:_(s64) = G_FCONSTANT double 0x0000000000008000 55 %1:_(s64) = G_FCANONICALIZE %0 56 $vgpr0_vgpr1 = COPY %1(s64) 57... 58 59--- 60name: test_fminnum_with_fminnum_argument_s32_ieee_mode_on 61tracksRegLiveness: true 62legalized: true 63machineFunctionInfo: 64 mode: 65 ieee: true 66body: | 67 bb.0: 68 liveins: $vgpr0, $vgpr1, $vgpr2 69 70 ; CHECK-LABEL: name: test_fminnum_with_fminnum_argument_s32_ieee_mode_on 71 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 72 ; CHECK-NEXT: {{ $}} 73 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 74 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 75 ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] 76 ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] 77 ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] 78 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 79 ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]] 80 ; CHECK-NEXT: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FMINNUM_IEEE]], [[FCANONICALIZE2]] 81 ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE1]](s32) 82 %0:_(s32) = COPY $vgpr0 83 %1:_(s32) = COPY $vgpr1 84 %7:_(s32) = G_FCANONICALIZE %0 85 %8:_(s32) = G_FCANONICALIZE %1 86 %2:_(s32) = G_FMINNUM_IEEE %7, %8 87 %3:_(s32) = COPY $vgpr2 88 %5:_(s32) = G_FCANONICALIZE %2 89 %6:_(s32) = G_FCANONICALIZE %3 90 %4:_(s32) = G_FMINNUM_IEEE %5, %6 91 $vgpr0 = COPY %4(s32) 92... 93 94--- 95name: test_fminnum_with_fmaxnum_argument_s32_ieee_mode_on 96tracksRegLiveness: true 97legalized: true 98machineFunctionInfo: 99 mode: 100 ieee: true 101body: | 102 bb.0: 103 liveins: $vgpr0, $vgpr1, $vgpr2 104 105 ; CHECK-LABEL: name: test_fminnum_with_fmaxnum_argument_s32_ieee_mode_on 106 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 107 ; CHECK-NEXT: {{ $}} 108 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 109 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 110 ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] 111 ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] 112 ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] 113 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 114 ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]] 115 ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], [[FCANONICALIZE2]] 116 ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](s32) 117 %0:_(s32) = COPY $vgpr0 118 %1:_(s32) = COPY $vgpr1 119 %7:_(s32) = G_FCANONICALIZE %0 120 %8:_(s32) = G_FCANONICALIZE %1 121 %2:_(s32) = G_FMAXNUM_IEEE %7, %8 122 %3:_(s32) = COPY $vgpr2 123 %5:_(s32) = G_FCANONICALIZE %2 124 %6:_(s32) = G_FCANONICALIZE %3 125 %4:_(s32) = G_FMINNUM_IEEE %5, %6 126 $vgpr0 = COPY %4(s32) 127... 128 129--- 130name: test_fmaxnum_with_fmaxnum_argument_s32_ieee_mode_on 131tracksRegLiveness: true 132legalized: true 133machineFunctionInfo: 134 mode: 135 ieee: true 136body: | 137 bb.0: 138 liveins: $vgpr0, $vgpr1, $vgpr2 139 140 ; CHECK-LABEL: name: test_fmaxnum_with_fmaxnum_argument_s32_ieee_mode_on 141 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 142 ; CHECK-NEXT: {{ $}} 143 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 144 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 145 ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] 146 ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] 147 ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] 148 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 149 ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]] 150 ; CHECK-NEXT: [[FMAXNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMAXNUM_IEEE]], [[FCANONICALIZE2]] 151 ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE1]](s32) 152 %0:_(s32) = COPY $vgpr0 153 %1:_(s32) = COPY $vgpr1 154 %7:_(s32) = G_FCANONICALIZE %0 155 %8:_(s32) = G_FCANONICALIZE %1 156 %2:_(s32) = G_FMAXNUM_IEEE %7, %8 157 %3:_(s32) = COPY $vgpr2 158 %5:_(s32) = G_FCANONICALIZE %2 159 %6:_(s32) = G_FCANONICALIZE %3 160 %4:_(s32) = G_FMAXNUM_IEEE %5, %6 161 $vgpr0 = COPY %4(s32) 162... 163 164--- 165name: test_fmaxnum_with_fminnum_argument_s32_ieee_mode_on 166tracksRegLiveness: true 167legalized: true 168machineFunctionInfo: 169 mode: 170 ieee: true 171body: | 172 bb.0: 173 liveins: $vgpr0, $vgpr1, $vgpr2 174 175 ; CHECK-LABEL: name: test_fmaxnum_with_fminnum_argument_s32_ieee_mode_on 176 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 177 ; CHECK-NEXT: {{ $}} 178 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 179 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 180 ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] 181 ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] 182 ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] 183 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2 184 ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]] 185 ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMINNUM_IEEE]], [[FCANONICALIZE2]] 186 ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE]](s32) 187 %0:_(s32) = COPY $vgpr0 188 %1:_(s32) = COPY $vgpr1 189 %7:_(s32) = G_FCANONICALIZE %0 190 %8:_(s32) = G_FCANONICALIZE %1 191 %2:_(s32) = G_FMINNUM_IEEE %7, %8 192 %3:_(s32) = COPY $vgpr2 193 %5:_(s32) = G_FCANONICALIZE %2 194 %6:_(s32) = G_FCANONICALIZE %3 195 %4:_(s32) = G_FMAXNUM_IEEE %5, %6 196 $vgpr0 = COPY %4(s32) 197... 198 199--- 200name: test_multiple_uses 201tracksRegLiveness: true 202legalized: true 203machineFunctionInfo: 204 mode: 205 ieee: true 206body: | 207 bb.0: 208 liveins: $vgpr0, $vgpr1 209 210 ; CHECK-LABEL: name: test_multiple_uses 211 ; CHECK: liveins: $vgpr0, $vgpr1 212 ; CHECK-NEXT: {{ $}} 213 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 214 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 215 ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]] 216 ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]] 217 ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]] 218 ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMINNUM_IEEE]], [[FMINNUM_IEEE]] 219 ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE]](s32) 220 %0:_(s32) = COPY $vgpr0 221 %1:_(s32) = COPY $vgpr1 222 %6:_(s32) = G_FCANONICALIZE %0 223 %7:_(s32) = G_FCANONICALIZE %1 224 %2:_(s32) = G_FMINNUM_IEEE %6, %7 225 %4:_(s32) = G_FCANONICALIZE %2 226 %5:_(s32) = G_FCANONICALIZE %2 227 %3:_(s32) = G_FMAXNUM_IEEE %4, %5 228 $vgpr0 = COPY %3(s32) 229... 230 231--- 232name: test_splat_padded_with_undef 233tracksRegLiveness: true 234legalized: true 235machineFunctionInfo: 236 mode: 237 ieee: true 238body: | 239 bb.0 : 240 liveins: $vgpr0 241 242 ; CHECK-LABEL: name: test_splat_padded_with_undef 243 ; CHECK: liveins: $vgpr0 244 ; CHECK-NEXT: {{ $}} 245 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 246 ; CHECK-NEXT: %two:_(s16) = G_FCONSTANT half 0xH4000 247 ; CHECK-NEXT: %two_s32:_(s32) = G_ANYEXT %two(s16) 248 ; CHECK-NEXT: %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32) 249 ; CHECK-NEXT: %zero:_(s16) = G_FCONSTANT half 0xH0000 250 ; CHECK-NEXT: %zero_s32:_(s32) = G_ANYEXT %zero(s16) 251 ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF 252 ; CHECK-NEXT: %zero_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %zero_s32(s32), %undef(s32) 253 ; CHECK-NEXT: %one:_(s16) = G_FCONSTANT half 0xH3C00 254 ; CHECK-NEXT: %one_s32:_(s32) = G_ANYEXT %one(s16) 255 ; CHECK-NEXT: %one_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %one_s32(s32), %undef(s32) 256 ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s16>) = G_FMUL [[COPY]], %two_splat 257 ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMAXNUM_IEEE [[FMUL]], %zero_undef 258 ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], %one_undef 259 ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](<2 x s16>) 260 %0:_(<2 x s16>) = COPY $vgpr0 261 %two:_(s16) = G_FCONSTANT half 0xH4000 262 %two_s32:_(s32) = G_ANYEXT %two(s16) 263 %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32) 264 %zero:_(s16) = G_FCONSTANT half 0xH0000 265 %zero_s32:_(s32) = G_ANYEXT %zero(s16) 266 %undef:_(s32) = G_IMPLICIT_DEF 267 %zero_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %zero_s32(s32), %undef(s32) 268 %one:_(s16) = G_FCONSTANT half 0xH3C00 269 %one_s32:_(s32) = G_ANYEXT %one(s16) 270 %one_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %one_s32(s32), %undef(s32) 271 %4:_(<2 x s16>) = G_FMUL %0, %two_splat 272 %zero_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %zero_undef 273 %16:_(<2 x s16>) = G_FCANONICALIZE %4 274 %8:_(<2 x s16>) = G_FMAXNUM_IEEE %zero_undef_fcan, %16 275 %one_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %one_undef 276 %14:_(<2 x s16>) = G_FCANONICALIZE %8 277 %11:_(<2 x s16>) = G_FMINNUM_IEEE %one_undef_fcan, %14 278 $vgpr0 = COPY %11(<2 x s16>) 279... 280 281--- 282name: test_splat_SNaN_and_QNaN_padded_with_undef 283tracksRegLiveness: true 284legalized: true 285machineFunctionInfo: 286 mode: 287 ieee: true 288body: | 289 bb.0 : 290 liveins: $vgpr0 291 292 ; CHECK-LABEL: name: test_splat_SNaN_and_QNaN_padded_with_undef 293 ; CHECK: liveins: $vgpr0 294 ; CHECK-NEXT: {{ $}} 295 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 296 ; CHECK-NEXT: %two:_(s16) = G_FCONSTANT half 0xH4000 297 ; CHECK-NEXT: %two_s32:_(s32) = G_ANYEXT %two(s16) 298 ; CHECK-NEXT: %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32) 299 ; CHECK-NEXT: %snan:_(s16) = G_FCONSTANT half 0xH7C01 300 ; CHECK-NEXT: %snan_s32:_(s32) = G_ANYEXT %snan(s16) 301 ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF 302 ; CHECK-NEXT: %snan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %snan_s32(s32), %undef(s32) 303 ; CHECK-NEXT: %qnan:_(s16) = G_FCONSTANT half 0xH7E01 304 ; CHECK-NEXT: %qnan_s32:_(s32) = G_ANYEXT %qnan(s16) 305 ; CHECK-NEXT: %qnan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %qnan_s32(s32), %undef(s32) 306 ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s16>) = G_FMUL [[COPY]], %two_splat 307 ; CHECK-NEXT: %snan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %snan_undef 308 ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMAXNUM_IEEE %snan_undef_fcan, [[FMUL]] 309 ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], %qnan_undef 310 ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](<2 x s16>) 311 %0:_(<2 x s16>) = COPY $vgpr0 312 %two:_(s16) = G_FCONSTANT half 0xH4000 313 %two_s32:_(s32) = G_ANYEXT %two(s16) 314 %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32) 315 %snan:_(s16) = G_FCONSTANT half 0xH7C01 316 %snan_s32:_(s32) = G_ANYEXT %snan(s16) 317 %undef:_(s32) = G_IMPLICIT_DEF 318 %snan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %snan_s32(s32), %undef(s32) 319 %qnan:_(s16) = G_FCONSTANT half 0xH7E01 320 %qnan_s32:_(s32) = G_ANYEXT %qnan(s16) 321 %qnan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %qnan_s32(s32), %undef(s32) 322 %4:_(<2 x s16>) = G_FMUL %0, %two_splat 323 %snan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %snan_undef 324 %16:_(<2 x s16>) = G_FCANONICALIZE %4 325 %8:_(<2 x s16>) = G_FMAXNUM_IEEE %snan_undef_fcan, %16 326 %qnan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %qnan_undef 327 %14:_(<2 x s16>) = G_FCANONICALIZE %8 328 %11:_(<2 x s16>) = G_FMINNUM_IEEE %qnan_undef_fcan, %14 329 $vgpr0 = COPY %11(<2 x s16>) 330... 331 332--- 333name: test_fcanonicalize_log 334tracksRegLiveness: true 335legalized: true 336body: | 337 bb.0: 338 liveins: $vgpr0 339 340 ; CHECK-LABEL: name: test_fcanonicalize_log 341 ; CHECK: liveins: $vgpr0 342 ; CHECK-NEXT: {{ $}} 343 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 344 ; CHECK-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.log), [[COPY]](s32) 345 ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32) 346 %0:_(s32) = COPY $vgpr0 347 %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.log), %0 348 %2:_(s32) = G_FCANONICALIZE %1 349 $vgpr0 = COPY %2(s32) 350... 351 352--- 353name: test_fcanonicalize_exp2 354tracksRegLiveness: true 355legalized: true 356body: | 357 bb.0: 358 liveins: $vgpr0 359 360 ; CHECK-LABEL: name: test_fcanonicalize_exp2 361 ; CHECK: liveins: $vgpr0 362 ; CHECK-NEXT: {{ $}} 363 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 364 ; CHECK-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY]](s32) 365 ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32) 366 %0:_(s32) = COPY $vgpr0 367 %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %0 368 %2:_(s32) = G_FCANONICALIZE %1 369 $vgpr0 = COPY %2(s32) 370... 371