xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            test_f16
6tracksRegLiveness: true
7body:             |
8  bb.0:
9    liveins: $vgpr0
10
11    ; CHECK-LABEL: name: test_f16
12    ; CHECK: liveins: $vgpr0
13    ; CHECK-NEXT: {{  $}}
14    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
15    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
16    ; CHECK-NEXT: [[FABS:%[0-9]+]]:_(s16) = G_FABS [[TRUNC]]
17    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FABS]](s16)
18    ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
19    %0:_(s32) = COPY $vgpr0
20    %1:_(s16) = G_TRUNC %0:_(s32)
21    %2:_(s16) = G_FNEG %1:_
22    %3:_(s16) = G_FABS %2:_
23    %4:_(s32) = G_ANYEXT %3:_(s16)
24    $vgpr0 = COPY %4:_(s32)
25
26...
27---
28name:            test_f32
29tracksRegLiveness: true
30body:             |
31  bb.0:
32    liveins: $vgpr0
33
34    ; CHECK-LABEL: name: test_f32
35    ; CHECK: liveins: $vgpr0
36    ; CHECK-NEXT: {{  $}}
37    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
38    ; CHECK-NEXT: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[COPY]]
39    ; CHECK-NEXT: $vgpr0 = COPY [[FABS]](s32)
40    %0:_(s32) = COPY $vgpr0
41    %1:_(s32) = G_FNEG %0
42    %2:_(s32) = G_FABS %1
43    $vgpr0 = COPY %2(s32)
44
45...
46---
47name:            test_f64
48tracksRegLiveness: true
49body:             |
50  bb.0:
51    liveins: $vgpr0_vgpr1
52
53    ; CHECK-LABEL: name: test_f64
54    ; CHECK: liveins: $vgpr0_vgpr1
55    ; CHECK-NEXT: {{  $}}
56    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
57    ; CHECK-NEXT: [[FABS:%[0-9]+]]:_(s64) = G_FABS [[COPY]]
58    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[FABS]](s64)
59    %0:_(s64) = COPY $vgpr0_vgpr1
60    %1:_(s64) = G_FNEG %0
61    %2:_(s64) = G_FABS %1
62    $vgpr0_vgpr1 = COPY %2(s64)
63
64...
65---
66name:            test_v2f16
67tracksRegLiveness: true
68body:             |
69  bb.0:
70    liveins: $vgpr0
71
72    ; CHECK-LABEL: name: test_v2f16
73    ; CHECK: liveins: $vgpr0
74    ; CHECK-NEXT: {{  $}}
75    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
76    ; CHECK-NEXT: [[FABS:%[0-9]+]]:_(<2 x s16>) = G_FABS [[COPY]]
77    ; CHECK-NEXT: $vgpr0 = COPY [[FABS]](<2 x s16>)
78    %0:_(<2 x s16>) = COPY $vgpr0
79    %1:_(<2 x s16>) = G_FNEG %0
80    %2:_(<2 x s16>) = G_FABS %1
81    $vgpr0 = COPY %2(<2 x s16>)
82
83...
84---
85name:            test_v3f32
86tracksRegLiveness: true
87body:             |
88  bb.0:
89    liveins: $vgpr0_vgpr1_vgpr2
90
91    ; CHECK-LABEL: name: test_v3f32
92    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2
93    ; CHECK-NEXT: {{  $}}
94    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
95    ; CHECK-NEXT: [[FABS:%[0-9]+]]:_(<3 x s32>) = G_FABS [[COPY]]
96    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[FABS]](<3 x s32>)
97    %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
98    %1:_(<3 x s32>) = G_FNEG %0
99    %2:_(<3 x s32>) = G_FABS %1
100    $vgpr0_vgpr1_vgpr2 = COPY %2(<3 x s32>)
101
102...
103