xref: /llvm-project/llvm/test/CodeGen/AArch64/inlineasm-X-constraint.ll (revision 4a2807d24849d9811d7f6b265a40e5ba572771cc)
1; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o - | FileCheck %s
2
3; The following functions test the use case where an X constraint is used to
4; add a dependency between an assembly instruction (vmsr in this case) and
5; another instruction. In each function, we use a different type for the
6; X constraint argument.
7;
8; We can something similar from the following C code:
9; double f1(double f, int pscr_value) {
10;   asm volatile("msr fpsr,%1" : "=X" ((f)): "r" (pscr_value));
11;   return f+f;
12; }
13
14; CHECK-LABEL: f1
15; CHECK: msr FPSR
16; CHECK: fadd d
17
18define  double @f1(double %f, i32 %pscr_value) {
19entry:
20  %f.addr = alloca double, align 8
21  store double %f, ptr %f.addr, align 8
22  call void asm sideeffect "msr fpsr,$1", "=*X,r"(ptr elementtype(double) nonnull %f.addr, i32 %pscr_value) nounwind
23  %0 = load double, ptr %f.addr, align 8
24  %add = fadd double %0, %0
25  ret double %add
26}
27
28; int f2(int f, int pscr_value) {
29;   asm volatile("msr fpsr,$1" : "=X" ((f)): "r" (pscr_value));
30;   return f*f;
31; }
32
33; CHECK-LABEL: f2
34; CHECK: msr FPSR
35; CHECK: mul
36define  i32 @f2(i32 %f, i32 %pscr_value) {
37entry:
38  %f.addr = alloca i32, align 4
39  store i32 %f, ptr %f.addr, align 4
40  call void asm sideeffect "msr fpsr,$1", "=*X,r"(ptr elementtype(i32) nonnull %f.addr, i32 %pscr_value) nounwind
41  %0 = load i32, ptr %f.addr, align 4
42  %mul = mul i32 %0, %0
43  ret i32 %mul
44}
45
46; typedef signed char int8_t;
47; typedef __attribute__((neon_vector_type(8))) int8_t int8x8_t;
48; void f3 (void)
49; {
50;   int8x8_t vector_res_int8x8;
51;   unsigned int fpscr;
52;   asm volatile ("msr fpsr,$1" : "=X" ((vector_res_int8x8)) : "r" (fpscr));
53;   return vector_res_int8x8 * vector_res_int8x8;
54; }
55
56; CHECK-LABEL: f3
57; CHECK: msr FPSR
58; CHECK: mul
59define  <8 x i8> @f3() {
60entry:
61  %vector_res_int8x8 = alloca <8 x i8>, align 8
62  call void asm sideeffect "msr fpsr,$1", "=*X,r"(ptr elementtype(<8 x i8>) nonnull %vector_res_int8x8, i32 undef) nounwind
63  %0 = load <8 x i8>, ptr %vector_res_int8x8, align 8
64  %mul = mul <8 x i8> %0, %0
65  ret <8 x i8> %mul
66}
67
68; We can emit integer constants.
69; We can get this from:
70; void f() {
71;   int x = 2;
72;   asm volatile ("add x0, x0, %0" : : "X" (x));
73; }
74;
75; CHECK-LABEL: f4
76; CHECK: add x0, x0, #2
77define void @f4() {
78entry:
79  tail call void asm sideeffect "add x0, x0, $0", "X"(i32 2)
80  ret void
81}
82
83; We can emit function labels. This is equivalent to the following C code:
84; void f(void) {
85;   void (*x)(void) = &foo;
86;   asm volatile ("bl %0" : : "X" (x));
87; }
88; CHECK-LABEL: f5
89; CHECK: bl f4
90define void @f5() {
91entry:
92  tail call void asm sideeffect "bl $0", "X"(ptr nonnull @f4)
93  ret void
94}
95
96declare void @foo(...)
97
98; This tests the behavior of the X constraint when used on functions pointers,
99; or functions with a cast. We figure out that this is a function pointer and
100; emit the label.
101
102; CHECK-LABEL: f6
103; CHECK: bl foo
104; CHECK: bl f4
105
106define void @f6() nounwind {
107entry:
108  tail call void asm sideeffect "bl $0", "X"(ptr @foo) nounwind
109  tail call void asm sideeffect "bl $0", "X"(ptr @f4) nounwind
110  ret void
111}
112
113; The following IR can be generated from C code with a function like:
114; void a() {
115;   void* a = &&A;
116;   asm volatile ("bl %0" : : "X" (a));
117;  A:
118;   return;
119; }
120
121; CHECK-LABEL: f7
122; CHECK: bl .Ltmp3
123define void @f7() {
124  call void asm sideeffect "bl $0", "X"( ptr blockaddress(@f7, %bb) )
125  br label %bb
126bb:
127  ret void
128}
129
130; If we use a constraint "=*X", we should get a store back to *%x (in x0).
131; CHECK-LABEL: f8
132; CHECK: add	 [[Dest:x[0-9]+]], x0, x0
133; CHECK: str	[[Dest]], [x0]
134define void @f8(ptr %x) {
135entry:
136  tail call void asm sideeffect "add $0, x0, x0", "=*X"(ptr elementtype(i64) %x)
137  ret void
138}
139