1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64 < %s | FileCheck %s 3 4; All tests are doing unordered vector comparisons on vectors larger than a 5; Neon vector. 6 7define i1 @unordered_floating_point_compare_on_v8f32(<8 x float> %a_vec) { 8; CHECK-LABEL: unordered_floating_point_compare_on_v8f32: 9; CHECK: // %bb.0: 10; CHECK-NEXT: fcmgt v1.4s, v1.4s, #0.0 11; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0 12; CHECK-NEXT: mov w8, #1 // =0x1 13; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h 14; CHECK-NEXT: mvn v0.16b, v0.16b 15; CHECK-NEXT: umaxv h0, v0.8h 16; CHECK-NEXT: fmov w9, s0 17; CHECK-NEXT: bic w0, w8, w9 18; CHECK-NEXT: ret 19 %a_cmp = fcmp ule <8 x float> %a_vec, zeroinitializer 20 %cmp_result = bitcast <8 x i1> %a_cmp to i8 21 %all_zero = icmp eq i8 %cmp_result, 0 22 ret i1 %all_zero 23} 24 25define i1 @unordered_floating_point_compare_on_v16f32(<16 x float> %a_vec) { 26; CHECK-LABEL: unordered_floating_point_compare_on_v16f32: 27; CHECK: // %bb.0: 28; CHECK-NEXT: fcmgt v3.4s, v3.4s, #0.0 29; CHECK-NEXT: fcmgt v2.4s, v2.4s, #0.0 30; CHECK-NEXT: mov w9, #1 // =0x1 31; CHECK-NEXT: fcmgt v1.4s, v1.4s, #0.0 32; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0 33; CHECK-NEXT: uzp1 v2.8h, v2.8h, v3.8h 34; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h 35; CHECK-NEXT: uzp1 v0.16b, v0.16b, v2.16b 36; CHECK-NEXT: mvn v0.16b, v0.16b 37; CHECK-NEXT: umaxv b0, v0.16b 38; CHECK-NEXT: fmov w8, s0 39; CHECK-NEXT: bic w0, w9, w8 40; CHECK-NEXT: ret 41 %a_cmp = fcmp ule <16 x float> %a_vec, zeroinitializer 42 %cmp_result = bitcast <16 x i1> %a_cmp to i16 43 %all_zero = icmp eq i16 %cmp_result, 0 44 ret i1 %all_zero 45} 46 47define i1 @unordered_floating_point_compare_on_v32f32(<32 x float> %a_vec) { 48; CHECK-LABEL: unordered_floating_point_compare_on_v32f32: 49; CHECK: // %bb.0: 50; CHECK-NEXT: fcmgt v3.4s, v3.4s, #0.0 51; CHECK-NEXT: fcmgt v2.4s, v2.4s, #0.0 52; CHECK-NEXT: mov w9, #1 // =0x1 53; CHECK-NEXT: fcmgt v1.4s, v1.4s, #0.0 54; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0 55; CHECK-NEXT: fcmgt v7.4s, v7.4s, #0.0 56; CHECK-NEXT: fcmgt v6.4s, v6.4s, #0.0 57; CHECK-NEXT: fcmgt v5.4s, v5.4s, #0.0 58; CHECK-NEXT: fcmgt v4.4s, v4.4s, #0.0 59; CHECK-NEXT: uzp1 v2.8h, v2.8h, v3.8h 60; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h 61; CHECK-NEXT: uzp1 v1.8h, v6.8h, v7.8h 62; CHECK-NEXT: uzp1 v3.8h, v4.8h, v5.8h 63; CHECK-NEXT: uzp1 v0.16b, v0.16b, v2.16b 64; CHECK-NEXT: uzp1 v1.16b, v3.16b, v1.16b 65; CHECK-NEXT: mvn v0.16b, v0.16b 66; CHECK-NEXT: orn v0.16b, v0.16b, v1.16b 67; CHECK-NEXT: shl v0.16b, v0.16b, #7 68; CHECK-NEXT: cmlt v0.16b, v0.16b, #0 69; CHECK-NEXT: umaxv b0, v0.16b 70; CHECK-NEXT: fmov w8, s0 71; CHECK-NEXT: bic w0, w9, w8 72; CHECK-NEXT: ret 73 %a_cmp = fcmp ule <32 x float> %a_vec, zeroinitializer 74 %cmp_result = bitcast <32 x i1> %a_cmp to i32 75 %all_zero = icmp eq i32 %cmp_result, 0 76 ret i1 %all_zero 77} 78