1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s 3; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu -mattr=+cssc | FileCheck %s -check-prefix=CHECK-CSSC 4 5define i4 @cttz4(i4 %x) { 6; CHECK-LABEL: cttz4: 7; CHECK: // %bb.0: 8; CHECK-NEXT: orr w8, w0, #0x10 9; CHECK-NEXT: rbit w8, w8 10; CHECK-NEXT: clz w0, w8 11; CHECK-NEXT: ret 12; 13; CHECK-CSSC-LABEL: cttz4: 14; CHECK-CSSC: // %bb.0: 15; CHECK-CSSC-NEXT: orr w8, w0, #0x10 16; CHECK-CSSC-NEXT: ctz w0, w8 17; CHECK-CSSC-NEXT: ret 18 %ctz = tail call i4 @llvm.cttz.i4(i4 %x) 19 ret i4 %ctz 20} 21 22define i8 @cttz8(i8 %x) { 23; CHECK-LABEL: cttz8: 24; CHECK: // %bb.0: 25; CHECK-NEXT: orr w8, w0, #0x100 26; CHECK-NEXT: rbit w8, w8 27; CHECK-NEXT: clz w0, w8 28; CHECK-NEXT: ret 29; 30; CHECK-CSSC-LABEL: cttz8: 31; CHECK-CSSC: // %bb.0: 32; CHECK-CSSC-NEXT: orr w8, w0, #0x100 33; CHECK-CSSC-NEXT: ctz w0, w8 34; CHECK-CSSC-NEXT: ret 35 %ctz = tail call i8 @llvm.cttz.i8(i8 %x) 36 ret i8 %ctz 37} 38 39define i16 @cttz16(i16 %x) { 40; CHECK-LABEL: cttz16: 41; CHECK: // %bb.0: 42; CHECK-NEXT: orr w8, w0, #0x10000 43; CHECK-NEXT: rbit w8, w8 44; CHECK-NEXT: clz w0, w8 45; CHECK-NEXT: ret 46; 47; CHECK-CSSC-LABEL: cttz16: 48; CHECK-CSSC: // %bb.0: 49; CHECK-CSSC-NEXT: orr w8, w0, #0x10000 50; CHECK-CSSC-NEXT: ctz w0, w8 51; CHECK-CSSC-NEXT: ret 52 %ctz = tail call i16 @llvm.cttz.i16(i16 %x) 53 ret i16 %ctz 54} 55 56define i17 @cttz17(i17 %x) { 57; CHECK-LABEL: cttz17: 58; CHECK: // %bb.0: 59; CHECK-NEXT: orr w8, w0, #0x20000 60; CHECK-NEXT: rbit w8, w8 61; CHECK-NEXT: clz w0, w8 62; CHECK-NEXT: ret 63; 64; CHECK-CSSC-LABEL: cttz17: 65; CHECK-CSSC: // %bb.0: 66; CHECK-CSSC-NEXT: orr w8, w0, #0x20000 67; CHECK-CSSC-NEXT: ctz w0, w8 68; CHECK-CSSC-NEXT: ret 69 %ctz = tail call i17 @llvm.cttz.i17(i17 %x) 70 ret i17 %ctz 71} 72 73define i32 @cttz32(i32 %x) nounwind readnone { 74; CHECK-LABEL: cttz32: 75; CHECK: // %bb.0: 76; CHECK-NEXT: rbit w8, w0 77; CHECK-NEXT: clz w0, w8 78; CHECK-NEXT: ret 79; 80; CHECK-CSSC-LABEL: cttz32: 81; CHECK-CSSC: // %bb.0: 82; CHECK-CSSC-NEXT: ctz w0, w0 83; CHECK-CSSC-NEXT: ret 84 %ctz = tail call i32 @llvm.cttz.i32(i32 %x) 85 ret i32 %ctz 86} 87 88define i64 @cttz64(i64 %x) nounwind readnone { 89; CHECK-LABEL: cttz64: 90; CHECK: // %bb.0: 91; CHECK-NEXT: rbit x8, x0 92; CHECK-NEXT: clz x0, x8 93; CHECK-NEXT: ret 94; 95; CHECK-CSSC-LABEL: cttz64: 96; CHECK-CSSC: // %bb.0: 97; CHECK-CSSC-NEXT: ctz x0, x0 98; CHECK-CSSC-NEXT: ret 99 %ctz = tail call i64 @llvm.cttz.i64(i64 %x) 100 ret i64 %ctz 101} 102 103define i128 @cttz128(i128 %x) nounwind readnone { 104; CHECK-LABEL: cttz128: 105; CHECK: // %bb.0: 106; CHECK-NEXT: rbit x8, x1 107; CHECK-NEXT: rbit x9, x0 108; CHECK-NEXT: cmp x0, #0 109; CHECK-NEXT: mov x1, xzr 110; CHECK-NEXT: clz x8, x8 111; CHECK-NEXT: clz x9, x9 112; CHECK-NEXT: add x8, x8, #64 113; CHECK-NEXT: csel x0, x9, x8, ne 114; CHECK-NEXT: ret 115; 116; CHECK-CSSC-LABEL: cttz128: 117; CHECK-CSSC: // %bb.0: 118; CHECK-CSSC-NEXT: ctz x8, x1 119; CHECK-CSSC-NEXT: ctz x9, x0 120; CHECK-CSSC-NEXT: cmp x0, #0 121; CHECK-CSSC-NEXT: add x8, x8, #64 122; CHECK-CSSC-NEXT: mov x1, xzr 123; CHECK-CSSC-NEXT: csel x0, x9, x8, ne 124; CHECK-CSSC-NEXT: ret 125 %ctz = tail call i128 @llvm.cttz.i128(i128 %x) 126 ret i128 %ctz 127} 128 129define i32 @cttz32combine(i32 %x) nounwind readnone { 130; CHECK-LABEL: cttz32combine: 131; CHECK: // %bb.0: 132; CHECK-NEXT: rbit w8, w0 133; CHECK-NEXT: clz w0, w8 134; CHECK-NEXT: ret 135; 136; CHECK-CSSC-LABEL: cttz32combine: 137; CHECK-CSSC: // %bb.0: 138; CHECK-CSSC-NEXT: ctz w0, w0 139; CHECK-CSSC-NEXT: ret 140 %rev = tail call i32 @llvm.bitreverse.i32(i32 %x) 141 %ctz = tail call i32 @llvm.ctlz.i32(i32 %rev) 142 ret i32 %ctz 143} 144 145define i64 @cttz64combine(i64 %x) nounwind readnone { 146; CHECK-LABEL: cttz64combine: 147; CHECK: // %bb.0: 148; CHECK-NEXT: rbit x8, x0 149; CHECK-NEXT: clz x0, x8 150; CHECK-NEXT: ret 151; 152; CHECK-CSSC-LABEL: cttz64combine: 153; CHECK-CSSC: // %bb.0: 154; CHECK-CSSC-NEXT: ctz x0, x0 155; CHECK-CSSC-NEXT: ret 156 %rev = tail call i64 @llvm.bitreverse.i64(i64 %x) 157 %ctz = tail call i64 @llvm.ctlz.i64(i64 %rev) 158 ret i64 %ctz 159} 160 161declare i4 @llvm.cttz.i4(i4 %x) nounwind readnone 162declare i8 @llvm.cttz.i8(i8 %x) nounwind readnone 163declare i16 @llvm.cttz.i16(i16 %x) nounwind readnone 164declare i17 @llvm.cttz.i17(i17 %x) nounwind readnone 165declare i32 @llvm.cttz.i32(i32) nounwind readnone 166declare i64 @llvm.cttz.i64(i64) nounwind readnone 167declare i128 @llvm.cttz.i128(i128) nounwind readnone 168 169declare i32 @llvm.ctlz.i32(i32 %x) nounwind readnone 170declare i32 @llvm.bitreverse.i32(i32 %x) nounwind readnone 171declare i64 @llvm.ctlz.i64(i64 %x) nounwind readnone 172declare i64 @llvm.bitreverse.i64(i64 %x) nounwind readnone 173