xref: /llvm-project/llvm/test/CodeGen/AArch64/extractvector-oob-load.mir (revision 8bb9443333e0117ab61feecce9de339b11b924fc) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
2# RUN: llc -mtriple=aarch64-linux-gnu -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5name:            f
6alignment:       4
7tracksRegLiveness: true
8registers:
9  - { id: 0, class: _ }
10  - { id: 1, class: _ }
11  - { id: 2, class: _ }
12  - { id: 3, class: _ }
13liveins:
14  - { reg: '$x0' }
15frameInfo:
16  maxAlignment:    1
17machineFunctionInfo: {}
18body:             |
19  bb.0:
20    liveins: $x0
21
22    ; CHECK-LABEL: name: f
23    ; CHECK: liveins: $x0
24    ; CHECK-NEXT: {{  $}}
25    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
26    ; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
27    ; CHECK-NEXT: RET_ReallyLR implicit $x0
28    %0:_(p0) = COPY $x0
29    %3:_(s64) = G_CONSTANT i64 224567957
30    %1:_(<3 x s64>) = G_LOAD %0(p0) :: (load (<3 x s64>), align 32)
31    %2:_(s64) = G_EXTRACT_VECTOR_ELT %1(<3 x s64>), %3(s64)
32    $x0 = COPY %2(s64)
33    RET_ReallyLR implicit $x0
34
35...
36