1; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s 2 3;; Test returns. 4define void @t0() nounwind ssp { 5entry: 6; CHECK: t0 7; CHECK: ret 8 ret void 9} 10 11define i32 @t1(i32 %a) nounwind ssp { 12entry: 13; CHECK: t1 14; CHECK: str w0, [sp, #12] 15; CHECK-NEXT: ldr w0, [sp, #12] 16; CHECK: ret 17 %a.addr = alloca i32, align 4 18 store i32 %a, ptr %a.addr, align 4 19 %tmp = load i32, ptr %a.addr, align 4 20 ret i32 %tmp 21} 22 23define i64 @t2(i64 %a) nounwind ssp { 24entry: 25; CHECK: t2 26; CHECK: str x0, [sp, #8] 27; CHECK-NEXT: ldr x0, [sp, #8] 28; CHECK: ret 29 %a.addr = alloca i64, align 8 30 store i64 %a, ptr %a.addr, align 8 31 %tmp = load i64, ptr %a.addr, align 8 32 ret i64 %tmp 33} 34 35define signext i16 @ret_i16(i16 signext %a) nounwind { 36entry: 37; CHECK: @ret_i16 38; CHECK: sxth w0, {{w[0-9]+}} 39 %a.addr = alloca i16, align 1 40 store i16 %a, ptr %a.addr, align 1 41 %0 = load i16, ptr %a.addr, align 1 42 ret i16 %0 43} 44 45define signext i8 @ret_i8(i8 signext %a) nounwind { 46entry: 47; CHECK: @ret_i8 48; CHECK: sxtb w0, {{w[0-9]+}} 49 %a.addr = alloca i8, align 1 50 store i8 %a, ptr %a.addr, align 1 51 %0 = load i8, ptr %a.addr, align 1 52 ret i8 %0 53} 54 55define signext i1 @ret_i1(i1 signext %a) nounwind { 56entry: 57; CHECK: @ret_i1 58; CHECK: and [[REG:w[0-9]+]], {{w[0-9]+}}, #0x1 59; CHECK: sbfx w0, [[REG]], #0, #1 60 %a.addr = alloca i1, align 1 61 store i1 %a, ptr %a.addr, align 1 62 %0 = load i1, ptr %a.addr, align 1 63 ret i1 %0 64} 65