xref: /llvm-project/llvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll (revision 1729e6e742ba9f6f210550000ace4bec72530c2e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=arm64-eabi < %s | FileCheck --enable-var-scope %s
3
4; Test fptosi
5define i32 @fptosi_wh(half %a) nounwind ssp {
6; CHECK-LABEL: fptosi_wh:
7; CHECK:       // %bb.0: // %entry
8; CHECK-NEXT:    fcvt s0, h0
9; CHECK-NEXT:    fcvtzs w0, s0
10; CHECK-NEXT:    ret
11entry:
12  %conv = fptosi half %a to i32
13  ret i32 %conv
14}
15
16; Test fptoui
17define i32 @fptoui_swh(half %a) nounwind ssp {
18; CHECK-LABEL: fptoui_swh:
19; CHECK:       // %bb.0: // %entry
20; CHECK-NEXT:    fcvt s0, h0
21; CHECK-NEXT:    fcvtzu w0, s0
22; CHECK-NEXT:    ret
23entry:
24  %conv = fptoui half %a to i32
25  ret i32 %conv
26}
27
28; Test sitofp
29define half @sitofp_hw_i1(i1 %a) nounwind ssp {
30; CHECK-LABEL: sitofp_hw_i1:
31; CHECK:       // %bb.0: // %entry
32; CHECK-NEXT:    sbfx w8, w0, #0, #1
33; CHECK-NEXT:    scvtf s0, w8
34; CHECK-NEXT:    fcvt h0, s0
35; CHECK-NEXT:    ret
36entry:
37  %conv = sitofp i1 %a to half
38  ret half %conv
39}
40
41; Test sitofp
42define half @sitofp_hw_i8(i8 %a) nounwind ssp {
43; CHECK-LABEL: sitofp_hw_i8:
44; CHECK:       // %bb.0: // %entry
45; CHECK-NEXT:    sxtb w8, w0
46; CHECK-NEXT:    scvtf s0, w8
47; CHECK-NEXT:    fcvt h0, s0
48; CHECK-NEXT:    ret
49entry:
50  %conv = sitofp i8 %a to half
51  ret half %conv
52}
53
54; Test sitofp
55define half @sitofp_hw_i16(i16 %a) nounwind ssp {
56; CHECK-LABEL: sitofp_hw_i16:
57; CHECK:       // %bb.0: // %entry
58; CHECK-NEXT:    sxth w8, w0
59; CHECK-NEXT:    scvtf s0, w8
60; CHECK-NEXT:    fcvt h0, s0
61; CHECK-NEXT:    ret
62entry:
63  %conv = sitofp i16 %a to half
64  ret half %conv
65}
66
67; Test sitofp
68define half @sitofp_hw_i32(i32 %a) nounwind ssp {
69; CHECK-LABEL: sitofp_hw_i32:
70; CHECK:       // %bb.0: // %entry
71; CHECK-NEXT:    scvtf s0, w0
72; CHECK-NEXT:    fcvt h0, s0
73; CHECK-NEXT:    ret
74entry:
75  %conv = sitofp i32 %a to half
76  ret half %conv
77}
78
79; Test sitofp
80define half @sitofp_hx(i64 %a) nounwind ssp {
81; CHECK-LABEL: sitofp_hx:
82; CHECK:       // %bb.0: // %entry
83; CHECK-NEXT:    scvtf s0, x0
84; CHECK-NEXT:    fcvt h0, s0
85; CHECK-NEXT:    ret
86entry:
87  %conv = sitofp i64 %a to half
88  ret half %conv
89}
90
91; Test uitofp
92define half @uitofp_hw_i1(i1 %a) nounwind ssp {
93; CHECK-LABEL: uitofp_hw_i1:
94; CHECK:       // %bb.0: // %entry
95; CHECK-NEXT:    and w8, w0, #0x1
96; CHECK-NEXT:    ucvtf s0, w8
97; CHECK-NEXT:    fcvt h0, s0
98; CHECK-NEXT:    ret
99entry:
100  %conv = uitofp i1 %a to half
101  ret half %conv
102}
103
104; Test uitofp
105define half @uitofp_hw_i8(i8 %a) nounwind ssp {
106; CHECK-LABEL: uitofp_hw_i8:
107; CHECK:       // %bb.0: // %entry
108; CHECK-NEXT:    and w8, w0, #0xff
109; CHECK-NEXT:    ucvtf s0, w8
110; CHECK-NEXT:    fcvt h0, s0
111; CHECK-NEXT:    ret
112entry:
113  %conv = uitofp i8 %a to half
114  ret half %conv
115}
116
117; Test uitofp
118define half @uitofp_hw_i16(i16 %a) nounwind ssp {
119; CHECK-LABEL: uitofp_hw_i16:
120; CHECK:       // %bb.0: // %entry
121; CHECK-NEXT:    and w8, w0, #0xffff
122; CHECK-NEXT:    ucvtf s0, w8
123; CHECK-NEXT:    fcvt h0, s0
124; CHECK-NEXT:    ret
125entry:
126  %conv = uitofp i16 %a to half
127  ret half %conv
128}
129
130; Test uitofp
131define half @uitofp_hw_i32(i32 %a) nounwind ssp {
132; CHECK-LABEL: uitofp_hw_i32:
133; CHECK:       // %bb.0: // %entry
134; CHECK-NEXT:    ucvtf s0, w0
135; CHECK-NEXT:    fcvt h0, s0
136; CHECK-NEXT:    ret
137entry:
138  %conv = uitofp i32 %a to half
139  ret half %conv
140}
141
142; Test uitofp
143define half @uitofp_hx(i64 %a) nounwind ssp {
144; CHECK-LABEL: uitofp_hx:
145; CHECK:       // %bb.0: // %entry
146; CHECK-NEXT:    ucvtf s0, x0
147; CHECK-NEXT:    fcvt h0, s0
148; CHECK-NEXT:    ret
149entry:
150  %conv = uitofp i64 %a to half
151  ret half %conv
152}
153
154; Test fptosi
155define i32 @fptosi_bf(bfloat %a) nounwind ssp {
156; CHECK-LABEL: fptosi_bf:
157; CHECK:       // %bb.0: // %entry
158; CHECK-NEXT:    fmov s1, s0
159; CHECK-NEXT:    // implicit-def: $d0
160; CHECK-NEXT:    fmov s0, s1
161; CHECK-NEXT:    shll v0.4s, v0.4h, #16
162; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
163; CHECK-NEXT:    fcvtzs w0, s0
164; CHECK-NEXT:    ret
165entry:
166  %conv = fptosi bfloat %a to i32
167  ret i32 %conv
168}
169
170; Test fptoui
171define i32 @fptoui_sbf(bfloat %a) nounwind ssp {
172; CHECK-LABEL: fptoui_sbf:
173; CHECK:       // %bb.0: // %entry
174; CHECK-NEXT:    fmov s1, s0
175; CHECK-NEXT:    // implicit-def: $d0
176; CHECK-NEXT:    fmov s0, s1
177; CHECK-NEXT:    shll v0.4s, v0.4h, #16
178; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
179; CHECK-NEXT:    fcvtzu w0, s0
180; CHECK-NEXT:    ret
181entry:
182  %conv = fptoui bfloat %a to i32
183  ret i32 %conv
184}
185
186; Test sitofp
187define bfloat @sitofp_bf_i1(i1 %a) nounwind ssp {
188; CHECK-LABEL: sitofp_bf_i1:
189; CHECK:       // %bb.0: // %entry
190; CHECK-NEXT:    sbfx w8, w0, #0, #1
191; CHECK-NEXT:    scvtf s0, w8
192; CHECK-NEXT:    fmov w9, s0
193; CHECK-NEXT:    ubfx w8, w9, #16, #1
194; CHECK-NEXT:    add w8, w8, w9
195; CHECK-NEXT:    mov w9, #32767 // =0x7fff
196; CHECK-NEXT:    add w8, w8, w9
197; CHECK-NEXT:    lsr w8, w8, #16
198; CHECK-NEXT:    fmov s0, w8
199; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
200; CHECK-NEXT:    ret
201entry:
202  %conv = sitofp i1 %a to bfloat
203  ret bfloat %conv
204}
205
206; Test sitofp
207define bfloat @sitofp_bf_i8(i8 %a) nounwind ssp {
208; CHECK-LABEL: sitofp_bf_i8:
209; CHECK:       // %bb.0: // %entry
210; CHECK-NEXT:    sxtb w8, w0
211; CHECK-NEXT:    scvtf s0, w8
212; CHECK-NEXT:    fmov w9, s0
213; CHECK-NEXT:    ubfx w8, w9, #16, #1
214; CHECK-NEXT:    add w8, w8, w9
215; CHECK-NEXT:    mov w9, #32767 // =0x7fff
216; CHECK-NEXT:    add w8, w8, w9
217; CHECK-NEXT:    lsr w8, w8, #16
218; CHECK-NEXT:    fmov s0, w8
219; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
220; CHECK-NEXT:    ret
221entry:
222  %conv = sitofp i8 %a to bfloat
223  ret bfloat %conv
224}
225
226; Test sitofp
227define bfloat @sitofp_bf_i16(i16 %a) nounwind ssp {
228; CHECK-LABEL: sitofp_bf_i16:
229; CHECK:       // %bb.0: // %entry
230; CHECK-NEXT:    sxth w8, w0
231; CHECK-NEXT:    scvtf s0, w8
232; CHECK-NEXT:    fmov w9, s0
233; CHECK-NEXT:    ubfx w8, w9, #16, #1
234; CHECK-NEXT:    add w8, w8, w9
235; CHECK-NEXT:    mov w9, #32767 // =0x7fff
236; CHECK-NEXT:    add w8, w8, w9
237; CHECK-NEXT:    lsr w8, w8, #16
238; CHECK-NEXT:    fmov s0, w8
239; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
240; CHECK-NEXT:    ret
241entry:
242  %conv = sitofp i16 %a to bfloat
243  ret bfloat %conv
244}
245
246; Test sitofp
247define bfloat @sitofp_bf_i32(i32 %a) nounwind ssp {
248; CHECK-LABEL: sitofp_bf_i32:
249; CHECK:       // %bb.0: // %entry
250; CHECK-NEXT:    scvtf d0, w0
251; CHECK-NEXT:    fcvtxn s0, d0
252; CHECK-NEXT:    fmov w9, s0
253; CHECK-NEXT:    ubfx w8, w9, #16, #1
254; CHECK-NEXT:    add w8, w8, w9
255; CHECK-NEXT:    mov w9, #32767 // =0x7fff
256; CHECK-NEXT:    add w8, w8, w9
257; CHECK-NEXT:    lsr w8, w8, #16
258; CHECK-NEXT:    fmov s0, w8
259; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
260; CHECK-NEXT:    ret
261entry:
262  %conv = sitofp i32 %a to bfloat
263  ret bfloat %conv
264}
265
266; Test sitofp
267define bfloat @sitofp_bf_i164(i64 %a) nounwind ssp {
268; CHECK-LABEL: sitofp_bf_i164:
269; CHECK:       // %bb.0: // %entry
270; CHECK-NEXT:    subs x8, x0, #0
271; CHECK-NEXT:    cneg x10, x0, mi
272; CHECK-NEXT:    and x8, x10, #0xfffffffffffff000
273; CHECK-NEXT:    lsr x9, x10, #53
274; CHECK-NEXT:    subs x9, x9, #0
275; CHECK-NEXT:    csel x8, x8, x10, ne
276; CHECK-NEXT:    scvtf d0, x8
277; CHECK-NEXT:    fmov x8, d0
278; CHECK-NEXT:    and x9, x0, #0x8000000000000000
279; CHECK-NEXT:    orr x8, x8, x9
280; CHECK-NEXT:    cset w9, ne
281; CHECK-NEXT:    ands x10, x10, #0xfff
282; CHECK-NEXT:    csel w9, wzr, w9, eq
283; CHECK-NEXT:    mov w9, w9
284; CHECK-NEXT:    // kill: def $x9 killed $w9
285; CHECK-NEXT:    orr x8, x8, x9
286; CHECK-NEXT:    fmov d0, x8
287; CHECK-NEXT:    fcvtxn s0, d0
288; CHECK-NEXT:    fmov w9, s0
289; CHECK-NEXT:    ubfx w8, w9, #16, #1
290; CHECK-NEXT:    add w8, w8, w9
291; CHECK-NEXT:    mov w9, #32767 // =0x7fff
292; CHECK-NEXT:    add w8, w8, w9
293; CHECK-NEXT:    lsr w8, w8, #16
294; CHECK-NEXT:    fmov s0, w8
295; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
296; CHECK-NEXT:    ret
297entry:
298  %conv = sitofp i64 %a to bfloat
299  ret bfloat %conv
300}
301
302; Test uitofp
303define bfloat @uitofp_bf_i1(i1 %a) nounwind ssp {
304; CHECK-LABEL: uitofp_bf_i1:
305; CHECK:       // %bb.0: // %entry
306; CHECK-NEXT:    and w8, w0, #0x1
307; CHECK-NEXT:    ucvtf s0, w8
308; CHECK-NEXT:    fmov w9, s0
309; CHECK-NEXT:    ubfx w8, w9, #16, #1
310; CHECK-NEXT:    add w8, w8, w9
311; CHECK-NEXT:    mov w9, #32767 // =0x7fff
312; CHECK-NEXT:    add w8, w8, w9
313; CHECK-NEXT:    lsr w8, w8, #16
314; CHECK-NEXT:    fmov s0, w8
315; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
316; CHECK-NEXT:    ret
317entry:
318  %conv = uitofp i1 %a to bfloat
319  ret bfloat %conv
320}
321
322; Test uitofp
323define bfloat @uitofp_bf_i8(i8 %a) nounwind ssp {
324; CHECK-LABEL: uitofp_bf_i8:
325; CHECK:       // %bb.0: // %entry
326; CHECK-NEXT:    and w8, w0, #0xff
327; CHECK-NEXT:    ucvtf s0, w8
328; CHECK-NEXT:    fmov w9, s0
329; CHECK-NEXT:    ubfx w8, w9, #16, #1
330; CHECK-NEXT:    add w8, w8, w9
331; CHECK-NEXT:    mov w9, #32767 // =0x7fff
332; CHECK-NEXT:    add w8, w8, w9
333; CHECK-NEXT:    lsr w8, w8, #16
334; CHECK-NEXT:    fmov s0, w8
335; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
336; CHECK-NEXT:    ret
337entry:
338  %conv = uitofp i8 %a to bfloat
339  ret bfloat %conv
340}
341
342; Test uitofp
343define bfloat @uitofp_bf_i16(i16 %a) nounwind ssp {
344; CHECK-LABEL: uitofp_bf_i16:
345; CHECK:       // %bb.0: // %entry
346; CHECK-NEXT:    and w8, w0, #0xffff
347; CHECK-NEXT:    ucvtf s0, w8
348; CHECK-NEXT:    fmov w9, s0
349; CHECK-NEXT:    ubfx w8, w9, #16, #1
350; CHECK-NEXT:    add w8, w8, w9
351; CHECK-NEXT:    mov w9, #32767 // =0x7fff
352; CHECK-NEXT:    add w8, w8, w9
353; CHECK-NEXT:    lsr w8, w8, #16
354; CHECK-NEXT:    fmov s0, w8
355; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
356; CHECK-NEXT:    ret
357entry:
358  %conv = uitofp i16 %a to bfloat
359  ret bfloat %conv
360}
361
362; Test uitofp
363define bfloat @uitofp_bf_i32(i32 %a) nounwind ssp {
364; CHECK-LABEL: uitofp_bf_i32:
365; CHECK:       // %bb.0: // %entry
366; CHECK-NEXT:    ucvtf d0, w0
367; CHECK-NEXT:    fcvtxn s0, d0
368; CHECK-NEXT:    fmov w9, s0
369; CHECK-NEXT:    ubfx w8, w9, #16, #1
370; CHECK-NEXT:    add w8, w8, w9
371; CHECK-NEXT:    mov w9, #32767 // =0x7fff
372; CHECK-NEXT:    add w8, w8, w9
373; CHECK-NEXT:    lsr w8, w8, #16
374; CHECK-NEXT:    fmov s0, w8
375; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
376; CHECK-NEXT:    ret
377entry:
378  %conv = uitofp i32 %a to bfloat
379  ret bfloat %conv
380}
381
382; Test uitofp
383define bfloat @uitofp_bf_i64(i64 %a) nounwind ssp {
384; CHECK-LABEL: uitofp_bf_i64:
385; CHECK:       // %bb.0: // %entry
386; CHECK-NEXT:    and x8, x0, #0xfffffffffffff000
387; CHECK-NEXT:    lsr x9, x0, #53
388; CHECK-NEXT:    subs x9, x9, #0
389; CHECK-NEXT:    csel x8, x8, x0, ne
390; CHECK-NEXT:    ucvtf d0, x8
391; CHECK-NEXT:    fmov x8, d0
392; CHECK-NEXT:    cset w9, ne
393; CHECK-NEXT:    ands x10, x0, #0xfff
394; CHECK-NEXT:    csel w9, wzr, w9, eq
395; CHECK-NEXT:    mov w9, w9
396; CHECK-NEXT:    // kill: def $x9 killed $w9
397; CHECK-NEXT:    orr x8, x8, x9
398; CHECK-NEXT:    fmov d0, x8
399; CHECK-NEXT:    fcvtxn s0, d0
400; CHECK-NEXT:    fmov w9, s0
401; CHECK-NEXT:    ubfx w8, w9, #16, #1
402; CHECK-NEXT:    add w8, w8, w9
403; CHECK-NEXT:    mov w9, #32767 // =0x7fff
404; CHECK-NEXT:    add w8, w8, w9
405; CHECK-NEXT:    lsr w8, w8, #16
406; CHECK-NEXT:    fmov s0, w8
407; CHECK-NEXT:    // kill: def $h0 killed $h0 killed $s0
408; CHECK-NEXT:    ret
409entry:
410  %conv = uitofp i64 %a to bfloat
411  ret bfloat %conv
412}
413
414
415