xref: /llvm-project/llvm/test/CodeGen/AArch64/O3-pipeline.ll (revision 3630d9ef65b30af7e4ca78e668649bbc48b5be66)
1; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
2; RUN:     grep -v "Verify generated machine code" | FileCheck %s
3
4; REQUIRES: asserts
5
6; CHECK-LABEL: Pass Arguments:
7; CHECK-NEXT: Target Library Information
8; CHECK-NEXT: Target Pass Configuration
9; CHECK-NEXT: Machine Module Information
10; CHECK-NEXT: Target Transform Information
11; CHECK-NEXT: Assumption Cache Tracker
12; CHECK-NEXT: Profile summary info
13; CHECK-NEXT: Type-Based Alias Analysis
14; CHECK-NEXT: Scoped NoAlias Alias Analysis
15; CHECK-NEXT: Create Garbage Collector Module Metadata
16; CHECK-NEXT: Machine Branch Probability Analysis
17; CHECK-NEXT: Default Regalloc Eviction Advisor
18; CHECK-NEXT: Default Regalloc Priority Advisor
19; CHECK-NEXT:   ModulePass Manager
20; CHECK-NEXT:     Pre-ISel Intrinsic Lowering
21; CHECK-NEXT:     FunctionPass Manager
22; CHECK-NEXT:       Expand large div/rem
23; CHECK-NEXT:       Expand large fp convert
24; CHECK-NEXT:       Expand Atomic instructions
25; CHECK-NEXT:     SVE intrinsics optimizations
26; CHECK-NEXT:       FunctionPass Manager
27; CHECK-NEXT:         Dominator Tree Construction
28; CHECK-NEXT:     FunctionPass Manager
29; CHECK-NEXT:       Simplify the CFG
30; CHECK-NEXT:       Dominator Tree Construction
31; CHECK-NEXT:       Natural Loop Information
32; CHECK-NEXT:       Canonicalize natural loops
33; CHECK-NEXT:       Lazy Branch Probability Analysis
34; CHECK-NEXT:       Lazy Block Frequency Analysis
35; CHECK-NEXT:       Optimization Remark Emitter
36; CHECK-NEXT:       Scalar Evolution Analysis
37; CHECK-NEXT:       Loop Data Prefetch
38; CHECK-NEXT:       Falkor HW Prefetch Fix
39; CHECK-NEXT:       Module Verifier
40; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
41; CHECK-NEXT:       Canonicalize natural loops
42; CHECK-NEXT:       Loop Pass Manager
43; CHECK-NEXT:         Canonicalize Freeze Instructions in Loops
44; CHECK-NEXT:         Induction Variable Users
45; CHECK-NEXT:         Loop Strength Reduction
46; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
47; CHECK-NEXT:       Function Alias Analysis Results
48; CHECK-NEXT:       Merge contiguous icmps into a memcmp
49; CHECK-NEXT:       Natural Loop Information
50; CHECK-NEXT:       Lazy Branch Probability Analysis
51; CHECK-NEXT:       Lazy Block Frequency Analysis
52; CHECK-NEXT:       Expand memcmp() to load/stores
53; CHECK-NEXT:       Lower Garbage Collection Instructions
54; CHECK-NEXT:       Shadow Stack GC Lowering
55; CHECK-NEXT:       Remove unreachable blocks from the CFG
56; CHECK-NEXT:       Natural Loop Information
57; CHECK-NEXT:       Post-Dominator Tree Construction
58; CHECK-NEXT:       Branch Probability Analysis
59; CHECK-NEXT:       Block Frequency Analysis
60; CHECK-NEXT:       Constant Hoisting
61; CHECK-NEXT:       Replace intrinsics with calls to vector library
62; CHECK-NEXT:       Lazy Branch Probability Analysis
63; CHECK-NEXT:       Lazy Block Frequency Analysis
64; CHECK-NEXT:       Optimization Remark Emitter
65; CHECK-NEXT:       Partially inline calls to library functions
66; CHECK-NEXT:       Instrument function entry/exit with calls to e.g. mcount() (post inlining)
67; CHECK-NEXT:       Scalarize Masked Memory Intrinsics
68; CHECK-NEXT:       Expand reduction intrinsics
69; CHECK-NEXT:       Natural Loop Information
70; CHECK-NEXT:       Post-Dominator Tree Construction
71; CHECK-NEXT:       Branch Probability Analysis
72; CHECK-NEXT:       Block Frequency Analysis
73; CHECK-NEXT:       Lazy Branch Probability Analysis
74; CHECK-NEXT:       Lazy Block Frequency Analysis
75; CHECK-NEXT:       Optimization Remark Emitter
76; CHECK-NEXT:       Optimize selects
77; CHECK-NEXT:     Stack Safety Analysis
78; CHECK-NEXT:       FunctionPass Manager
79; CHECK-NEXT:         Dominator Tree Construction
80; CHECK-NEXT:         Natural Loop Information
81; CHECK-NEXT:         Scalar Evolution Analysis
82; CHECK-NEXT:         Stack Safety Local Analysis
83; CHECK-NEXT:     FunctionPass Manager
84; CHECK-NEXT:       Dominator Tree Construction
85; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
86; CHECK-NEXT:       Function Alias Analysis Results
87; CHECK-NEXT:       Natural Loop Information
88; CHECK-NEXT:       Lazy Branch Probability Analysis
89; CHECK-NEXT:       Lazy Block Frequency Analysis
90; CHECK-NEXT:       Optimization Remark Emitter
91; CHECK-NEXT:       AArch64 Stack Tagging
92; CHECK-NEXT:       Complex Deinterleaving Pass
93; CHECK-NEXT:       Function Alias Analysis Results
94; CHECK-NEXT:       Memory SSA
95; CHECK-NEXT:       Interleaved Load Combine Pass
96; CHECK-NEXT:       Dominator Tree Construction
97; CHECK-NEXT:       Interleaved Access Pass
98; CHECK-NEXT:       SME ABI Pass
99; CHECK-NEXT:       Dominator Tree Construction
100; CHECK-NEXT:       Natural Loop Information
101; CHECK-NEXT:       Type Promotion
102; CHECK-NEXT:       CodeGen Prepare
103; CHECK-NEXT:       Dominator Tree Construction
104; CHECK-NEXT:       Exception handling preparation
105; CHECK-NEXT:     AArch64 Promote Constant
106; CHECK-NEXT:       FunctionPass Manager
107; CHECK-NEXT:         Dominator Tree Construction
108; CHECK-NEXT:     FunctionPass Manager
109; CHECK-NEXT:       Merge internal globals
110; CHECK-NEXT:       Dominator Tree Construction
111; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
112; CHECK-NEXT:       Function Alias Analysis Results
113; CHECK-NEXT:       ObjC ARC contraction
114; CHECK-NEXT:       Prepare callbr
115; CHECK-NEXT:       Safe Stack instrumentation pass
116; CHECK-NEXT:       Insert stack protectors
117; CHECK-NEXT:       Module Verifier
118; CHECK-NEXT:       Basic Alias Analysis (stateless AA impl)
119; CHECK-NEXT:       Function Alias Analysis Results
120; CHECK-NEXT:       Natural Loop Information
121; CHECK-NEXT:       Post-Dominator Tree Construction
122; CHECK-NEXT:       Branch Probability Analysis
123; CHECK-NEXT:       Assignment Tracking Analysis
124; CHECK-NEXT:       Lazy Branch Probability Analysis
125; CHECK-NEXT:       Lazy Block Frequency Analysis
126; CHECK-NEXT:       AArch64 Instruction Selection
127; CHECK-NEXT:       MachineDominator Tree Construction
128; CHECK-NEXT:       AArch64 Local Dynamic TLS Access Clean-up
129; CHECK-NEXT:       Finalize ISel and expand pseudo-instructions
130; CHECK-NEXT:       SME Peephole Optimization pass
131; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
132; CHECK-NEXT:       Early Tail Duplication
133; CHECK-NEXT:       Optimize machine instruction PHIs
134; CHECK-NEXT:       Slot index numbering
135; CHECK-NEXT:       Merge disjoint stack slots
136; CHECK-NEXT:       Local Stack Slot Allocation
137; CHECK-NEXT:       Remove dead machine instructions
138; CHECK-NEXT:       MachineDominator Tree Construction
139; CHECK-NEXT:       AArch64 Condition Optimizer
140; CHECK-NEXT:       Machine Natural Loop Construction
141; CHECK-NEXT:       Machine Trace Metrics
142; CHECK-NEXT:       AArch64 Conditional Compares
143; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
144; CHECK-NEXT:       Machine InstCombiner
145; CHECK-NEXT:       AArch64 Conditional Branch Tuning
146; CHECK-NEXT:       Machine Trace Metrics
147; CHECK-NEXT:       Early If-Conversion
148; CHECK-NEXT:       AArch64 Store Pair Suppression
149; CHECK-NEXT:       AArch64 SIMD instructions optimization pass
150; CHECK-NEXT:       AArch64 Stack Tagging PreRA
151; CHECK-NEXT:       MachineDominator Tree Construction
152; CHECK-NEXT:       Machine Natural Loop Construction
153; CHECK-NEXT:       Machine Block Frequency Analysis
154; CHECK-NEXT:       Early Machine Loop Invariant Code Motion
155; CHECK-NEXT:       MachineDominator Tree Construction
156; CHECK-NEXT:       Machine Block Frequency Analysis
157; CHECK-NEXT:       Machine Common Subexpression Elimination
158; CHECK-NEXT:       MachinePostDominator Tree Construction
159; CHECK-NEXT:       Machine Cycle Info Analysis
160; CHECK-NEXT:       Machine code sinking
161; CHECK-NEXT:       Peephole Optimizations
162; CHECK-NEXT:       Remove dead machine instructions
163; CHECK-NEXT:       AArch64 MI Peephole Optimization pass
164; CHECK-NEXT:       AArch64 Dead register definitions
165; CHECK-NEXT:       Detect Dead Lanes
166; CHECK-NEXT:       Init Undef Pass
167; CHECK-NEXT:       Process Implicit Definitions
168; CHECK-NEXT:       Remove unreachable machine basic blocks
169; CHECK-NEXT:       Live Variable Analysis
170; CHECK-NEXT:       Eliminate PHI nodes for register allocation
171; CHECK-NEXT:       Two-Address instruction pass
172; CHECK-NEXT:       MachineDominator Tree Construction
173; CHECK-NEXT:       Slot index numbering
174; CHECK-NEXT:       Live Interval Analysis
175; CHECK-NEXT:       Register Coalescer
176; CHECK-NEXT:       Rename Disconnected Subregister Components
177; CHECK-NEXT:       Machine Instruction Scheduler
178; CHECK-NEXT:       AArch64 Post Coalescer pass
179; CHECK-NEXT:       Machine Block Frequency Analysis
180; CHECK-NEXT:       Debug Variable Analysis
181; CHECK-NEXT:       Live Stack Slot Analysis
182; CHECK-NEXT:       Virtual Register Map
183; CHECK-NEXT:       Live Register Matrix
184; CHECK-NEXT:       Bundle Machine CFG Edges
185; CHECK-NEXT:       Spill Code Placement Analysis
186; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
187; CHECK-NEXT:       Machine Optimization Remark Emitter
188; CHECK-NEXT:       Greedy Register Allocator
189; CHECK-NEXT:       Virtual Register Rewriter
190; CHECK-NEXT:       Register Allocation Pass Scoring
191; CHECK-NEXT:       Stack Slot Coloring
192; CHECK-NEXT:       Machine Copy Propagation Pass
193; CHECK-NEXT:       Machine Loop Invariant Code Motion
194; CHECK-NEXT:       AArch64 Redundant Copy Elimination
195; CHECK-NEXT:       A57 FP Anti-dependency breaker
196; CHECK-NEXT:       Remove Redundant DEBUG_VALUE analysis
197; CHECK-NEXT:       Fixup Statepoint Caller Saved
198; CHECK-NEXT:       PostRA Machine Sink
199; CHECK-NEXT:       MachineDominator Tree Construction
200; CHECK-NEXT:       Machine Natural Loop Construction
201; CHECK-NEXT:       Machine Block Frequency Analysis
202; CHECK-NEXT:       MachinePostDominator Tree Construction
203; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
204; CHECK-NEXT:       Machine Optimization Remark Emitter
205; CHECK-NEXT:       Shrink Wrapping analysis
206; CHECK-NEXT:       Prologue/Epilogue Insertion & Frame Finalization
207; CHECK-NEXT:       Machine Late Instructions Cleanup Pass
208; CHECK-NEXT:       Control Flow Optimizer
209; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
210; CHECK-NEXT:       Tail Duplication
211; CHECK-NEXT:       Machine Copy Propagation Pass
212; CHECK-NEXT:       Post-RA pseudo instruction expansion pass
213; CHECK-NEXT:       AArch64 pseudo instruction expansion pass
214; CHECK-NEXT:       AArch64 load / store optimization pass
215; CHECK-NEXT:       Insert KCFI indirect call checks
216; CHECK-NEXT:       AArch64 speculation hardening pass
217; CHECK-NEXT:       MachineDominator Tree Construction
218; CHECK-NEXT:       Machine Natural Loop Construction
219; CHECK-NEXT:       Falkor HW Prefetch Fix Late Phase
220; CHECK-NEXT:       PostRA Machine Instruction Scheduler
221; CHECK-NEXT:       Analyze Machine Code For Garbage Collection
222; CHECK-NEXT:       Machine Block Frequency Analysis
223; CHECK-NEXT:       MachinePostDominator Tree Construction
224; CHECK-NEXT:       Branch Probability Basic Block Placement
225; CHECK-NEXT:       Insert fentry calls
226; CHECK-NEXT:       Insert XRay ops
227; CHECK-NEXT:       Implement the 'patchable-function' attribute
228; CHECK-NEXT:       AArch64 load / store optimization pass
229; CHECK-NEXT:       Machine Copy Propagation Pass
230; CHECK-NEXT:       Workaround A53 erratum 835769 pass
231; CHECK-NEXT:       Contiguously Lay Out Funclets
232; CHECK-NEXT:       Remove Loads Into Fake Uses
233; CHECK-NEXT:       StackMap Liveness Analysis
234; CHECK-NEXT:       Live DEBUG_VALUE analysis
235; CHECK-NEXT:       Machine Sanitizer Binary Metadata
236; CHECK-NEXT:     Machine Outliner
237; CHECK-NEXT:     FunctionPass Manager
238; CHECK-NEXT:       AArch64 sls hardening pass
239; CHECK-NEXT:       AArch64 Pointer Authentication
240; CHECK-NEXT:       AArch64 Branch Targets
241; CHECK-NEXT:       Branch relaxation pass
242; CHECK-NEXT:       AArch64 Compress Jump Tables
243; CHECK-NEXT:       Insert CFI remember/restore state instructions
244; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
245; CHECK-NEXT:       Machine Optimization Remark Emitter
246; CHECK-NEXT:       Stack Frame Layout Analysis
247; CHECK-NEXT:       Unpack machine instruction bundles
248; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
249; CHECK-NEXT:       Machine Optimization Remark Emitter
250; CHECK-NEXT:       AArch64 Assembly Printer
251; CHECK-NEXT:       Free MachineFunction
252; CHECK-NEXT: Pass Arguments:  -domtree
253; CHECK-NEXT:   FunctionPass Manager
254; CHECK-NEXT:     Dominator Tree Construction
255; CHECK-NEXT: Pass Arguments:  -assumption-cache-tracker -targetlibinfo -domtree -loops -scalar-evolution -stack-safety-local
256; CHECK-NEXT: Assumption Cache Tracker
257; CHECK-NEXT: Target Library Information
258; CHECK-NEXT:   FunctionPass Manager
259; CHECK-NEXT:     Dominator Tree Construction
260; CHECK-NEXT:     Natural Loop Information
261; CHECK-NEXT:     Scalar Evolution Analysis
262; CHECK-NEXT:     Stack Safety Local Analysis
263; CHECK-NEXT: Pass Arguments:  -domtree
264; CHECK-NEXT:   FunctionPass Manager
265; CHECK-NEXT:     Dominator Tree Construction
266
267define void @f() {
268  ret void
269}
270