xref: /llvm-project/llvm/test/Analysis/DemandedBits/vectors.ll (revision 38fffa630ee80163dc65e759392ad29798905679) 
1; RUN: opt -S -disable-output -passes="print<demanded-bits>" < %s 2>&1 | FileCheck %s
2
3; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_basic':
4; CHECK-DAG: DemandedBits: 0xff00 for   %x = or <2 x i32> %a, zeroinitializer
5; CHECK-DAG: DemandedBits: 0xff00 for   %y = or <2 x i32> %b, zeroinitializer
6; CHECK-DAG: DemandedBits: 0xff00 for   %z = or <2 x i32> %x, %y
7; CHECK-DAG: DemandedBits: 0xff for   %u = lshr <2 x i32> %z, splat (i32 8)
8; CHECK-DAG: DemandedBits: 0xff for   %r = trunc <2 x i32> %u to <2 x i8>
9define <2 x i8> @test_basic(<2 x i32> %a, <2 x i32> %b) {
10  %x = or <2 x i32> %a, zeroinitializer
11  %y = or <2 x i32> %b, zeroinitializer
12  %z = or <2 x i32> %x, %y
13  %u = lshr <2 x i32> %z, <i32 8, i32 8>
14  %r = trunc <2 x i32> %u to <2 x i8>
15  ret <2 x i8> %r
16}
17
18; Vector-specific instructions
19
20; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_extractelement':
21; CHECK-DAG: DemandedBits: 0xff for   %x = or <2 x i32> %a, zeroinitializer
22; CHECK-DAG: DemandedBits: 0xf0 for   %z = extractelement <2 x i32> %x, i32 1
23; CHECK-DAG: DemandedBits: 0xf for   %y = extractelement <2 x i32> %x, i32 0
24; CHECK-DAG: DemandedBits: 0xffffffff for   %u = and i32 %y, 15
25; CHECK-DAG: DemandedBits: 0xffffffff for   %v = and i32 %z, 240
26; CHECK-DAG: DemandedBits: 0xffffffff for   %r = or i32 %u, %v
27define i32 @test_extractelement(<2 x i32> %a) {
28  %x = or <2 x i32> %a, zeroinitializer
29  %y = extractelement <2 x i32> %x, i32 0
30  %z = extractelement <2 x i32> %x, i32 1
31  %u = and i32 %y, 15
32  %v = and i32 %z, 240
33  %r = or i32 %u, %v
34  ret i32 %r
35}
36
37; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_insertelement':
38; CHECK-DAG: DemandedBits: 0xff for   %x = or i32 %a, 0
39; CHECK-DAG: DemandedBits: 0xff for   %y = or i32 %b, 0
40; CHECK-DAG: DemandedBits: 0xff for   %z = insertelement <2 x i32> undef, i32 %x, i32 0
41; CHECK-DAG: DemandedBits: 0xff for   %u = insertelement <2 x i32> %z, i32 %y, i32 1
42; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <2 x i32> %u, <i32 255, i32 127>
43define <2 x i32> @test_insertelement(i32 %a, i32 %b) {
44  %x = or i32 %a, 0
45  %y = or i32 %b, 0
46  %z = insertelement <2 x i32> undef, i32 %x, i32 0
47  %u = insertelement <2 x i32> %z, i32 %y, i32 1
48  %r = and <2 x i32> %u, <i32 255, i32 127>
49  ret <2 x i32> %r
50}
51
52; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_shufflevector':
53; CHECK-DAG: DemandedBits: 0xff for   %x = or <2 x i32> %a, zeroinitializer
54; CHECK-DAG: DemandedBits: 0xff for   %y = or <2 x i32> %b, zeroinitializer
55; CHECK-DAG: DemandedBits: 0xff for   %z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
56; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <3 x i32> %z, <i32 255, i32 127, i32 0>
57define <3 x i32> @test_shufflevector(<2 x i32> %a, <2 x i32> %b) {
58  %x = or <2 x i32> %a, zeroinitializer
59  %y = or <2 x i32> %b, zeroinitializer
60  %z = shufflevector <2 x i32> %x, <2 x i32> %y, <3 x i32> <i32 0, i32 3, i32 1>
61  %r = and <3 x i32> %z, <i32 255, i32 127, i32 0>
62  ret <3 x i32> %r
63}
64
65; Shifts with splat shift amounts
66
67; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_shl':
68; CHECK-DAG: DemandedBits: 0xf for   %x = or <2 x i32> %a, zeroinitializer
69; CHECK-DAG: DemandedBits: 0xf0 for   %y = shl <2 x i32> %x, splat (i32 4)
70; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <2 x i32> %y, splat (i32 240)
71define <2 x i32> @test_shl(<2 x i32> %a) {
72  %x = or <2 x i32> %a, zeroinitializer
73  %y = shl <2 x i32> %x, <i32 4, i32 4>
74  %r = and <2 x i32> %y, <i32 240, i32 240>
75  ret <2 x i32> %r
76}
77
78; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_ashr':
79; CHECK-DAG: DemandedBits: 0xf00 for   %x = or <2 x i32> %a, zeroinitializer
80; CHECK-DAG: DemandedBits: 0xf0 for   %y = ashr <2 x i32> %x, splat (i32 4)
81; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <2 x i32> %y, splat (i32 240)
82define <2 x i32> @test_ashr(<2 x i32> %a) {
83  %x = or <2 x i32> %a, zeroinitializer
84  %y = ashr <2 x i32> %x, <i32 4, i32 4>
85  %r = and <2 x i32> %y, <i32 240, i32 240>
86  ret <2 x i32> %r
87}
88
89; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_lshr':
90; CHECK-DAG: DemandedBits: 0xf00 for   %x = or <2 x i32> %a, zeroinitializer
91; CHECK-DAG: DemandedBits: 0xf0 for   %y = lshr <2 x i32> %x, splat (i32 4)
92; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <2 x i32> %y, splat (i32 240)
93define <2 x i32> @test_lshr(<2 x i32> %a) {
94  %x = or <2 x i32> %a, zeroinitializer
95  %y = lshr <2 x i32> %x, <i32 4, i32 4>
96  %r = and <2 x i32> %y, <i32 240, i32 240>
97  ret <2 x i32> %r
98}
99
100declare <2 x i32> @llvm.fshl.i32(<2 x i32>, <2 x i32>, <2 x i32>)
101declare <2 x i32> @llvm.fshr.i32(<2 x i32>, <2 x i32>, <2 x i32>)
102
103; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshl':
104; CHECK-DAG: DemandedBits: 0xf for   %x = or <2 x i32> %a, zeroinitializer
105; CHECK-DAG: DemandedBits: 0xf0000000 for   %y = or <2 x i32> %b, zeroinitializer
106; CHECK-DAG: DemandedBits: 0xff for   %z = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> splat (i32 4))
107; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <2 x i32> %z, splat (i32 255)
108define <2 x i32> @test_fshl(<2 x i32> %a, <2 x i32> %b) {
109  %x = or <2 x i32> %a, zeroinitializer
110  %y = or <2 x i32> %b, zeroinitializer
111  %z = call <2 x i32> @llvm.fshl.i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 4, i32 4>)
112  %r = and <2 x i32> %z, <i32 255, i32 255>
113  ret <2 x i32> %r
114}
115
116; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fshr':
117; CHECK-DAG: DemandedBits: 0xf for   %x = or <2 x i32> %a, zeroinitializer
118; CHECK-DAG: DemandedBits: 0xf0000000 for   %y = or <2 x i32> %b, zeroinitializer
119; CHECK-DAG: DemandedBits: 0xff for   %z = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> splat (i32 28))
120; CHECK-DAG: DemandedBits: 0xffffffff for   %r = and <2 x i32> %z, splat (i32 255)
121define <2 x i32> @test_fshr(<2 x i32> %a, <2 x i32> %b) {
122  %x = or <2 x i32> %a, zeroinitializer
123  %y = or <2 x i32> %b, zeroinitializer
124  %z = call <2 x i32> @llvm.fshr.i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 28, i32 28>)
125  %r = and <2 x i32> %z, <i32 255, i32 255>
126  ret <2 x i32> %r
127}
128
129; FP / Int conversion. These have different input / output types.
130
131; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_uitofp':
132; CHECK-DAG: DemandedBits: 0xffffffff for   %x = or <2 x i32> %a, zeroinitializer
133define <2 x float> @test_uitofp(<2 x i32> %a) {
134  %x = or <2 x i32> %a, zeroinitializer
135  %r = uitofp <2 x i32> %x to <2 x float>
136  ret <2 x float> %r
137}
138
139; CHECK-LABEL: Printing analysis 'Demanded Bits Analysis' for function 'test_fptoui':
140; CHECK-DAG: DemandedBits: 0xffffffff for   %y = fptoui <2 x float> %x to <2 x i32>
141define <2 x i32> @test_fptoui(<2 x float> %a) {
142  %x = fadd <2 x float> %a, <float 1.0, float 1.0>
143  %y = fptoui <2 x float> %x to <2 x i32>
144  %r = and <2 x i32> %y, <i32 255, i32 255>
145  ret <2 x i32> %y
146}
147