1; RUN: opt -S -disable-output -passes="print<dxil-resource-binding>" < %s 2>&1 | FileCheck %s 2 3@G = external constant <4 x float>, align 4 4 5define void @test_typedbuffer() { 6 ; ByteAddressBuffer Buf : register(t8, space1) 7 %srv0 = call target("dx.RawBuffer", void, 0, 0) 8 @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i8_0_0t( 9 i32 1, i32 8, i32 1, i32 0, i1 false) 10 ; CHECK: Binding [[SRV0:[0-9]+]]: 11 ; CHECK: Binding: 12 ; CHECK: Record ID: 0 13 ; CHECK: Space: 1 14 ; CHECK: Lower Bound: 8 15 ; CHECK: Size: 1 16 ; CHECK: Class: SRV 17 ; CHECK: Kind: RawBuffer 18 19 ; struct S { float4 a; uint4 b; }; 20 ; StructuredBuffer<S> Buf : register(t2, space4) 21 %srv1 = call target("dx.RawBuffer", {<4 x float>, <4 x i32>}, 0, 0) 22 @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_sl_v4f32v4i32s_0_0t( 23 i32 4, i32 2, i32 1, i32 0, i1 false) 24 ; CHECK: Binding [[SRV1:[0-9]+]]: 25 ; CHECK: Binding: 26 ; CHECK: Record ID: 1 27 ; CHECK: Space: 4 28 ; CHECK: Lower Bound: 2 29 ; CHECK: Size: 1 30 ; CHECK: Class: SRV 31 ; CHECK: Kind: StructuredBuffer 32 ; CHECK: Buffer Stride: 32 33 ; CHECK: Alignment: 4 34 35 ; Buffer<uint4> Buf[24] : register(t3, space5) 36 %srv2 = call target("dx.TypedBuffer", <4 x i32>, 0, 0, 0) 37 @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_0_0t( 38 i32 5, i32 3, i32 24, i32 0, i1 false) 39 ; CHECK: Binding [[SRV2:[0-9]+]]: 40 ; CHECK: Binding: 41 ; CHECK: Record ID: 2 42 ; CHECK: Space: 5 43 ; CHECK: Lower Bound: 3 44 ; CHECK: Size: 24 45 ; CHECK: Class: SRV 46 ; CHECK: Kind: TypedBuffer 47 ; CHECK: Element Type: u32 48 ; CHECK: Element Count: 4 49 50 ; RWBuffer<int> Buf : register(u7, space2) 51 %uav0 = call target("dx.TypedBuffer", i32, 1, 0, 1) 52 @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i32_1_0t( 53 i32 2, i32 7, i32 1, i32 0, i1 false) 54 ; CHECK: Binding [[UAV0:[0-9]+]]: 55 ; CHECK: Binding: 56 ; CHECK: Record ID: 0 57 ; CHECK: Space: 2 58 ; CHECK: Lower Bound: 7 59 ; CHECK: Size: 1 60 ; CHECK: Class: UAV 61 ; CHECK: Kind: TypedBuffer 62 ; CHECK: Globally Coherent: 0 63 ; CHECK: HasCounter: 0 64 ; CHECK: IsROV: 0 65 ; CHECK: Element Type: i32 66 ; CHECK: Element Count: 1 67 68 ; RWBuffer<float4> Buf : register(u5, space3) 69 %uav1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) 70 @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( 71 i32 3, i32 5, i32 1, i32 0, i1 false) 72 ; CHECK: Binding [[UAV1:[0-9]+]]: 73 ; CHECK: Binding: 74 ; CHECK: Record ID: 1 75 ; CHECK: Space: 3 76 ; CHECK: Lower Bound: 5 77 ; CHECK: Size: 1 78 ; CHECK: Class: UAV 79 ; CHECK: Kind: TypedBuffer 80 ; CHECK: Globally Coherent: 0 81 ; CHECK: HasCounter: 0 82 ; CHECK: IsROV: 0 83 ; CHECK: Element Type: f32 84 ; CHECK: Element Count: 4 85 86 ; RWBuffer<float4> BufferArray[10] : register(u0, space4) 87 ; RWBuffer<float4> Buf = BufferArray[0] 88 %uav2_1 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) 89 @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( 90 i32 4, i32 0, i32 10, i32 0, i1 false) 91 ; RWBuffer<float4> Buf = BufferArray[5] 92 %uav2_2 = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) 93 @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0( 94 i32 4, i32 0, i32 10, i32 5, i1 false) 95 ; CHECK: Binding [[UAV2:[0-9]+]]: 96 ; CHECK: Binding: 97 ; CHECK: Record ID: 2 98 ; CHECK: Space: 4 99 ; CHECK: Lower Bound: 0 100 ; CHECK: Size: 10 101 ; CHECK: Class: UAV 102 ; CHECK: Kind: TypedBuffer 103 ; CHECK: Globally Coherent: 0 104 ; CHECK: HasCounter: 0 105 ; CHECK: IsROV: 0 106 ; CHECK: Element Type: f32 107 ; CHECK: Element Count: 4 108 109 ; CHECK-NOT: Binding {{[0-9]+}}: 110 111 ret void 112} 113 114; CHECK-DAG: Call bound to [[SRV0]]: %srv0 = 115; CHECK-DAG: Call bound to [[SRV1]]: %srv1 = 116; CHECK-DAG: Call bound to [[SRV2]]: %srv2 = 117; CHECK-DAG: Call bound to [[UAV0]]: %uav0 = 118; CHECK-DAG: Call bound to [[UAV1]]: %uav1 = 119; CHECK-DAG: Call bound to [[UAV2]]: %uav2_1 = 120; CHECK-DAG: Call bound to [[UAV2]]: %uav2_2 = 121 122attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) } 123