xref: /llvm-project/llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll (revision 38fffa630ee80163dc65e759392ad29798905679) 
1; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefixes=ALL,NOFP16,CIFASTF64 %s
3; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefixes=ALL,NOFP16,CISLOWF64 %s
4; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=ALL,NOFP16,SIFASTF64 %s
5; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=verde < %s | FileCheck -check-prefixes=ALL,NOFP16,SISLOWF64 %s
6; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=ALL,FP16 %s
7
8; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,CI-SIZE %s
9; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,CI-SIZE %s
10; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,SI-SIZE %s
11; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-mesa-mesa3d -mcpu=verde < %s | FileCheck -check-prefixes=ALL-SIZE,NOFP16-SIZE,SI-SIZE %s
12; RUN: opt -passes="print<cost-model>" -cost-kind=code-size 2>&1 -disable-output -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=ALL-SIZE,FP16-SIZE %s
13; END.
14
15define amdgpu_kernel void @fdiv_f32_ieee() #0 {
16; ALL-LABEL: 'fdiv_f32_ieee'
17; ALL-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float undef, undef
18; ALL-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> undef, undef
19; ALL-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> undef, undef
20; ALL-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> undef, undef
21; ALL-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> undef, undef
22; ALL-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v8f32 = fdiv <8 x float> undef, undef
23; ALL-NEXT:  Cost Model: Found an estimated cost of 378 for instruction: %v9f32 = fdiv <9 x float> undef, undef
24; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
25;
26; ALL-SIZE-LABEL: 'fdiv_f32_ieee'
27; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float undef, undef
28; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> undef, undef
29; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> undef, undef
30; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> undef, undef
31; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> undef, undef
32; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v8f32 = fdiv <8 x float> undef, undef
33; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 324 for instruction: %v9f32 = fdiv <9 x float> undef, undef
34; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
35;
36  %f32 = fdiv float undef, undef
37  %v2f32 = fdiv <2 x float> undef, undef
38  %v3f32 = fdiv <3 x float> undef, undef
39  %v4f32 = fdiv <4 x float> undef, undef
40  %v5f32 = fdiv <5 x float> undef, undef
41  %v8f32 = fdiv <8 x float> undef, undef
42  %v9f32 = fdiv <9 x float> undef, undef
43  ret void
44}
45
46define amdgpu_kernel void @fdiv_f32_afn_ieee() #0 {
47; ALL-LABEL: 'fdiv_f32_afn_ieee'
48; ALL-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %f32 = fdiv afn float undef, undef
49; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
50; ALL-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
51; ALL-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
52; ALL-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
53; ALL-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
54; ALL-NEXT:  Cost Model: Found an estimated cost of 135 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
55; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
56;
57; ALL-SIZE-LABEL: 'fdiv_f32_afn_ieee'
58; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %f32 = fdiv afn float undef, undef
59; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
60; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
61; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
62; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
63; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
64; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 81 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
65; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
66;
67  %f32 = fdiv afn float undef, undef
68  %v2f32 = fdiv afn <2 x float> undef, undef
69  %v3f32 = fdiv afn <3 x float> undef, undef
70  %v4f32 = fdiv afn <4 x float> undef, undef
71  %v5f32 = fdiv afn <5 x float> undef, undef
72  %v8f32 = fdiv afn <8 x float> undef, undef
73  %v9f32 = fdiv afn <9 x float> undef, undef
74  ret void
75}
76
77define amdgpu_kernel void @fdiv_f32_ftzdaz() #1 {
78; ALL-LABEL: 'fdiv_f32_ftzdaz'
79; ALL-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %f32 = fdiv float undef, undef
80; ALL-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v2f32 = fdiv <2 x float> undef, undef
81; ALL-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v3f32 = fdiv <3 x float> undef, undef
82; ALL-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %v4f32 = fdiv <4 x float> undef, undef
83; ALL-NEXT:  Cost Model: Found an estimated cost of 80 for instruction: %v5f32 = fdiv <5 x float> undef, undef
84; ALL-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %v8f32 = fdiv <8 x float> undef, undef
85; ALL-NEXT:  Cost Model: Found an estimated cost of 432 for instruction: %v9f32 = fdiv <9 x float> undef, undef
86; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
87;
88; ALL-SIZE-LABEL: 'fdiv_f32_ftzdaz'
89; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float undef, undef
90; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> undef, undef
91; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> undef, undef
92; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> undef, undef
93; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> undef, undef
94; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v8f32 = fdiv <8 x float> undef, undef
95; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 378 for instruction: %v9f32 = fdiv <9 x float> undef, undef
96; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
97;
98  %f32 = fdiv float undef, undef
99  %v2f32 = fdiv <2 x float> undef, undef
100  %v3f32 = fdiv <3 x float> undef, undef
101  %v4f32 = fdiv <4 x float> undef, undef
102  %v5f32 = fdiv <5 x float> undef, undef
103  %v8f32 = fdiv <8 x float> undef, undef
104  %v9f32 = fdiv <9 x float> undef, undef
105  ret void
106}
107
108define amdgpu_kernel void @fdiv_f32_afn_ftzdaz() #1 {
109; ALL-LABEL: 'fdiv_f32_afn_ftzdaz'
110; ALL-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %f32 = fdiv afn float undef, undef
111; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
112; ALL-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
113; ALL-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
114; ALL-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
115; ALL-NEXT:  Cost Model: Found an estimated cost of 40 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
116; ALL-NEXT:  Cost Model: Found an estimated cost of 135 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
117; ALL-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
118;
119; ALL-SIZE-LABEL: 'fdiv_f32_afn_ftzdaz'
120; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %f32 = fdiv afn float undef, undef
121; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v2f32 = fdiv afn <2 x float> undef, undef
122; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 9 for instruction: %v3f32 = fdiv afn <3 x float> undef, undef
123; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v4f32 = fdiv afn <4 x float> undef, undef
124; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 15 for instruction: %v5f32 = fdiv afn <5 x float> undef, undef
125; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v8f32 = fdiv afn <8 x float> undef, undef
126; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 81 for instruction: %v9f32 = fdiv afn <9 x float> undef, undef
127; ALL-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
128;
129  %f32 = fdiv afn float undef, undef
130  %v2f32 = fdiv afn <2 x float> undef, undef
131  %v3f32 = fdiv afn <3 x float> undef, undef
132  %v4f32 = fdiv afn <4 x float> undef, undef
133  %v5f32 = fdiv afn <5 x float> undef, undef
134  %v8f32 = fdiv afn <8 x float> undef, undef
135  %v9f32 = fdiv afn <9 x float> undef, undef
136  ret void
137}
138
139define amdgpu_kernel void @fdiv_f64() #0 {
140; CIFASTF64-LABEL: 'fdiv_f64'
141; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %f64 = fdiv double undef, undef
142; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v2f64 = fdiv <2 x double> undef, undef
143; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %v3f64 = fdiv <3 x double> undef, undef
144; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v4f64 = fdiv <4 x double> undef, undef
145; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %v5f64 = fdiv <5 x double> undef, undef
146; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
147;
148; CISLOWF64-LABEL: 'fdiv_f64'
149; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double undef, undef
150; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> undef, undef
151; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> undef, undef
152; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> undef, undef
153; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> undef, undef
154; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
155;
156; SIFASTF64-LABEL: 'fdiv_f64'
157; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 27 for instruction: %f64 = fdiv double undef, undef
158; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 54 for instruction: %v2f64 = fdiv <2 x double> undef, undef
159; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 81 for instruction: %v3f64 = fdiv <3 x double> undef, undef
160; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 108 for instruction: %v4f64 = fdiv <4 x double> undef, undef
161; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 648 for instruction: %v5f64 = fdiv <5 x double> undef, undef
162; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
163;
164; SISLOWF64-LABEL: 'fdiv_f64'
165; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 41 for instruction: %f64 = fdiv double undef, undef
166; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 82 for instruction: %v2f64 = fdiv <2 x double> undef, undef
167; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 123 for instruction: %v3f64 = fdiv <3 x double> undef, undef
168; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 164 for instruction: %v4f64 = fdiv <4 x double> undef, undef
169; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 984 for instruction: %v5f64 = fdiv <5 x double> undef, undef
170; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
171;
172; FP16-LABEL: 'fdiv_f64'
173; FP16-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double undef, undef
174; FP16-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> undef, undef
175; FP16-NEXT:  Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> undef, undef
176; FP16-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> undef, undef
177; FP16-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> undef, undef
178; FP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
179;
180; CI-SIZE-LABEL: 'fdiv_f64'
181; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double undef, undef
182; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> undef, undef
183; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> undef, undef
184; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> undef, undef
185; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> undef, undef
186; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
187;
188; SI-SIZE-LABEL: 'fdiv_f64'
189; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %f64 = fdiv double undef, undef
190; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %v2f64 = fdiv <2 x double> undef, undef
191; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 75 for instruction: %v3f64 = fdiv <3 x double> undef, undef
192; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %v4f64 = fdiv <4 x double> undef, undef
193; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 600 for instruction: %v5f64 = fdiv <5 x double> undef, undef
194; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
195;
196; FP16-SIZE-LABEL: 'fdiv_f64'
197; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double undef, undef
198; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> undef, undef
199; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> undef, undef
200; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> undef, undef
201; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> undef, undef
202; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
203;
204  %f64 = fdiv double undef, undef
205  %v2f64 = fdiv <2 x double> undef, undef
206  %v3f64 = fdiv <3 x double> undef, undef
207  %v4f64 = fdiv <4 x double> undef, undef
208  %v5f64 = fdiv <5 x double> undef, undef
209  ret void
210}
211
212define amdgpu_kernel void @fdiv_f16_f32ieee() #0 {
213; NOFP16-LABEL: 'fdiv_f16_f32ieee'
214; NOFP16-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half undef, undef
215; NOFP16-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> undef, undef
216; NOFP16-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> undef, undef
217; NOFP16-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> undef, undef
218; NOFP16-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> undef, undef
219; NOFP16-NEXT:  Cost Model: Found an estimated cost of 224 for instruction: %v16f16 = fdiv <16 x half> undef, undef
220; NOFP16-NEXT:  Cost Model: Found an estimated cost of 476 for instruction: %v17f16 = fdiv <17 x half> undef, undef
221; NOFP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
222;
223; FP16-LABEL: 'fdiv_f16_f32ieee'
224; FP16-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half undef, undef
225; FP16-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> undef, undef
226; FP16-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> undef, undef
227; FP16-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> undef, undef
228; FP16-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> undef, undef
229; FP16-NEXT:  Cost Model: Found an estimated cost of 192 for instruction: %v16f16 = fdiv <16 x half> undef, undef
230; FP16-NEXT:  Cost Model: Found an estimated cost of 1152 for instruction: %v17f16 = fdiv <17 x half> undef, undef
231; FP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
232;
233; NOFP16-SIZE-LABEL: 'fdiv_f16_f32ieee'
234; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half undef, undef
235; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> undef, undef
236; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> undef, undef
237; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> undef, undef
238; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> undef, undef
239; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 192 for instruction: %v16f16 = fdiv <16 x half> undef, undef
240; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 408 for instruction: %v17f16 = fdiv <17 x half> undef, undef
241; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
242;
243; FP16-SIZE-LABEL: 'fdiv_f16_f32ieee'
244; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %f16 = fdiv half undef, undef
245; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v2f16 = fdiv <2 x half> undef, undef
246; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v3f16 = fdiv <3 x half> undef, undef
247; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v4f16 = fdiv <4 x half> undef, undef
248; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %v5f16 = fdiv <5 x half> undef, undef
249; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %v16f16 = fdiv <16 x half> undef, undef
250; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 768 for instruction: %v17f16 = fdiv <17 x half> undef, undef
251; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
252;
253  %f16 = fdiv half undef, undef
254  %v2f16 = fdiv <2 x half> undef, undef
255  %v3f16 = fdiv <3 x half> undef, undef
256  %v4f16 = fdiv <4 x half> undef, undef
257  %v5f16 = fdiv <5 x half> undef, undef
258  %v16f16 = fdiv <16 x half> undef, undef
259  %v17f16 = fdiv <17 x half> undef, undef
260  ret void
261}
262
263define amdgpu_kernel void @fdiv_f16_f32ftzdaz() #1 {
264; NOFP16-LABEL: 'fdiv_f16_f32ftzdaz'
265; NOFP16-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %f16 = fdiv half undef, undef
266; NOFP16-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v2f16 = fdiv <2 x half> undef, undef
267; NOFP16-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %v3f16 = fdiv <3 x half> undef, undef
268; NOFP16-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %v4f16 = fdiv <4 x half> undef, undef
269; NOFP16-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %v5f16 = fdiv <5 x half> undef, undef
270; NOFP16-NEXT:  Cost Model: Found an estimated cost of 256 for instruction: %v16f16 = fdiv <16 x half> undef, undef
271; NOFP16-NEXT:  Cost Model: Found an estimated cost of 544 for instruction: %v17f16 = fdiv <17 x half> undef, undef
272; NOFP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
273;
274; FP16-LABEL: 'fdiv_f16_f32ftzdaz'
275; FP16-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half undef, undef
276; FP16-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> undef, undef
277; FP16-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> undef, undef
278; FP16-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> undef, undef
279; FP16-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> undef, undef
280; FP16-NEXT:  Cost Model: Found an estimated cost of 192 for instruction: %v16f16 = fdiv <16 x half> undef, undef
281; FP16-NEXT:  Cost Model: Found an estimated cost of 1152 for instruction: %v17f16 = fdiv <17 x half> undef, undef
282; FP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
283;
284; NOFP16-SIZE-LABEL: 'fdiv_f16_f32ftzdaz'
285; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half undef, undef
286; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> undef, undef
287; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> undef, undef
288; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> undef, undef
289; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> undef, undef
290; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 224 for instruction: %v16f16 = fdiv <16 x half> undef, undef
291; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 476 for instruction: %v17f16 = fdiv <17 x half> undef, undef
292; NOFP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
293;
294; FP16-SIZE-LABEL: 'fdiv_f16_f32ftzdaz'
295; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %f16 = fdiv half undef, undef
296; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v2f16 = fdiv <2 x half> undef, undef
297; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v3f16 = fdiv <3 x half> undef, undef
298; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v4f16 = fdiv <4 x half> undef, undef
299; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %v5f16 = fdiv <5 x half> undef, undef
300; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %v16f16 = fdiv <16 x half> undef, undef
301; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 768 for instruction: %v17f16 = fdiv <17 x half> undef, undef
302; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
303;
304  %f16 = fdiv half undef, undef
305  %v2f16 = fdiv <2 x half> undef, undef
306  %v3f16 = fdiv <3 x half> undef, undef
307  %v4f16 = fdiv <4 x half> undef, undef
308  %v5f16 = fdiv <5 x half> undef, undef
309  %v16f16 = fdiv <16 x half> undef, undef
310  %v17f16 = fdiv <17 x half> undef, undef
311  ret void
312}
313
314define amdgpu_kernel void @rcp_ieee() #0 {
315; CIFASTF64-LABEL: 'rcp_ieee'
316; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
317; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
318; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
319; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
320; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
321; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
322; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
323; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
324; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
325; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
326; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %f64 = fdiv double 1.000000e+00, undef
327; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
328; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
329; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
330; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
331; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
332;
333; CISLOWF64-LABEL: 'rcp_ieee'
334; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
335; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
336; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
337; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
338; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
339; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
340; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
341; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
342; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
343; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
344; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
345; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
346; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
347; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
348; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
349; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
350;
351; SIFASTF64-LABEL: 'rcp_ieee'
352; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
353; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
354; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
355; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
356; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
357; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
358; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
359; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
360; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
361; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
362; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 27 for instruction: %f64 = fdiv double 1.000000e+00, undef
363; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 54 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
364; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 81 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
365; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 108 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
366; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 648 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
367; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
368;
369; SISLOWF64-LABEL: 'rcp_ieee'
370; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f16 = fdiv half 0xH3C00, undef
371; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
372; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
373; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
374; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
375; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
376; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
377; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
378; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
379; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
380; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 41 for instruction: %f64 = fdiv double 1.000000e+00, undef
381; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 82 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
382; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 123 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
383; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 164 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
384; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 984 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
385; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
386;
387; FP16-LABEL: 'rcp_ieee'
388; FP16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
389; FP16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
390; FP16-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
391; FP16-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
392; FP16-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
393; FP16-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %f32 = fdiv float 1.000000e+00, undef
394; FP16-NEXT:  Cost Model: Found an estimated cost of 28 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
395; FP16-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
396; FP16-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
397; FP16-NEXT:  Cost Model: Found an estimated cost of 70 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
398; FP16-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
399; FP16-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
400; FP16-NEXT:  Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
401; FP16-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
402; FP16-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
403; FP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
404;
405; CI-SIZE-LABEL: 'rcp_ieee'
406; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half 0xH3C00, undef
407; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
408; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
409; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
410; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
411; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float 1.000000e+00, undef
412; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
413; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
414; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
415; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
416; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
417; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
418; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
419; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
420; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
421; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
422;
423; SI-SIZE-LABEL: 'rcp_ieee'
424; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f16 = fdiv half 0xH3C00, undef
425; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
426; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
427; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
428; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
429; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float 1.000000e+00, undef
430; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
431; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
432; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
433; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
434; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %f64 = fdiv double 1.000000e+00, undef
435; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
436; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 75 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
437; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
438; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 600 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
439; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
440;
441; FP16-SIZE-LABEL: 'rcp_ieee'
442; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
443; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
444; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
445; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
446; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
447; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %f32 = fdiv float 1.000000e+00, undef
448; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
449; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 36 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
450; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
451; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 60 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
452; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
453; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
454; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
455; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
456; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
457; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
458;
459  %f16 = fdiv half 1.0, undef
460  %v2f16 = fdiv <2 x half> <half 1.0, half 1.0>, undef
461  %v3f16 = fdiv <3 x half> <half 1.0, half 1.0, half 1.0>, undef
462  %v4f16 = fdiv <4 x half> <half 1.0, half 1.0, half 1.0, half 1.0>, undef
463  %v5f16 = fdiv <5 x half> <half 1.0, half 1.0, half 1.0, half 1.0, half 1.0>, undef
464  %f32 = fdiv float 1.0, undef
465  %v2f32 = fdiv <2 x float> <float 1.0, float 1.0>, undef
466  %v3f32 = fdiv <3 x float> <float 1.0, float 1.0, float 1.0>, undef
467  %v4f32 = fdiv <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, undef
468  %v5f32 = fdiv <5 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, undef
469  %f64 = fdiv double 1.0, undef
470  %v2f64 = fdiv <2 x double> <double 1.0, double 1.0>, undef
471  %v3f64 = fdiv <3 x double> <double 1.0, double 1.0, double 1.0>, undef
472  %v4f64 = fdiv <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, undef
473  %v5f64 = fdiv <5 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, undef
474  ret void
475}
476
477define amdgpu_kernel void @rcp_ftzdaz() #1 {
478; CIFASTF64-LABEL: 'rcp_ftzdaz'
479; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
480; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
481; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
482; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
483; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
484; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
485; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
486; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
487; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
488; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
489; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %f64 = fdiv double 1.000000e+00, undef
490; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
491; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 72 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
492; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
493; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
494; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
495;
496; CISLOWF64-LABEL: 'rcp_ftzdaz'
497; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
498; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
499; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
500; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
501; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
502; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
503; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
504; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
505; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
506; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
507; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
508; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
509; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
510; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
511; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
512; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
513;
514; SIFASTF64-LABEL: 'rcp_ftzdaz'
515; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
516; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
517; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
518; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
519; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
520; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
521; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
522; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
523; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
524; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
525; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 27 for instruction: %f64 = fdiv double 1.000000e+00, undef
526; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 54 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
527; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 81 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
528; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 108 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
529; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 648 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
530; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
531;
532; SISLOWF64-LABEL: 'rcp_ftzdaz'
533; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
534; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
535; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
536; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
537; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
538; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
539; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
540; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
541; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
542; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
543; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 41 for instruction: %f64 = fdiv double 1.000000e+00, undef
544; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 82 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
545; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 123 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
546; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 164 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
547; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 984 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
548; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
549;
550; FP16-LABEL: 'rcp_ftzdaz'
551; FP16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f16 = fdiv half 0xH3C00, undef
552; FP16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
553; FP16-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
554; FP16-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
555; FP16-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
556; FP16-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %f32 = fdiv float 1.000000e+00, undef
557; FP16-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
558; FP16-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
559; FP16-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
560; FP16-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
561; FP16-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %f64 = fdiv double 1.000000e+00, undef
562; FP16-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
563; FP16-NEXT:  Cost Model: Found an estimated cost of 114 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
564; FP16-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
565; FP16-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
566; FP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret void
567;
568; CI-SIZE-LABEL: 'rcp_ftzdaz'
569; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
570; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
571; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
572; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
573; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
574; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f32 = fdiv float 1.000000e+00, undef
575; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
576; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
577; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
578; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
579; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
580; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
581; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
582; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
583; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
584; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
585;
586; SI-SIZE-LABEL: 'rcp_ftzdaz'
587; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
588; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
589; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
590; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
591; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
592; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f32 = fdiv float 1.000000e+00, undef
593; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
594; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
595; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
596; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
597; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %f64 = fdiv double 1.000000e+00, undef
598; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
599; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 75 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
600; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
601; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 600 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
602; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
603;
604; FP16-SIZE-LABEL: 'rcp_ftzdaz'
605; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f16 = fdiv half 0xH3C00, undef
606; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f16 = fdiv <2 x half> splat (half 0xH3C00), undef
607; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v3f16 = fdiv <3 x half> splat (half 0xH3C00), undef
608; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f16 = fdiv <4 x half> splat (half 0xH3C00), undef
609; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v5f16 = fdiv <5 x half> splat (half 0xH3C00), undef
610; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %f32 = fdiv float 1.000000e+00, undef
611; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v2f32 = fdiv <2 x float> splat (float 1.000000e+00), undef
612; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 6 for instruction: %v3f32 = fdiv <3 x float> splat (float 1.000000e+00), undef
613; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %v4f32 = fdiv <4 x float> splat (float 1.000000e+00), undef
614; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %v5f32 = fdiv <5 x float> splat (float 1.000000e+00), undef
615; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %f64 = fdiv double 1.000000e+00, undef
616; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %v2f64 = fdiv <2 x double> splat (double 1.000000e+00), undef
617; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %v3f64 = fdiv <3 x double> splat (double 1.000000e+00), undef
618; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %v4f64 = fdiv <4 x double> splat (double 1.000000e+00), undef
619; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %v5f64 = fdiv <5 x double> splat (double 1.000000e+00), undef
620; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
621;
622  %f16 = fdiv half 1.0, undef
623  %v2f16 = fdiv <2 x half> <half 1.0, half 1.0>, undef
624  %v3f16 = fdiv <3 x half> <half 1.0, half 1.0, half 1.0>, undef
625  %v4f16 = fdiv <4 x half> <half 1.0, half 1.0, half 1.0, half 1.0>, undef
626  %v5f16 = fdiv <5 x half> <half 1.0, half 1.0, half 1.0, half 1.0, half 1.0>, undef
627  %f32 = fdiv float 1.0, undef
628  %v2f32 = fdiv <2 x float> <float 1.0, float 1.0>, undef
629  %v3f32 = fdiv <3 x float> <float 1.0, float 1.0, float 1.0>, undef
630  %v4f32 = fdiv <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, undef
631  %v5f32 = fdiv <5 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, undef
632  %f64 = fdiv double 1.0, undef
633  %v2f64 = fdiv <2 x double> <double 1.0, double 1.0>, undef
634  %v3f64 = fdiv <3 x double> <double 1.0, double 1.0, double 1.0>, undef
635  %v4f64 = fdiv <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, undef
636  %v5f64 = fdiv <5 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0>, undef
637  ret void
638}
639
640define i32 @frem(i32 %arg) {
641; CIFASTF64-LABEL: 'frem'
642; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
643; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
644; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
645; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
646; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 24 for instruction: %F64 = frem double undef, undef
647; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V2F64 = frem <2 x double> undef, undef
648; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V4F64 = frem <4 x double> undef, undef
649; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %V8F64 = frem <8 x double> undef, undef
650; CIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
651;
652; CISLOWF64-LABEL: 'frem'
653; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
654; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
655; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
656; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
657; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %F64 = frem double undef, undef
658; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %V2F64 = frem <2 x double> undef, undef
659; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %V4F64 = frem <4 x double> undef, undef
660; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %V8F64 = frem <8 x double> undef, undef
661; CISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
662;
663; SIFASTF64-LABEL: 'frem'
664; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
665; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
666; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
667; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
668; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 27 for instruction: %F64 = frem double undef, undef
669; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 54 for instruction: %V2F64 = frem <2 x double> undef, undef
670; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 108 for instruction: %V4F64 = frem <4 x double> undef, undef
671; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 648 for instruction: %V8F64 = frem <8 x double> undef, undef
672; SIFASTF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
673;
674; SISLOWF64-LABEL: 'frem'
675; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
676; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
677; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
678; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
679; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 41 for instruction: %F64 = frem double undef, undef
680; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 82 for instruction: %V2F64 = frem <2 x double> undef, undef
681; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 164 for instruction: %V4F64 = frem <4 x double> undef, undef
682; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 984 for instruction: %V8F64 = frem <8 x double> undef, undef
683; SISLOWF64-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
684;
685; FP16-LABEL: 'frem'
686; FP16-NEXT:  Cost Model: Found an estimated cost of 14 for instruction: %F32 = frem float undef, undef
687; FP16-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V4F32 = frem <4 x float> undef, undef
688; FP16-NEXT:  Cost Model: Found an estimated cost of 112 for instruction: %V8F32 = frem <8 x float> undef, undef
689; FP16-NEXT:  Cost Model: Found an estimated cost of 672 for instruction: %V16F32 = frem <16 x float> undef, undef
690; FP16-NEXT:  Cost Model: Found an estimated cost of 38 for instruction: %F64 = frem double undef, undef
691; FP16-NEXT:  Cost Model: Found an estimated cost of 76 for instruction: %V2F64 = frem <2 x double> undef, undef
692; FP16-NEXT:  Cost Model: Found an estimated cost of 152 for instruction: %V4F64 = frem <4 x double> undef, undef
693; FP16-NEXT:  Cost Model: Found an estimated cost of 912 for instruction: %V8F64 = frem <8 x double> undef, undef
694; FP16-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: ret i32 undef
695;
696; CI-SIZE-LABEL: 'frem'
697; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %F32 = frem float undef, undef
698; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V4F32 = frem <4 x float> undef, undef
699; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V8F32 = frem <8 x float> undef, undef
700; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %V16F32 = frem <16 x float> undef, undef
701; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %F64 = frem double undef, undef
702; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %V2F64 = frem <2 x double> undef, undef
703; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %V4F64 = frem <4 x double> undef, undef
704; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %V8F64 = frem <8 x double> undef, undef
705; CI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
706;
707; SI-SIZE-LABEL: 'frem'
708; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %F32 = frem float undef, undef
709; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V4F32 = frem <4 x float> undef, undef
710; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V8F32 = frem <8 x float> undef, undef
711; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %V16F32 = frem <16 x float> undef, undef
712; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %F64 = frem double undef, undef
713; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 50 for instruction: %V2F64 = frem <2 x double> undef, undef
714; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 100 for instruction: %V4F64 = frem <4 x double> undef, undef
715; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 600 for instruction: %V8F64 = frem <8 x double> undef, undef
716; SI-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
717;
718; FP16-SIZE-LABEL: 'frem'
719; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 12 for instruction: %F32 = frem float undef, undef
720; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 48 for instruction: %V4F32 = frem <4 x float> undef, undef
721; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 96 for instruction: %V8F32 = frem <8 x float> undef, undef
722; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 576 for instruction: %V16F32 = frem <16 x float> undef, undef
723; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %F64 = frem double undef, undef
724; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %V2F64 = frem <2 x double> undef, undef
725; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %V4F64 = frem <4 x double> undef, undef
726; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 528 for instruction: %V8F64 = frem <8 x double> undef, undef
727; FP16-SIZE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
728;
729  %F32 = frem float undef, undef
730  %V4F32 = frem <4 x float> undef, undef
731  %V8F32 = frem <8 x float> undef, undef
732  %V16F32 = frem <16 x float> undef, undef
733
734  %F64 = frem double undef, undef
735  %V2F64 = frem <2 x double> undef, undef
736  %V4F64 = frem <4 x double> undef, undef
737  %V8F64 = frem <8 x double> undef, undef
738
739  ret i32 undef
740}
741
742attributes #0 = { nounwind "denormal-fp-math-f32"="ieee,ieee" }
743attributes #1 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
744