xref: /llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h (revision 754ed95b6672b9a678a994cc652862a91cdc4406)
1 //- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the interfaces that WebAssembly uses to lower LLVM
11 /// code into a selection DAG.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
17 
18 #include "llvm/CodeGen/TargetLowering.h"
19 
20 namespace llvm {
21 
22 namespace WebAssemblyISD {
23 
24 enum NodeType : unsigned {
25   FIRST_NUMBER = ISD::BUILTIN_OP_END,
26 #define HANDLE_NODETYPE(NODE) NODE,
27 #include "WebAssemblyISD.def"
28 #undef HANDLE_NODETYPE
29 };
30 
31 } // end namespace WebAssemblyISD
32 
33 class WebAssemblySubtarget;
34 
35 class WebAssemblyTargetLowering final : public TargetLowering {
36 public:
37   WebAssemblyTargetLowering(const TargetMachine &TM,
38                             const WebAssemblySubtarget &STI);
39 
40   MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override;
41   MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override;
42 
43 private:
44   /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
45   /// right decision when generating code for different targets.
46   const WebAssemblySubtarget *Subtarget;
47 
48   AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
49   bool shouldScalarizeBinop(SDValue VecOp) const override;
50   FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,
51                            const TargetLibraryInfo *LibInfo) const override;
52   MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
53   MachineBasicBlock *
54   EmitInstrWithCustomInserter(MachineInstr &MI,
55                               MachineBasicBlock *MBB) const override;
56   const char *getTargetNodeName(unsigned Opcode) const override;
57   std::pair<unsigned, const TargetRegisterClass *>
58   getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
59                                StringRef Constraint, MVT VT) const override;
60   bool isCheapToSpeculateCttz(Type *Ty) const override;
61   bool isCheapToSpeculateCtlz(Type *Ty) const override;
62   bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
63                              unsigned AS,
64                              Instruction *I = nullptr) const override;
65   bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, Align Alignment,
66                                       MachineMemOperand::Flags Flags,
67                                       unsigned *Fast) const override;
68   bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
69   bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
70   bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
71   EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
72                          EVT VT) const override;
73   bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
74                           MachineFunction &MF,
75                           unsigned Intrinsic) const override;
76 
77   void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
78                                      const APInt &DemandedElts,
79                                      const SelectionDAG &DAG,
80                                      unsigned Depth) const override;
81 
82   TargetLoweringBase::LegalizeTypeAction
83   getPreferredVectorAction(MVT VT) const override;
84 
85   SDValue LowerCall(CallLoweringInfo &CLI,
86                     SmallVectorImpl<SDValue> &InVals) const override;
87   bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
88                       bool isVarArg,
89                       const SmallVectorImpl<ISD::OutputArg> &Outs,
90                       LLVMContext &Context,
91                       const Type *RetTy) const override;
92   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
93                       const SmallVectorImpl<ISD::OutputArg> &Outs,
94                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
95                       SelectionDAG &DAG) const override;
96   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
97                                bool IsVarArg,
98                                const SmallVectorImpl<ISD::InputArg> &Ins,
99                                const SDLoc &DL, SelectionDAG &DAG,
100                                SmallVectorImpl<SDValue> &InVals) const override;
101 
102   void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
103                           SelectionDAG &DAG) const override;
104 
105   bool
106   shouldSimplifyDemandedVectorElts(SDValue Op,
107                                    const TargetLoweringOpt &TLO) const override;
108 
109   // Custom lowering hooks.
110   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
111   SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
112   SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
113   SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
114   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
115   SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
116   SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
117   SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
118   SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
119   SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
120   SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
121   SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;
122   SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
123   SDValue LowerEXTEND_VECTOR_INREG(SDValue Op, SelectionDAG &DAG) const;
124   SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
125   SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
126   SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
127   SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
128   SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
129   SDValue LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const;
130   SDValue LowerLoad(SDValue Op, SelectionDAG &DAG) const;
131   SDValue LowerStore(SDValue Op, SelectionDAG &DAG) const;
132   SDValue LowerMUL_LOHI(SDValue Op, SelectionDAG &DAG) const;
133   SDValue Replace128Op(SDNode *N, SelectionDAG &DAG) const;
134 
135   // Custom DAG combine hooks
136   SDValue
137   PerformDAGCombine(SDNode *N,
138                     TargetLowering::DAGCombinerInfo &DCI) const override;
139 };
140 
141 namespace WebAssembly {
142 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
143                          const TargetLibraryInfo *libInfo);
144 } // end namespace WebAssembly
145 
146 } // end namespace llvm
147 
148 #endif
149