1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MCTargetDesc/PPCFixupKinds.h" 10 #include "MCTargetDesc/PPCMCTargetDesc.h" 11 #include "llvm/BinaryFormat/ELF.h" 12 #include "llvm/BinaryFormat/MachO.h" 13 #include "llvm/MC/MCAsmBackend.h" 14 #include "llvm/MC/MCAssembler.h" 15 #include "llvm/MC/MCELFObjectWriter.h" 16 #include "llvm/MC/MCFixupKindInfo.h" 17 #include "llvm/MC/MCMachObjectWriter.h" 18 #include "llvm/MC/MCObjectWriter.h" 19 #include "llvm/MC/MCSubtargetInfo.h" 20 #include "llvm/MC/MCSymbolELF.h" 21 #include "llvm/MC/MCSymbolXCOFF.h" 22 #include "llvm/MC/MCValue.h" 23 #include "llvm/MC/TargetRegistry.h" 24 #include "llvm/Support/ErrorHandling.h" 25 using namespace llvm; 26 27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 28 switch (Kind) { 29 default: 30 llvm_unreachable("Unknown fixup kind!"); 31 case FK_Data_1: 32 case FK_Data_2: 33 case FK_Data_4: 34 case FK_Data_8: 35 case PPC::fixup_ppc_nofixup: 36 return Value; 37 case PPC::fixup_ppc_brcond14: 38 case PPC::fixup_ppc_brcond14abs: 39 return Value & 0xfffc; 40 case PPC::fixup_ppc_br24: 41 case PPC::fixup_ppc_br24abs: 42 case PPC::fixup_ppc_br24_notoc: 43 return Value & 0x3fffffc; 44 case PPC::fixup_ppc_half16: 45 return Value & 0xffff; 46 case PPC::fixup_ppc_half16ds: 47 case PPC::fixup_ppc_half16dq: 48 return Value & 0xfffc; 49 case PPC::fixup_ppc_pcrel34: 50 case PPC::fixup_ppc_imm34: 51 return Value & 0x3ffffffff; 52 } 53 } 54 55 static unsigned getFixupKindNumBytes(unsigned Kind) { 56 switch (Kind) { 57 default: 58 llvm_unreachable("Unknown fixup kind!"); 59 case FK_Data_1: 60 return 1; 61 case FK_Data_2: 62 case PPC::fixup_ppc_half16: 63 case PPC::fixup_ppc_half16ds: 64 case PPC::fixup_ppc_half16dq: 65 return 2; 66 case FK_Data_4: 67 case PPC::fixup_ppc_brcond14: 68 case PPC::fixup_ppc_brcond14abs: 69 case PPC::fixup_ppc_br24: 70 case PPC::fixup_ppc_br24abs: 71 case PPC::fixup_ppc_br24_notoc: 72 return 4; 73 case PPC::fixup_ppc_pcrel34: 74 case PPC::fixup_ppc_imm34: 75 case FK_Data_8: 76 return 8; 77 case PPC::fixup_ppc_nofixup: 78 return 0; 79 } 80 } 81 82 namespace { 83 84 class PPCAsmBackend : public MCAsmBackend { 85 protected: 86 Triple TT; 87 public: 88 PPCAsmBackend(const Target &T, const Triple &TT) 89 : MCAsmBackend(TT.isLittleEndian() ? llvm::endianness::little 90 : llvm::endianness::big), 91 TT(TT) {} 92 93 unsigned getNumFixupKinds() const override { 94 return PPC::NumTargetFixupKinds; 95 } 96 97 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override { 98 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = { 99 // name offset bits flags 100 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 101 { "fixup_ppc_br24_notoc", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 102 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, 103 { "fixup_ppc_br24abs", 6, 24, 0 }, 104 { "fixup_ppc_brcond14abs", 16, 14, 0 }, 105 { "fixup_ppc_half16", 0, 16, 0 }, 106 { "fixup_ppc_half16ds", 0, 14, 0 }, 107 { "fixup_ppc_pcrel34", 0, 34, MCFixupKindInfo::FKF_IsPCRel }, 108 { "fixup_ppc_imm34", 0, 34, 0 }, 109 { "fixup_ppc_nofixup", 0, 0, 0 } 110 }; 111 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = { 112 // name offset bits flags 113 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel }, 114 { "fixup_ppc_br24_notoc", 2, 24, MCFixupKindInfo::FKF_IsPCRel }, 115 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel }, 116 { "fixup_ppc_br24abs", 2, 24, 0 }, 117 { "fixup_ppc_brcond14abs", 2, 14, 0 }, 118 { "fixup_ppc_half16", 0, 16, 0 }, 119 { "fixup_ppc_half16ds", 2, 14, 0 }, 120 { "fixup_ppc_pcrel34", 0, 34, MCFixupKindInfo::FKF_IsPCRel }, 121 { "fixup_ppc_imm34", 0, 34, 0 }, 122 { "fixup_ppc_nofixup", 0, 0, 0 } 123 }; 124 125 // Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They 126 // do not require any extra processing. 127 if (Kind >= FirstLiteralRelocationKind) 128 return MCAsmBackend::getFixupKindInfo(FK_NONE); 129 130 if (Kind < FirstTargetFixupKind) 131 return MCAsmBackend::getFixupKindInfo(Kind); 132 133 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 134 "Invalid kind!"); 135 return (Endian == llvm::endianness::little 136 ? InfosLE 137 : InfosBE)[Kind - FirstTargetFixupKind]; 138 } 139 140 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 141 const MCValue &Target, MutableArrayRef<char> Data, 142 uint64_t Value, bool IsResolved, 143 const MCSubtargetInfo *STI) const override { 144 MCFixupKind Kind = Fixup.getKind(); 145 if (Kind >= FirstLiteralRelocationKind) 146 return; 147 Value = adjustFixupValue(Kind, Value); 148 if (!Value) return; // Doesn't change encoding. 149 150 unsigned Offset = Fixup.getOffset(); 151 unsigned NumBytes = getFixupKindNumBytes(Kind); 152 153 // For each byte of the fragment that the fixup touches, mask in the bits 154 // from the fixup value. The Value has been "split up" into the appropriate 155 // bitfields above. 156 for (unsigned i = 0; i != NumBytes; ++i) { 157 unsigned Idx = 158 Endian == llvm::endianness::little ? i : (NumBytes - 1 - i); 159 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff); 160 } 161 } 162 163 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 164 const MCValue &Target, const uint64_t, 165 const MCSubtargetInfo *STI) override { 166 MCFixupKind Kind = Fixup.getKind(); 167 switch ((unsigned)Kind) { 168 default: 169 return Kind >= FirstLiteralRelocationKind; 170 case PPC::fixup_ppc_br24: 171 case PPC::fixup_ppc_br24abs: 172 case PPC::fixup_ppc_br24_notoc: 173 // If the target symbol has a local entry point we must not attempt 174 // to resolve the fixup directly. Emit a relocation and leave 175 // resolution of the final target address to the linker. 176 if (const MCSymbolRefExpr *A = Target.getSymA()) { 177 if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) { 178 // The "other" values are stored in the last 6 bits of the second 179 // byte. The traditional defines for STO values assume the full byte 180 // and thus the shift to pack it. 181 unsigned Other = S->getOther() << 2; 182 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0) 183 return true; 184 } else if (const auto *S = dyn_cast<MCSymbolXCOFF>(&A->getSymbol())) { 185 return !Target.isAbsolute() && S->isExternal() && 186 S->getStorageClass() == XCOFF::C_WEAKEXT; 187 } 188 } 189 return false; 190 } 191 } 192 193 void relaxInstruction(MCInst &Inst, 194 const MCSubtargetInfo &STI) const override { 195 // FIXME. 196 llvm_unreachable("relaxInstruction() unimplemented"); 197 } 198 199 bool writeNopData(raw_ostream &OS, uint64_t Count, 200 const MCSubtargetInfo *STI) const override { 201 uint64_t NumNops = Count / 4; 202 for (uint64_t i = 0; i != NumNops; ++i) 203 support::endian::write<uint32_t>(OS, 0x60000000, Endian); 204 205 OS.write_zeros(Count % 4); 206 207 return true; 208 } 209 }; 210 } // end anonymous namespace 211 212 213 // FIXME: This should be in a separate file. 214 namespace { 215 216 class ELFPPCAsmBackend : public PPCAsmBackend { 217 public: 218 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {} 219 220 std::unique_ptr<MCObjectTargetWriter> 221 createObjectTargetWriter() const override { 222 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 223 bool Is64 = TT.isPPC64(); 224 return createPPCELFObjectWriter(Is64, OSABI); 225 } 226 227 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override; 228 }; 229 230 class XCOFFPPCAsmBackend : public PPCAsmBackend { 231 public: 232 XCOFFPPCAsmBackend(const Target &T, const Triple &TT) 233 : PPCAsmBackend(T, TT) {} 234 235 std::unique_ptr<MCObjectTargetWriter> 236 createObjectTargetWriter() const override { 237 return createPPCXCOFFObjectWriter(TT.isArch64Bit()); 238 } 239 240 std::optional<MCFixupKind> getFixupKind(StringRef Name) const override; 241 }; 242 243 } // end anonymous namespace 244 245 std::optional<MCFixupKind> 246 ELFPPCAsmBackend::getFixupKind(StringRef Name) const { 247 if (TT.isOSBinFormatELF()) { 248 unsigned Type; 249 if (TT.isPPC64()) { 250 Type = llvm::StringSwitch<unsigned>(Name) 251 #define ELF_RELOC(X, Y) .Case(#X, Y) 252 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def" 253 #undef ELF_RELOC 254 .Case("BFD_RELOC_NONE", ELF::R_PPC64_NONE) 255 .Case("BFD_RELOC_16", ELF::R_PPC64_ADDR16) 256 .Case("BFD_RELOC_32", ELF::R_PPC64_ADDR32) 257 .Case("BFD_RELOC_64", ELF::R_PPC64_ADDR64) 258 .Default(-1u); 259 } else { 260 Type = llvm::StringSwitch<unsigned>(Name) 261 #define ELF_RELOC(X, Y) .Case(#X, Y) 262 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def" 263 #undef ELF_RELOC 264 .Case("BFD_RELOC_NONE", ELF::R_PPC_NONE) 265 .Case("BFD_RELOC_16", ELF::R_PPC_ADDR16) 266 .Case("BFD_RELOC_32", ELF::R_PPC_ADDR32) 267 .Default(-1u); 268 } 269 if (Type != -1u) 270 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type); 271 } 272 return std::nullopt; 273 } 274 275 std::optional<MCFixupKind> 276 XCOFFPPCAsmBackend::getFixupKind(StringRef Name) const { 277 return StringSwitch<std::optional<MCFixupKind>>(Name) 278 .Case("R_REF", (MCFixupKind)PPC::fixup_ppc_nofixup) 279 .Default(std::nullopt); 280 } 281 282 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, 283 const MCSubtargetInfo &STI, 284 const MCRegisterInfo &MRI, 285 const MCTargetOptions &Options) { 286 const Triple &TT = STI.getTargetTriple(); 287 if (TT.isOSBinFormatXCOFF()) 288 return new XCOFFPPCAsmBackend(T, TT); 289 290 return new ELFPPCAsmBackend(T, TT); 291 } 292