xref: /llvm-project/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp (revision ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52)
1 //===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Top-level implementation for the MSP430 target.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MSP430TargetMachine.h"
14 #include "MSP430.h"
15 #include "MSP430MachineFunctionInfo.h"
16 #include "TargetInfo/MSP430TargetInfo.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
19 #include "llvm/CodeGen/TargetPassConfig.h"
20 #include "llvm/MC/TargetRegistry.h"
21 #include <optional>
22 using namespace llvm;
23 
24 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() {
25   // Register the target.
26   RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
27   PassRegistry &PR = *PassRegistry::getPassRegistry();
28   initializeMSP430DAGToDAGISelLegacyPass(PR);
29 }
30 
31 static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
32   return RM.value_or(Reloc::Static);
33 }
34 
35 static std::string computeDataLayout(const Triple &TT, StringRef CPU,
36                                      const TargetOptions &Options) {
37   return "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16";
38 }
39 
40 MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
41                                          StringRef CPU, StringRef FS,
42                                          const TargetOptions &Options,
43                                          std::optional<Reloc::Model> RM,
44                                          std::optional<CodeModel::Model> CM,
45                                          CodeGenOptLevel OL, bool JIT)
46     : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
47                                FS, Options, getEffectiveRelocModel(RM),
48                                getEffectiveCodeModel(CM, CodeModel::Small), OL),
49       TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
50       Subtarget(TT, std::string(CPU), std::string(FS), *this) {
51   initAsmInfo();
52 }
53 
54 MSP430TargetMachine::~MSP430TargetMachine() = default;
55 
56 namespace {
57 /// MSP430 Code Generator Pass Configuration Options.
58 class MSP430PassConfig : public TargetPassConfig {
59 public:
60   MSP430PassConfig(MSP430TargetMachine &TM, PassManagerBase &PM)
61     : TargetPassConfig(TM, PM) {}
62 
63   MSP430TargetMachine &getMSP430TargetMachine() const {
64     return getTM<MSP430TargetMachine>();
65   }
66 
67   void addIRPasses() override;
68   bool addInstSelector() override;
69   void addPreEmitPass() override;
70 };
71 } // namespace
72 
73 TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) {
74   return new MSP430PassConfig(*this, PM);
75 }
76 
77 MachineFunctionInfo *MSP430TargetMachine::createMachineFunctionInfo(
78     BumpPtrAllocator &Allocator, const Function &F,
79     const TargetSubtargetInfo *STI) const {
80   return MSP430MachineFunctionInfo::create<MSP430MachineFunctionInfo>(Allocator,
81                                                                       F, STI);
82 }
83 
84 void MSP430PassConfig::addIRPasses() {
85   addPass(createAtomicExpandLegacyPass());
86 
87   TargetPassConfig::addIRPasses();
88 }
89 
90 bool MSP430PassConfig::addInstSelector() {
91   // Install an instruction selector.
92   addPass(createMSP430ISelDag(getMSP430TargetMachine(), getOptLevel()));
93   return false;
94 }
95 
96 void MSP430PassConfig::addPreEmitPass() {
97   // Must run branch selection immediately preceding the asm printer.
98   addPass(createMSP430BranchSelectionPass());
99 }
100