1//=- LoongArchLASXInstrInfo.td - LoongArch LASX instructions -*- tablegen -*-=// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the Advanced SIMD extension instructions. 10// 11//===----------------------------------------------------------------------===// 12 13// Target nodes. 14def loongarch_xvpermi: SDNode<"LoongArchISD::XVPERMI", SDT_LoongArchV1RUimm>; 15 16def lasxsplati8 17 : PatFrag<(ops node:$e0), 18 (v32i8 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 19 node:$e0, node:$e0, node:$e0, node:$e0, 20 node:$e0, node:$e0, node:$e0, node:$e0, 21 node:$e0, node:$e0, node:$e0, node:$e0, 22 node:$e0, node:$e0, node:$e0, node:$e0, 23 node:$e0, node:$e0, node:$e0, node:$e0, 24 node:$e0, node:$e0, node:$e0, node:$e0, 25 node:$e0, node:$e0, node:$e0, node:$e0))>; 26def lasxsplati16 27 : PatFrag<(ops node:$e0), 28 (v16i16 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 29 node:$e0, node:$e0, node:$e0, node:$e0, 30 node:$e0, node:$e0, node:$e0, node:$e0, 31 node:$e0, node:$e0, node:$e0, node:$e0))>; 32def lasxsplati32 33 : PatFrag<(ops node:$e0), 34 (v8i32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 35 node:$e0, node:$e0, node:$e0, node:$e0))>; 36def lasxsplati64 37 : PatFrag<(ops node:$e0), 38 (v4i64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>; 39def lasxsplatf32 40 : PatFrag<(ops node:$e0), 41 (v8f32 (build_vector node:$e0, node:$e0, node:$e0, node:$e0, 42 node:$e0, node:$e0, node:$e0, node:$e0))>; 43def lasxsplatf64 44 : PatFrag<(ops node:$e0), 45 (v4f64 (build_vector node:$e0, node:$e0, node:$e0, node:$e0))>; 46 47//===----------------------------------------------------------------------===// 48// Instruction class templates 49//===----------------------------------------------------------------------===// 50 51class LASX1RI13_XI<bits<32> op, Operand ImmOpnd = simm13> 52 : Fmt1RI13_XI<op, (outs LASX256:$xd), (ins ImmOpnd:$imm13), "$xd, $imm13">; 53 54class LASX2R_XX<bits<32> op> 55 : Fmt2R_XX<op, (outs LASX256:$xd), (ins LASX256:$xj), "$xd, $xj">; 56 57class LASX2R_XR<bits<32> op> 58 : Fmt2R_XR<op, (outs LASX256:$xd), (ins GPR:$rj), "$xd, $rj">; 59 60class LASX2R_CX<bits<32> op> 61 : Fmt2R_CX<op, (outs CFR:$cd), (ins LASX256:$xj), "$cd, $xj">; 62 63class LASX2RI1_XXI<bits<32> op, Operand ImmOpnd = uimm1> 64 : Fmt2RI1_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm1), 65 "$xd, $xj, $imm1">; 66 67class LASX2RI2_XXI<bits<32> op, Operand ImmOpnd = uimm2> 68 : Fmt2RI2_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm2), 69 "$xd, $xj, $imm2">; 70 71class LASX2RI2_RXI<bits<32> op, Operand ImmOpnd = uimm2> 72 : Fmt2RI2_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm2), 73 "$rd, $xj, $imm2">; 74 75class LASX2RI3_XXI<bits<32> op, Operand ImmOpnd = uimm3> 76 : Fmt2RI3_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm3), 77 "$xd, $xj, $imm3">; 78 79class LASX2RI3_RXI<bits<32> op, Operand ImmOpnd = uimm3> 80 : Fmt2RI3_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm3), 81 "$rd, $xj, $imm3">; 82 83class LASX2RI4_XXI<bits<32> op, Operand ImmOpnd = uimm4> 84 : Fmt2RI4_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm4), 85 "$xd, $xj, $imm4">; 86 87class LASX2RI4_XRI<bits<32> op, Operand ImmOpnd = uimm4> 88 : Fmt2RI4_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm4), 89 "$xd, $rj, $imm4">; 90 91class LASX2RI4_RXI<bits<32> op, Operand ImmOpnd = uimm4> 92 : Fmt2RI4_RXI<op, (outs GPR:$rd), (ins LASX256:$xj, ImmOpnd:$imm4), 93 "$rd, $xj, $imm4">; 94 95class LASX2RI5_XXI<bits<32> op, Operand ImmOpnd = uimm5> 96 : Fmt2RI5_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm5), 97 "$xd, $xj, $imm5">; 98 99class LASX2RI6_XXI<bits<32> op, Operand ImmOpnd = uimm6> 100 : Fmt2RI6_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm6), 101 "$xd, $xj, $imm6">; 102 103class LASX2RI8_XXI<bits<32> op, Operand ImmOpnd = uimm8> 104 : Fmt2RI8_XXI<op, (outs LASX256:$xd), (ins LASX256:$xj, ImmOpnd:$imm8), 105 "$xd, $xj, $imm8">; 106 107class LASX2RI8I2_XRII<bits<32> op, Operand ImmOpnd = simm8, 108 Operand IdxOpnd = uimm2> 109 : Fmt2RI8I2_XRII<op, (outs), 110 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm2), 111 "$xd, $rj, $imm8, $imm2">; 112class LASX2RI8I3_XRII<bits<32> op, Operand ImmOpnd = simm8, 113 Operand IdxOpnd = uimm3> 114 : Fmt2RI8I3_XRII<op, (outs), 115 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm3), 116 "$xd, $rj, $imm8, $imm3">; 117class LASX2RI8I4_XRII<bits<32> op, Operand ImmOpnd = simm8, 118 Operand IdxOpnd = uimm4> 119 : Fmt2RI8I4_XRII<op, (outs), 120 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm4), 121 "$xd, $rj, $imm8, $imm4">; 122class LASX2RI8I5_XRII<bits<32> op, Operand ImmOpnd = simm8, 123 Operand IdxOpnd = uimm5> 124 : Fmt2RI8I5_XRII<op, (outs), 125 (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm8, IdxOpnd:$imm5), 126 "$xd, $rj, $imm8, $imm5">; 127 128class LASX3R_XXX<bits<32> op> 129 : Fmt3R_XXX<op, (outs LASX256:$xd), (ins LASX256:$xj, LASX256:$xk), 130 "$xd, $xj, $xk">; 131 132class LASX3R_XXR<bits<32> op> 133 : Fmt3R_XXR<op, (outs LASX256:$xd), (ins LASX256:$xj, GPR:$rk), 134 "$xd, $xj, $rk">; 135 136class LASX4R_XXXX<bits<32> op> 137 : Fmt4R_XXXX<op, (outs LASX256:$xd), 138 (ins LASX256:$xj, LASX256:$xk, LASX256:$xa), 139 "$xd, $xj, $xk, $xa">; 140 141let Constraints = "$xd = $dst" in { 142 143class LASX2RI2_XXXI<bits<32> op, Operand ImmOpnd = uimm2> 144 : Fmt2RI2_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm2), 145 "$xd, $xj, $imm2">; 146class LASX2RI3_XXXI<bits<32> op, Operand ImmOpnd = uimm3> 147 : Fmt2RI3_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm3), 148 "$xd, $xj, $imm3">; 149 150class LASX2RI2_XXRI<bits<32> op, Operand ImmOpnd = uimm2> 151 : Fmt2RI2_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm2), 152 "$xd, $rj, $imm2">; 153class LASX2RI3_XXRI<bits<32> op, Operand ImmOpnd = uimm3> 154 : Fmt2RI3_XRI<op, (outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm3), 155 "$xd, $rj, $imm3">; 156 157class LASX2RI4_XXXI<bits<32> op, Operand ImmOpnd = uimm4> 158 : Fmt2RI4_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm4), 159 "$xd, $xj, $imm4">; 160class LASX2RI5_XXXI<bits<32> op, Operand ImmOpnd = uimm5> 161 : Fmt2RI5_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm5), 162 "$xd, $xj, $imm5">; 163class LASX2RI6_XXXI<bits<32> op, Operand ImmOpnd = uimm6> 164 : Fmt2RI6_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm6), 165 "$xd, $xj, $imm6">; 166class LASX2RI7_XXXI<bits<32> op, Operand ImmOpnd = uimm7> 167 : Fmt2RI7_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm7), 168 "$xd, $xj, $imm7">; 169 170class LASX2RI8_XXXI<bits<32> op, Operand ImmOpnd = uimm8> 171 : Fmt2RI8_XXI<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, ImmOpnd:$imm8), 172 "$xd, $xj, $imm8">; 173 174class LASX3R_XXXX<bits<32> op> 175 : Fmt3R_XXX<op, (outs LASX256:$dst), (ins LASX256:$xd, LASX256:$xj, LASX256:$xk), 176 "$xd, $xj, $xk">; 177 178} // Constraints = "$xd = $dst" 179 180class LASX2RI9_Load<bits<32> op, Operand ImmOpnd = simm9_lsl3> 181 : Fmt2RI9_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm9), 182 "$xd, $rj, $imm9">; 183class LASX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2> 184 : Fmt2RI10_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm10), 185 "$xd, $rj, $imm10">; 186class LASX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1> 187 : Fmt2RI11_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm11), 188 "$xd, $rj, $imm11">; 189class LASX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12> 190 : Fmt2RI12_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm12), 191 "$xd, $rj, $imm12">; 192class LASX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12> 193 : Fmt2RI12_XRI<op, (outs), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm12), 194 "$xd, $rj, $imm12">; 195 196class LASX3R_Load<bits<32> op> 197 : Fmt3R_XRR<op, (outs LASX256:$xd), (ins GPR:$rj, GPR:$rk), 198 "$xd, $rj, $rk">; 199class LASX3R_Store<bits<32> op> 200 : Fmt3R_XRR<op, (outs), (ins LASX256:$xd, GPR:$rj, GPR:$rk), 201 "$xd, $rj, $rk">; 202 203//===----------------------------------------------------------------------===// 204// Instructions 205//===----------------------------------------------------------------------===// 206 207let hasSideEffects = 0, Predicates = [HasExtLASX] in { 208 209let mayLoad = 0, mayStore = 0 in { 210def XVADD_B : LASX3R_XXX<0x740a0000>; 211def XVADD_H : LASX3R_XXX<0x740a8000>; 212def XVADD_W : LASX3R_XXX<0x740b0000>; 213def XVADD_D : LASX3R_XXX<0x740b8000>; 214def XVADD_Q : LASX3R_XXX<0x752d0000>; 215 216def XVSUB_B : LASX3R_XXX<0x740c0000>; 217def XVSUB_H : LASX3R_XXX<0x740c8000>; 218def XVSUB_W : LASX3R_XXX<0x740d0000>; 219def XVSUB_D : LASX3R_XXX<0x740d8000>; 220def XVSUB_Q : LASX3R_XXX<0x752d8000>; 221 222def XVADDI_BU : LASX2RI5_XXI<0x768a0000>; 223def XVADDI_HU : LASX2RI5_XXI<0x768a8000>; 224def XVADDI_WU : LASX2RI5_XXI<0x768b0000>; 225def XVADDI_DU : LASX2RI5_XXI<0x768b8000>; 226 227def XVSUBI_BU : LASX2RI5_XXI<0x768c0000>; 228def XVSUBI_HU : LASX2RI5_XXI<0x768c8000>; 229def XVSUBI_WU : LASX2RI5_XXI<0x768d0000>; 230def XVSUBI_DU : LASX2RI5_XXI<0x768d8000>; 231 232def XVNEG_B : LASX2R_XX<0x769c3000>; 233def XVNEG_H : LASX2R_XX<0x769c3400>; 234def XVNEG_W : LASX2R_XX<0x769c3800>; 235def XVNEG_D : LASX2R_XX<0x769c3c00>; 236 237def XVSADD_B : LASX3R_XXX<0x74460000>; 238def XVSADD_H : LASX3R_XXX<0x74468000>; 239def XVSADD_W : LASX3R_XXX<0x74470000>; 240def XVSADD_D : LASX3R_XXX<0x74478000>; 241def XVSADD_BU : LASX3R_XXX<0x744a0000>; 242def XVSADD_HU : LASX3R_XXX<0x744a8000>; 243def XVSADD_WU : LASX3R_XXX<0x744b0000>; 244def XVSADD_DU : LASX3R_XXX<0x744b8000>; 245 246def XVSSUB_B : LASX3R_XXX<0x74480000>; 247def XVSSUB_H : LASX3R_XXX<0x74488000>; 248def XVSSUB_W : LASX3R_XXX<0x74490000>; 249def XVSSUB_D : LASX3R_XXX<0x74498000>; 250def XVSSUB_BU : LASX3R_XXX<0x744c0000>; 251def XVSSUB_HU : LASX3R_XXX<0x744c8000>; 252def XVSSUB_WU : LASX3R_XXX<0x744d0000>; 253def XVSSUB_DU : LASX3R_XXX<0x744d8000>; 254 255def XVHADDW_H_B : LASX3R_XXX<0x74540000>; 256def XVHADDW_W_H : LASX3R_XXX<0x74548000>; 257def XVHADDW_D_W : LASX3R_XXX<0x74550000>; 258def XVHADDW_Q_D : LASX3R_XXX<0x74558000>; 259def XVHADDW_HU_BU : LASX3R_XXX<0x74580000>; 260def XVHADDW_WU_HU : LASX3R_XXX<0x74588000>; 261def XVHADDW_DU_WU : LASX3R_XXX<0x74590000>; 262def XVHADDW_QU_DU : LASX3R_XXX<0x74598000>; 263 264def XVHSUBW_H_B : LASX3R_XXX<0x74560000>; 265def XVHSUBW_W_H : LASX3R_XXX<0x74568000>; 266def XVHSUBW_D_W : LASX3R_XXX<0x74570000>; 267def XVHSUBW_Q_D : LASX3R_XXX<0x74578000>; 268def XVHSUBW_HU_BU : LASX3R_XXX<0x745a0000>; 269def XVHSUBW_WU_HU : LASX3R_XXX<0x745a8000>; 270def XVHSUBW_DU_WU : LASX3R_XXX<0x745b0000>; 271def XVHSUBW_QU_DU : LASX3R_XXX<0x745b8000>; 272 273def XVADDWEV_H_B : LASX3R_XXX<0x741e0000>; 274def XVADDWEV_W_H : LASX3R_XXX<0x741e8000>; 275def XVADDWEV_D_W : LASX3R_XXX<0x741f0000>; 276def XVADDWEV_Q_D : LASX3R_XXX<0x741f8000>; 277def XVADDWOD_H_B : LASX3R_XXX<0x74220000>; 278def XVADDWOD_W_H : LASX3R_XXX<0x74228000>; 279def XVADDWOD_D_W : LASX3R_XXX<0x74230000>; 280def XVADDWOD_Q_D : LASX3R_XXX<0x74238000>; 281 282def XVSUBWEV_H_B : LASX3R_XXX<0x74200000>; 283def XVSUBWEV_W_H : LASX3R_XXX<0x74208000>; 284def XVSUBWEV_D_W : LASX3R_XXX<0x74210000>; 285def XVSUBWEV_Q_D : LASX3R_XXX<0x74218000>; 286def XVSUBWOD_H_B : LASX3R_XXX<0x74240000>; 287def XVSUBWOD_W_H : LASX3R_XXX<0x74248000>; 288def XVSUBWOD_D_W : LASX3R_XXX<0x74250000>; 289def XVSUBWOD_Q_D : LASX3R_XXX<0x74258000>; 290 291def XVADDWEV_H_BU : LASX3R_XXX<0x742e0000>; 292def XVADDWEV_W_HU : LASX3R_XXX<0x742e8000>; 293def XVADDWEV_D_WU : LASX3R_XXX<0x742f0000>; 294def XVADDWEV_Q_DU : LASX3R_XXX<0x742f8000>; 295def XVADDWOD_H_BU : LASX3R_XXX<0x74320000>; 296def XVADDWOD_W_HU : LASX3R_XXX<0x74328000>; 297def XVADDWOD_D_WU : LASX3R_XXX<0x74330000>; 298def XVADDWOD_Q_DU : LASX3R_XXX<0x74338000>; 299 300def XVSUBWEV_H_BU : LASX3R_XXX<0x74300000>; 301def XVSUBWEV_W_HU : LASX3R_XXX<0x74308000>; 302def XVSUBWEV_D_WU : LASX3R_XXX<0x74310000>; 303def XVSUBWEV_Q_DU : LASX3R_XXX<0x74318000>; 304def XVSUBWOD_H_BU : LASX3R_XXX<0x74340000>; 305def XVSUBWOD_W_HU : LASX3R_XXX<0x74348000>; 306def XVSUBWOD_D_WU : LASX3R_XXX<0x74350000>; 307def XVSUBWOD_Q_DU : LASX3R_XXX<0x74358000>; 308 309def XVADDWEV_H_BU_B : LASX3R_XXX<0x743e0000>; 310def XVADDWEV_W_HU_H : LASX3R_XXX<0x743e8000>; 311def XVADDWEV_D_WU_W : LASX3R_XXX<0x743f0000>; 312def XVADDWEV_Q_DU_D : LASX3R_XXX<0x743f8000>; 313def XVADDWOD_H_BU_B : LASX3R_XXX<0x74400000>; 314def XVADDWOD_W_HU_H : LASX3R_XXX<0x74408000>; 315def XVADDWOD_D_WU_W : LASX3R_XXX<0x74410000>; 316def XVADDWOD_Q_DU_D : LASX3R_XXX<0x74418000>; 317 318def XVAVG_B : LASX3R_XXX<0x74640000>; 319def XVAVG_H : LASX3R_XXX<0x74648000>; 320def XVAVG_W : LASX3R_XXX<0x74650000>; 321def XVAVG_D : LASX3R_XXX<0x74658000>; 322def XVAVG_BU : LASX3R_XXX<0x74660000>; 323def XVAVG_HU : LASX3R_XXX<0x74668000>; 324def XVAVG_WU : LASX3R_XXX<0x74670000>; 325def XVAVG_DU : LASX3R_XXX<0x74678000>; 326def XVAVGR_B : LASX3R_XXX<0x74680000>; 327def XVAVGR_H : LASX3R_XXX<0x74688000>; 328def XVAVGR_W : LASX3R_XXX<0x74690000>; 329def XVAVGR_D : LASX3R_XXX<0x74698000>; 330def XVAVGR_BU : LASX3R_XXX<0x746a0000>; 331def XVAVGR_HU : LASX3R_XXX<0x746a8000>; 332def XVAVGR_WU : LASX3R_XXX<0x746b0000>; 333def XVAVGR_DU : LASX3R_XXX<0x746b8000>; 334 335def XVABSD_B : LASX3R_XXX<0x74600000>; 336def XVABSD_H : LASX3R_XXX<0x74608000>; 337def XVABSD_W : LASX3R_XXX<0x74610000>; 338def XVABSD_D : LASX3R_XXX<0x74618000>; 339def XVABSD_BU : LASX3R_XXX<0x74620000>; 340def XVABSD_HU : LASX3R_XXX<0x74628000>; 341def XVABSD_WU : LASX3R_XXX<0x74630000>; 342def XVABSD_DU : LASX3R_XXX<0x74638000>; 343 344def XVADDA_B : LASX3R_XXX<0x745c0000>; 345def XVADDA_H : LASX3R_XXX<0x745c8000>; 346def XVADDA_W : LASX3R_XXX<0x745d0000>; 347def XVADDA_D : LASX3R_XXX<0x745d8000>; 348 349def XVMAX_B : LASX3R_XXX<0x74700000>; 350def XVMAX_H : LASX3R_XXX<0x74708000>; 351def XVMAX_W : LASX3R_XXX<0x74710000>; 352def XVMAX_D : LASX3R_XXX<0x74718000>; 353def XVMAXI_B : LASX2RI5_XXI<0x76900000, simm5>; 354def XVMAXI_H : LASX2RI5_XXI<0x76908000, simm5>; 355def XVMAXI_W : LASX2RI5_XXI<0x76910000, simm5>; 356def XVMAXI_D : LASX2RI5_XXI<0x76918000, simm5>; 357def XVMAX_BU : LASX3R_XXX<0x74740000>; 358def XVMAX_HU : LASX3R_XXX<0x74748000>; 359def XVMAX_WU : LASX3R_XXX<0x74750000>; 360def XVMAX_DU : LASX3R_XXX<0x74758000>; 361def XVMAXI_BU : LASX2RI5_XXI<0x76940000>; 362def XVMAXI_HU : LASX2RI5_XXI<0x76948000>; 363def XVMAXI_WU : LASX2RI5_XXI<0x76950000>; 364def XVMAXI_DU : LASX2RI5_XXI<0x76958000>; 365 366def XVMIN_B : LASX3R_XXX<0x74720000>; 367def XVMIN_H : LASX3R_XXX<0x74728000>; 368def XVMIN_W : LASX3R_XXX<0x74730000>; 369def XVMIN_D : LASX3R_XXX<0x74738000>; 370def XVMINI_B : LASX2RI5_XXI<0x76920000, simm5>; 371def XVMINI_H : LASX2RI5_XXI<0x76928000, simm5>; 372def XVMINI_W : LASX2RI5_XXI<0x76930000, simm5>; 373def XVMINI_D : LASX2RI5_XXI<0x76938000, simm5>; 374def XVMIN_BU : LASX3R_XXX<0x74760000>; 375def XVMIN_HU : LASX3R_XXX<0x74768000>; 376def XVMIN_WU : LASX3R_XXX<0x74770000>; 377def XVMIN_DU : LASX3R_XXX<0x74778000>; 378def XVMINI_BU : LASX2RI5_XXI<0x76960000>; 379def XVMINI_HU : LASX2RI5_XXI<0x76968000>; 380def XVMINI_WU : LASX2RI5_XXI<0x76970000>; 381def XVMINI_DU : LASX2RI5_XXI<0x76978000>; 382 383def XVMUL_B : LASX3R_XXX<0x74840000>; 384def XVMUL_H : LASX3R_XXX<0x74848000>; 385def XVMUL_W : LASX3R_XXX<0x74850000>; 386def XVMUL_D : LASX3R_XXX<0x74858000>; 387 388def XVMUH_B : LASX3R_XXX<0x74860000>; 389def XVMUH_H : LASX3R_XXX<0x74868000>; 390def XVMUH_W : LASX3R_XXX<0x74870000>; 391def XVMUH_D : LASX3R_XXX<0x74878000>; 392def XVMUH_BU : LASX3R_XXX<0x74880000>; 393def XVMUH_HU : LASX3R_XXX<0x74888000>; 394def XVMUH_WU : LASX3R_XXX<0x74890000>; 395def XVMUH_DU : LASX3R_XXX<0x74898000>; 396 397def XVMULWEV_H_B : LASX3R_XXX<0x74900000>; 398def XVMULWEV_W_H : LASX3R_XXX<0x74908000>; 399def XVMULWEV_D_W : LASX3R_XXX<0x74910000>; 400def XVMULWEV_Q_D : LASX3R_XXX<0x74918000>; 401def XVMULWOD_H_B : LASX3R_XXX<0x74920000>; 402def XVMULWOD_W_H : LASX3R_XXX<0x74928000>; 403def XVMULWOD_D_W : LASX3R_XXX<0x74930000>; 404def XVMULWOD_Q_D : LASX3R_XXX<0x74938000>; 405def XVMULWEV_H_BU : LASX3R_XXX<0x74980000>; 406def XVMULWEV_W_HU : LASX3R_XXX<0x74988000>; 407def XVMULWEV_D_WU : LASX3R_XXX<0x74990000>; 408def XVMULWEV_Q_DU : LASX3R_XXX<0x74998000>; 409def XVMULWOD_H_BU : LASX3R_XXX<0x749a0000>; 410def XVMULWOD_W_HU : LASX3R_XXX<0x749a8000>; 411def XVMULWOD_D_WU : LASX3R_XXX<0x749b0000>; 412def XVMULWOD_Q_DU : LASX3R_XXX<0x749b8000>; 413def XVMULWEV_H_BU_B : LASX3R_XXX<0x74a00000>; 414def XVMULWEV_W_HU_H : LASX3R_XXX<0x74a08000>; 415def XVMULWEV_D_WU_W : LASX3R_XXX<0x74a10000>; 416def XVMULWEV_Q_DU_D : LASX3R_XXX<0x74a18000>; 417def XVMULWOD_H_BU_B : LASX3R_XXX<0x74a20000>; 418def XVMULWOD_W_HU_H : LASX3R_XXX<0x74a28000>; 419def XVMULWOD_D_WU_W : LASX3R_XXX<0x74a30000>; 420def XVMULWOD_Q_DU_D : LASX3R_XXX<0x74a38000>; 421 422def XVMADD_B : LASX3R_XXXX<0x74a80000>; 423def XVMADD_H : LASX3R_XXXX<0x74a88000>; 424def XVMADD_W : LASX3R_XXXX<0x74a90000>; 425def XVMADD_D : LASX3R_XXXX<0x74a98000>; 426 427def XVMSUB_B : LASX3R_XXXX<0x74aa0000>; 428def XVMSUB_H : LASX3R_XXXX<0x74aa8000>; 429def XVMSUB_W : LASX3R_XXXX<0x74ab0000>; 430def XVMSUB_D : LASX3R_XXXX<0x74ab8000>; 431 432def XVMADDWEV_H_B : LASX3R_XXXX<0x74ac0000>; 433def XVMADDWEV_W_H : LASX3R_XXXX<0x74ac8000>; 434def XVMADDWEV_D_W : LASX3R_XXXX<0x74ad0000>; 435def XVMADDWEV_Q_D : LASX3R_XXXX<0x74ad8000>; 436def XVMADDWOD_H_B : LASX3R_XXXX<0x74ae0000>; 437def XVMADDWOD_W_H : LASX3R_XXXX<0x74ae8000>; 438def XVMADDWOD_D_W : LASX3R_XXXX<0x74af0000>; 439def XVMADDWOD_Q_D : LASX3R_XXXX<0x74af8000>; 440def XVMADDWEV_H_BU : LASX3R_XXXX<0x74b40000>; 441def XVMADDWEV_W_HU : LASX3R_XXXX<0x74b48000>; 442def XVMADDWEV_D_WU : LASX3R_XXXX<0x74b50000>; 443def XVMADDWEV_Q_DU : LASX3R_XXXX<0x74b58000>; 444def XVMADDWOD_H_BU : LASX3R_XXXX<0x74b60000>; 445def XVMADDWOD_W_HU : LASX3R_XXXX<0x74b68000>; 446def XVMADDWOD_D_WU : LASX3R_XXXX<0x74b70000>; 447def XVMADDWOD_Q_DU : LASX3R_XXXX<0x74b78000>; 448def XVMADDWEV_H_BU_B : LASX3R_XXXX<0x74bc0000>; 449def XVMADDWEV_W_HU_H : LASX3R_XXXX<0x74bc8000>; 450def XVMADDWEV_D_WU_W : LASX3R_XXXX<0x74bd0000>; 451def XVMADDWEV_Q_DU_D : LASX3R_XXXX<0x74bd8000>; 452def XVMADDWOD_H_BU_B : LASX3R_XXXX<0x74be0000>; 453def XVMADDWOD_W_HU_H : LASX3R_XXXX<0x74be8000>; 454def XVMADDWOD_D_WU_W : LASX3R_XXXX<0x74bf0000>; 455def XVMADDWOD_Q_DU_D : LASX3R_XXXX<0x74bf8000>; 456 457def XVDIV_B : LASX3R_XXX<0x74e00000>; 458def XVDIV_H : LASX3R_XXX<0x74e08000>; 459def XVDIV_W : LASX3R_XXX<0x74e10000>; 460def XVDIV_D : LASX3R_XXX<0x74e18000>; 461def XVDIV_BU : LASX3R_XXX<0x74e40000>; 462def XVDIV_HU : LASX3R_XXX<0x74e48000>; 463def XVDIV_WU : LASX3R_XXX<0x74e50000>; 464def XVDIV_DU : LASX3R_XXX<0x74e58000>; 465 466def XVMOD_B : LASX3R_XXX<0x74e20000>; 467def XVMOD_H : LASX3R_XXX<0x74e28000>; 468def XVMOD_W : LASX3R_XXX<0x74e30000>; 469def XVMOD_D : LASX3R_XXX<0x74e38000>; 470def XVMOD_BU : LASX3R_XXX<0x74e60000>; 471def XVMOD_HU : LASX3R_XXX<0x74e68000>; 472def XVMOD_WU : LASX3R_XXX<0x74e70000>; 473def XVMOD_DU : LASX3R_XXX<0x74e78000>; 474 475def XVSAT_B : LASX2RI3_XXI<0x77242000>; 476def XVSAT_H : LASX2RI4_XXI<0x77244000>; 477def XVSAT_W : LASX2RI5_XXI<0x77248000>; 478def XVSAT_D : LASX2RI6_XXI<0x77250000>; 479def XVSAT_BU : LASX2RI3_XXI<0x77282000>; 480def XVSAT_HU : LASX2RI4_XXI<0x77284000>; 481def XVSAT_WU : LASX2RI5_XXI<0x77288000>; 482def XVSAT_DU : LASX2RI6_XXI<0x77290000>; 483 484def XVEXTH_H_B : LASX2R_XX<0x769ee000>; 485def XVEXTH_W_H : LASX2R_XX<0x769ee400>; 486def XVEXTH_D_W : LASX2R_XX<0x769ee800>; 487def XVEXTH_Q_D : LASX2R_XX<0x769eec00>; 488def XVEXTH_HU_BU : LASX2R_XX<0x769ef000>; 489def XVEXTH_WU_HU : LASX2R_XX<0x769ef400>; 490def XVEXTH_DU_WU : LASX2R_XX<0x769ef800>; 491def XVEXTH_QU_DU : LASX2R_XX<0x769efc00>; 492 493def VEXT2XV_H_B : LASX2R_XX<0x769f1000>; 494def VEXT2XV_W_B : LASX2R_XX<0x769f1400>; 495def VEXT2XV_D_B : LASX2R_XX<0x769f1800>; 496def VEXT2XV_W_H : LASX2R_XX<0x769f1c00>; 497def VEXT2XV_D_H : LASX2R_XX<0x769f2000>; 498def VEXT2XV_D_W : LASX2R_XX<0x769f2400>; 499def VEXT2XV_HU_BU : LASX2R_XX<0x769f2800>; 500def VEXT2XV_WU_BU : LASX2R_XX<0x769f2c00>; 501def VEXT2XV_DU_BU : LASX2R_XX<0x769f3000>; 502def VEXT2XV_WU_HU : LASX2R_XX<0x769f3400>; 503def VEXT2XV_DU_HU : LASX2R_XX<0x769f3800>; 504def VEXT2XV_DU_WU : LASX2R_XX<0x769f3c00>; 505 506def XVHSELI_D : LASX2RI5_XXI<0x769f8000>; 507 508def XVSIGNCOV_B : LASX3R_XXX<0x752e0000>; 509def XVSIGNCOV_H : LASX3R_XXX<0x752e8000>; 510def XVSIGNCOV_W : LASX3R_XXX<0x752f0000>; 511def XVSIGNCOV_D : LASX3R_XXX<0x752f8000>; 512 513def XVMSKLTZ_B : LASX2R_XX<0x769c4000>; 514def XVMSKLTZ_H : LASX2R_XX<0x769c4400>; 515def XVMSKLTZ_W : LASX2R_XX<0x769c4800>; 516def XVMSKLTZ_D : LASX2R_XX<0x769c4c00>; 517 518def XVMSKGEZ_B : LASX2R_XX<0x769c5000>; 519 520def XVMSKNZ_B : LASX2R_XX<0x769c6000>; 521 522def XVLDI : LASX1RI13_XI<0x77e00000>; 523 524def XVAND_V : LASX3R_XXX<0x75260000>; 525def XVOR_V : LASX3R_XXX<0x75268000>; 526def XVXOR_V : LASX3R_XXX<0x75270000>; 527def XVNOR_V : LASX3R_XXX<0x75278000>; 528def XVANDN_V : LASX3R_XXX<0x75280000>; 529def XVORN_V : LASX3R_XXX<0x75288000>; 530 531def XVANDI_B : LASX2RI8_XXI<0x77d00000>; 532def XVORI_B : LASX2RI8_XXI<0x77d40000>; 533def XVXORI_B : LASX2RI8_XXI<0x77d80000>; 534def XVNORI_B : LASX2RI8_XXI<0x77dc0000>; 535 536def XVSLL_B : LASX3R_XXX<0x74e80000>; 537def XVSLL_H : LASX3R_XXX<0x74e88000>; 538def XVSLL_W : LASX3R_XXX<0x74e90000>; 539def XVSLL_D : LASX3R_XXX<0x74e98000>; 540def XVSLLI_B : LASX2RI3_XXI<0x772c2000>; 541def XVSLLI_H : LASX2RI4_XXI<0x772c4000>; 542def XVSLLI_W : LASX2RI5_XXI<0x772c8000>; 543def XVSLLI_D : LASX2RI6_XXI<0x772d0000>; 544 545def XVSRL_B : LASX3R_XXX<0x74ea0000>; 546def XVSRL_H : LASX3R_XXX<0x74ea8000>; 547def XVSRL_W : LASX3R_XXX<0x74eb0000>; 548def XVSRL_D : LASX3R_XXX<0x74eb8000>; 549def XVSRLI_B : LASX2RI3_XXI<0x77302000>; 550def XVSRLI_H : LASX2RI4_XXI<0x77304000>; 551def XVSRLI_W : LASX2RI5_XXI<0x77308000>; 552def XVSRLI_D : LASX2RI6_XXI<0x77310000>; 553 554def XVSRA_B : LASX3R_XXX<0x74ec0000>; 555def XVSRA_H : LASX3R_XXX<0x74ec8000>; 556def XVSRA_W : LASX3R_XXX<0x74ed0000>; 557def XVSRA_D : LASX3R_XXX<0x74ed8000>; 558def XVSRAI_B : LASX2RI3_XXI<0x77342000>; 559def XVSRAI_H : LASX2RI4_XXI<0x77344000>; 560def XVSRAI_W : LASX2RI5_XXI<0x77348000>; 561def XVSRAI_D : LASX2RI6_XXI<0x77350000>; 562 563def XVROTR_B : LASX3R_XXX<0x74ee0000>; 564def XVROTR_H : LASX3R_XXX<0x74ee8000>; 565def XVROTR_W : LASX3R_XXX<0x74ef0000>; 566def XVROTR_D : LASX3R_XXX<0x74ef8000>; 567def XVROTRI_B : LASX2RI3_XXI<0x76a02000>; 568def XVROTRI_H : LASX2RI4_XXI<0x76a04000>; 569def XVROTRI_W : LASX2RI5_XXI<0x76a08000>; 570def XVROTRI_D : LASX2RI6_XXI<0x76a10000>; 571 572def XVSLLWIL_H_B : LASX2RI3_XXI<0x77082000>; 573def XVSLLWIL_W_H : LASX2RI4_XXI<0x77084000>; 574def XVSLLWIL_D_W : LASX2RI5_XXI<0x77088000>; 575def XVEXTL_Q_D : LASX2R_XX<0x77090000>; 576def XVSLLWIL_HU_BU : LASX2RI3_XXI<0x770c2000>; 577def XVSLLWIL_WU_HU : LASX2RI4_XXI<0x770c4000>; 578def XVSLLWIL_DU_WU : LASX2RI5_XXI<0x770c8000>; 579def XVEXTL_QU_DU : LASX2R_XX<0x770d0000>; 580 581def XVSRLR_B : LASX3R_XXX<0x74f00000>; 582def XVSRLR_H : LASX3R_XXX<0x74f08000>; 583def XVSRLR_W : LASX3R_XXX<0x74f10000>; 584def XVSRLR_D : LASX3R_XXX<0x74f18000>; 585def XVSRLRI_B : LASX2RI3_XXI<0x76a42000>; 586def XVSRLRI_H : LASX2RI4_XXI<0x76a44000>; 587def XVSRLRI_W : LASX2RI5_XXI<0x76a48000>; 588def XVSRLRI_D : LASX2RI6_XXI<0x76a50000>; 589 590def XVSRAR_B : LASX3R_XXX<0x74f20000>; 591def XVSRAR_H : LASX3R_XXX<0x74f28000>; 592def XVSRAR_W : LASX3R_XXX<0x74f30000>; 593def XVSRAR_D : LASX3R_XXX<0x74f38000>; 594def XVSRARI_B : LASX2RI3_XXI<0x76a82000>; 595def XVSRARI_H : LASX2RI4_XXI<0x76a84000>; 596def XVSRARI_W : LASX2RI5_XXI<0x76a88000>; 597def XVSRARI_D : LASX2RI6_XXI<0x76a90000>; 598 599def XVSRLN_B_H : LASX3R_XXX<0x74f48000>; 600def XVSRLN_H_W : LASX3R_XXX<0x74f50000>; 601def XVSRLN_W_D : LASX3R_XXX<0x74f58000>; 602def XVSRAN_B_H : LASX3R_XXX<0x74f68000>; 603def XVSRAN_H_W : LASX3R_XXX<0x74f70000>; 604def XVSRAN_W_D : LASX3R_XXX<0x74f78000>; 605 606def XVSRLNI_B_H : LASX2RI4_XXXI<0x77404000>; 607def XVSRLNI_H_W : LASX2RI5_XXXI<0x77408000>; 608def XVSRLNI_W_D : LASX2RI6_XXXI<0x77410000>; 609def XVSRLNI_D_Q : LASX2RI7_XXXI<0x77420000>; 610def XVSRANI_B_H : LASX2RI4_XXXI<0x77584000>; 611def XVSRANI_H_W : LASX2RI5_XXXI<0x77588000>; 612def XVSRANI_W_D : LASX2RI6_XXXI<0x77590000>; 613def XVSRANI_D_Q : LASX2RI7_XXXI<0x775a0000>; 614 615def XVSRLRN_B_H : LASX3R_XXX<0x74f88000>; 616def XVSRLRN_H_W : LASX3R_XXX<0x74f90000>; 617def XVSRLRN_W_D : LASX3R_XXX<0x74f98000>; 618def XVSRARN_B_H : LASX3R_XXX<0x74fa8000>; 619def XVSRARN_H_W : LASX3R_XXX<0x74fb0000>; 620def XVSRARN_W_D : LASX3R_XXX<0x74fb8000>; 621 622def XVSRLRNI_B_H : LASX2RI4_XXXI<0x77444000>; 623def XVSRLRNI_H_W : LASX2RI5_XXXI<0x77448000>; 624def XVSRLRNI_W_D : LASX2RI6_XXXI<0x77450000>; 625def XVSRLRNI_D_Q : LASX2RI7_XXXI<0x77460000>; 626def XVSRARNI_B_H : LASX2RI4_XXXI<0x775c4000>; 627def XVSRARNI_H_W : LASX2RI5_XXXI<0x775c8000>; 628def XVSRARNI_W_D : LASX2RI6_XXXI<0x775d0000>; 629def XVSRARNI_D_Q : LASX2RI7_XXXI<0x775e0000>; 630 631def XVSSRLN_B_H : LASX3R_XXX<0x74fc8000>; 632def XVSSRLN_H_W : LASX3R_XXX<0x74fd0000>; 633def XVSSRLN_W_D : LASX3R_XXX<0x74fd8000>; 634def XVSSRAN_B_H : LASX3R_XXX<0x74fe8000>; 635def XVSSRAN_H_W : LASX3R_XXX<0x74ff0000>; 636def XVSSRAN_W_D : LASX3R_XXX<0x74ff8000>; 637def XVSSRLN_BU_H : LASX3R_XXX<0x75048000>; 638def XVSSRLN_HU_W : LASX3R_XXX<0x75050000>; 639def XVSSRLN_WU_D : LASX3R_XXX<0x75058000>; 640def XVSSRAN_BU_H : LASX3R_XXX<0x75068000>; 641def XVSSRAN_HU_W : LASX3R_XXX<0x75070000>; 642def XVSSRAN_WU_D : LASX3R_XXX<0x75078000>; 643 644def XVSSRLNI_B_H : LASX2RI4_XXXI<0x77484000>; 645def XVSSRLNI_H_W : LASX2RI5_XXXI<0x77488000>; 646def XVSSRLNI_W_D : LASX2RI6_XXXI<0x77490000>; 647def XVSSRLNI_D_Q : LASX2RI7_XXXI<0x774a0000>; 648def XVSSRANI_B_H : LASX2RI4_XXXI<0x77604000>; 649def XVSSRANI_H_W : LASX2RI5_XXXI<0x77608000>; 650def XVSSRANI_W_D : LASX2RI6_XXXI<0x77610000>; 651def XVSSRANI_D_Q : LASX2RI7_XXXI<0x77620000>; 652def XVSSRLNI_BU_H : LASX2RI4_XXXI<0x774c4000>; 653def XVSSRLNI_HU_W : LASX2RI5_XXXI<0x774c8000>; 654def XVSSRLNI_WU_D : LASX2RI6_XXXI<0x774d0000>; 655def XVSSRLNI_DU_Q : LASX2RI7_XXXI<0x774e0000>; 656def XVSSRANI_BU_H : LASX2RI4_XXXI<0x77644000>; 657def XVSSRANI_HU_W : LASX2RI5_XXXI<0x77648000>; 658def XVSSRANI_WU_D : LASX2RI6_XXXI<0x77650000>; 659def XVSSRANI_DU_Q : LASX2RI7_XXXI<0x77660000>; 660 661def XVSSRLRN_B_H : LASX3R_XXX<0x75008000>; 662def XVSSRLRN_H_W : LASX3R_XXX<0x75010000>; 663def XVSSRLRN_W_D : LASX3R_XXX<0x75018000>; 664def XVSSRARN_B_H : LASX3R_XXX<0x75028000>; 665def XVSSRARN_H_W : LASX3R_XXX<0x75030000>; 666def XVSSRARN_W_D : LASX3R_XXX<0x75038000>; 667def XVSSRLRN_BU_H : LASX3R_XXX<0x75088000>; 668def XVSSRLRN_HU_W : LASX3R_XXX<0x75090000>; 669def XVSSRLRN_WU_D : LASX3R_XXX<0x75098000>; 670def XVSSRARN_BU_H : LASX3R_XXX<0x750a8000>; 671def XVSSRARN_HU_W : LASX3R_XXX<0x750b0000>; 672def XVSSRARN_WU_D : LASX3R_XXX<0x750b8000>; 673 674def XVSSRLRNI_B_H : LASX2RI4_XXXI<0x77504000>; 675def XVSSRLRNI_H_W : LASX2RI5_XXXI<0x77508000>; 676def XVSSRLRNI_W_D : LASX2RI6_XXXI<0x77510000>; 677def XVSSRLRNI_D_Q : LASX2RI7_XXXI<0x77520000>; 678def XVSSRARNI_B_H : LASX2RI4_XXXI<0x77684000>; 679def XVSSRARNI_H_W : LASX2RI5_XXXI<0x77688000>; 680def XVSSRARNI_W_D : LASX2RI6_XXXI<0x77690000>; 681def XVSSRARNI_D_Q : LASX2RI7_XXXI<0x776a0000>; 682def XVSSRLRNI_BU_H : LASX2RI4_XXXI<0x77544000>; 683def XVSSRLRNI_HU_W : LASX2RI5_XXXI<0x77548000>; 684def XVSSRLRNI_WU_D : LASX2RI6_XXXI<0x77550000>; 685def XVSSRLRNI_DU_Q : LASX2RI7_XXXI<0x77560000>; 686def XVSSRARNI_BU_H : LASX2RI4_XXXI<0x776c4000>; 687def XVSSRARNI_HU_W : LASX2RI5_XXXI<0x776c8000>; 688def XVSSRARNI_WU_D : LASX2RI6_XXXI<0x776d0000>; 689def XVSSRARNI_DU_Q : LASX2RI7_XXXI<0x776e0000>; 690 691def XVCLO_B : LASX2R_XX<0x769c0000>; 692def XVCLO_H : LASX2R_XX<0x769c0400>; 693def XVCLO_W : LASX2R_XX<0x769c0800>; 694def XVCLO_D : LASX2R_XX<0x769c0c00>; 695def XVCLZ_B : LASX2R_XX<0x769c1000>; 696def XVCLZ_H : LASX2R_XX<0x769c1400>; 697def XVCLZ_W : LASX2R_XX<0x769c1800>; 698def XVCLZ_D : LASX2R_XX<0x769c1c00>; 699 700def XVPCNT_B : LASX2R_XX<0x769c2000>; 701def XVPCNT_H : LASX2R_XX<0x769c2400>; 702def XVPCNT_W : LASX2R_XX<0x769c2800>; 703def XVPCNT_D : LASX2R_XX<0x769c2c00>; 704 705def XVBITCLR_B : LASX3R_XXX<0x750c0000>; 706def XVBITCLR_H : LASX3R_XXX<0x750c8000>; 707def XVBITCLR_W : LASX3R_XXX<0x750d0000>; 708def XVBITCLR_D : LASX3R_XXX<0x750d8000>; 709def XVBITCLRI_B : LASX2RI3_XXI<0x77102000>; 710def XVBITCLRI_H : LASX2RI4_XXI<0x77104000>; 711def XVBITCLRI_W : LASX2RI5_XXI<0x77108000>; 712def XVBITCLRI_D : LASX2RI6_XXI<0x77110000>; 713 714def XVBITSET_B : LASX3R_XXX<0x750e0000>; 715def XVBITSET_H : LASX3R_XXX<0x750e8000>; 716def XVBITSET_W : LASX3R_XXX<0x750f0000>; 717def XVBITSET_D : LASX3R_XXX<0x750f8000>; 718def XVBITSETI_B : LASX2RI3_XXI<0x77142000>; 719def XVBITSETI_H : LASX2RI4_XXI<0x77144000>; 720def XVBITSETI_W : LASX2RI5_XXI<0x77148000>; 721def XVBITSETI_D : LASX2RI6_XXI<0x77150000>; 722 723def XVBITREV_B : LASX3R_XXX<0x75100000>; 724def XVBITREV_H : LASX3R_XXX<0x75108000>; 725def XVBITREV_W : LASX3R_XXX<0x75110000>; 726def XVBITREV_D : LASX3R_XXX<0x75118000>; 727def XVBITREVI_B : LASX2RI3_XXI<0x77182000>; 728def XVBITREVI_H : LASX2RI4_XXI<0x77184000>; 729def XVBITREVI_W : LASX2RI5_XXI<0x77188000>; 730def XVBITREVI_D : LASX2RI6_XXI<0x77190000>; 731 732def XVFRSTP_B : LASX3R_XXXX<0x752b0000>; 733def XVFRSTP_H : LASX3R_XXXX<0x752b8000>; 734def XVFRSTPI_B : LASX2RI5_XXXI<0x769a0000>; 735def XVFRSTPI_H : LASX2RI5_XXXI<0x769a8000>; 736 737def XVFADD_S : LASX3R_XXX<0x75308000>; 738def XVFADD_D : LASX3R_XXX<0x75310000>; 739def XVFSUB_S : LASX3R_XXX<0x75328000>; 740def XVFSUB_D : LASX3R_XXX<0x75330000>; 741def XVFMUL_S : LASX3R_XXX<0x75388000>; 742def XVFMUL_D : LASX3R_XXX<0x75390000>; 743def XVFDIV_S : LASX3R_XXX<0x753a8000>; 744def XVFDIV_D : LASX3R_XXX<0x753b0000>; 745 746def XVFMADD_S : LASX4R_XXXX<0x0a100000>; 747def XVFMADD_D : LASX4R_XXXX<0x0a200000>; 748def XVFMSUB_S : LASX4R_XXXX<0x0a500000>; 749def XVFMSUB_D : LASX4R_XXXX<0x0a600000>; 750def XVFNMADD_S : LASX4R_XXXX<0x0a900000>; 751def XVFNMADD_D : LASX4R_XXXX<0x0aa00000>; 752def XVFNMSUB_S : LASX4R_XXXX<0x0ad00000>; 753def XVFNMSUB_D : LASX4R_XXXX<0x0ae00000>; 754 755def XVFMAX_S : LASX3R_XXX<0x753c8000>; 756def XVFMAX_D : LASX3R_XXX<0x753d0000>; 757def XVFMIN_S : LASX3R_XXX<0x753e8000>; 758def XVFMIN_D : LASX3R_XXX<0x753f0000>; 759 760def XVFMAXA_S : LASX3R_XXX<0x75408000>; 761def XVFMAXA_D : LASX3R_XXX<0x75410000>; 762def XVFMINA_S : LASX3R_XXX<0x75428000>; 763def XVFMINA_D : LASX3R_XXX<0x75430000>; 764 765def XVFLOGB_S : LASX2R_XX<0x769cc400>; 766def XVFLOGB_D : LASX2R_XX<0x769cc800>; 767 768def XVFCLASS_S : LASX2R_XX<0x769cd400>; 769def XVFCLASS_D : LASX2R_XX<0x769cd800>; 770 771def XVFSQRT_S : LASX2R_XX<0x769ce400>; 772def XVFSQRT_D : LASX2R_XX<0x769ce800>; 773def XVFRECIP_S : LASX2R_XX<0x769cf400>; 774def XVFRECIP_D : LASX2R_XX<0x769cf800>; 775def XVFRSQRT_S : LASX2R_XX<0x769d0400>; 776def XVFRSQRT_D : LASX2R_XX<0x769d0800>; 777def XVFRECIPE_S : LASX2R_XX<0x769d1400>; 778def XVFRECIPE_D : LASX2R_XX<0x769d1800>; 779def XVFRSQRTE_S : LASX2R_XX<0x769d2400>; 780def XVFRSQRTE_D : LASX2R_XX<0x769d2800>; 781 782def XVFCVTL_S_H : LASX2R_XX<0x769de800>; 783def XVFCVTH_S_H : LASX2R_XX<0x769dec00>; 784def XVFCVTL_D_S : LASX2R_XX<0x769df000>; 785def XVFCVTH_D_S : LASX2R_XX<0x769df400>; 786def XVFCVT_H_S : LASX3R_XXX<0x75460000>; 787def XVFCVT_S_D : LASX3R_XXX<0x75468000>; 788 789def XVFRINTRNE_S : LASX2R_XX<0x769d7400>; 790def XVFRINTRNE_D : LASX2R_XX<0x769d7800>; 791def XVFRINTRZ_S : LASX2R_XX<0x769d6400>; 792def XVFRINTRZ_D : LASX2R_XX<0x769d6800>; 793def XVFRINTRP_S : LASX2R_XX<0x769d5400>; 794def XVFRINTRP_D : LASX2R_XX<0x769d5800>; 795def XVFRINTRM_S : LASX2R_XX<0x769d4400>; 796def XVFRINTRM_D : LASX2R_XX<0x769d4800>; 797def XVFRINT_S : LASX2R_XX<0x769d3400>; 798def XVFRINT_D : LASX2R_XX<0x769d3800>; 799 800def XVFTINTRNE_W_S : LASX2R_XX<0x769e5000>; 801def XVFTINTRNE_L_D : LASX2R_XX<0x769e5400>; 802def XVFTINTRZ_W_S : LASX2R_XX<0x769e4800>; 803def XVFTINTRZ_L_D : LASX2R_XX<0x769e4c00>; 804def XVFTINTRP_W_S : LASX2R_XX<0x769e4000>; 805def XVFTINTRP_L_D : LASX2R_XX<0x769e4400>; 806def XVFTINTRM_W_S : LASX2R_XX<0x769e3800>; 807def XVFTINTRM_L_D : LASX2R_XX<0x769e3c00>; 808def XVFTINT_W_S : LASX2R_XX<0x769e3000>; 809def XVFTINT_L_D : LASX2R_XX<0x769e3400>; 810def XVFTINTRZ_WU_S : LASX2R_XX<0x769e7000>; 811def XVFTINTRZ_LU_D : LASX2R_XX<0x769e7400>; 812def XVFTINT_WU_S : LASX2R_XX<0x769e5800>; 813def XVFTINT_LU_D : LASX2R_XX<0x769e5c00>; 814 815def XVFTINTRNE_W_D : LASX3R_XXX<0x754b8000>; 816def XVFTINTRZ_W_D : LASX3R_XXX<0x754b0000>; 817def XVFTINTRP_W_D : LASX3R_XXX<0x754a8000>; 818def XVFTINTRM_W_D : LASX3R_XXX<0x754a0000>; 819def XVFTINT_W_D : LASX3R_XXX<0x75498000>; 820 821def XVFTINTRNEL_L_S : LASX2R_XX<0x769ea000>; 822def XVFTINTRNEH_L_S : LASX2R_XX<0x769ea400>; 823def XVFTINTRZL_L_S : LASX2R_XX<0x769e9800>; 824def XVFTINTRZH_L_S : LASX2R_XX<0x769e9c00>; 825def XVFTINTRPL_L_S : LASX2R_XX<0x769e9000>; 826def XVFTINTRPH_L_S : LASX2R_XX<0x769e9400>; 827def XVFTINTRML_L_S : LASX2R_XX<0x769e8800>; 828def XVFTINTRMH_L_S : LASX2R_XX<0x769e8c00>; 829def XVFTINTL_L_S : LASX2R_XX<0x769e8000>; 830def XVFTINTH_L_S : LASX2R_XX<0x769e8400>; 831 832def XVFFINT_S_W : LASX2R_XX<0x769e0000>; 833def XVFFINT_D_L : LASX2R_XX<0x769e0800>; 834def XVFFINT_S_WU : LASX2R_XX<0x769e0400>; 835def XVFFINT_D_LU : LASX2R_XX<0x769e0c00>; 836def XVFFINTL_D_W : LASX2R_XX<0x769e1000>; 837def XVFFINTH_D_W : LASX2R_XX<0x769e1400>; 838def XVFFINT_S_L : LASX3R_XXX<0x75480000>; 839 840def XVSEQ_B : LASX3R_XXX<0x74000000>; 841def XVSEQ_H : LASX3R_XXX<0x74008000>; 842def XVSEQ_W : LASX3R_XXX<0x74010000>; 843def XVSEQ_D : LASX3R_XXX<0x74018000>; 844def XVSEQI_B : LASX2RI5_XXI<0x76800000, simm5>; 845def XVSEQI_H : LASX2RI5_XXI<0x76808000, simm5>; 846def XVSEQI_W : LASX2RI5_XXI<0x76810000, simm5>; 847def XVSEQI_D : LASX2RI5_XXI<0x76818000, simm5>; 848 849def XVSLE_B : LASX3R_XXX<0x74020000>; 850def XVSLE_H : LASX3R_XXX<0x74028000>; 851def XVSLE_W : LASX3R_XXX<0x74030000>; 852def XVSLE_D : LASX3R_XXX<0x74038000>; 853def XVSLEI_B : LASX2RI5_XXI<0x76820000, simm5>; 854def XVSLEI_H : LASX2RI5_XXI<0x76828000, simm5>; 855def XVSLEI_W : LASX2RI5_XXI<0x76830000, simm5>; 856def XVSLEI_D : LASX2RI5_XXI<0x76838000, simm5>; 857 858def XVSLE_BU : LASX3R_XXX<0x74040000>; 859def XVSLE_HU : LASX3R_XXX<0x74048000>; 860def XVSLE_WU : LASX3R_XXX<0x74050000>; 861def XVSLE_DU : LASX3R_XXX<0x74058000>; 862def XVSLEI_BU : LASX2RI5_XXI<0x76840000>; 863def XVSLEI_HU : LASX2RI5_XXI<0x76848000>; 864def XVSLEI_WU : LASX2RI5_XXI<0x76850000>; 865def XVSLEI_DU : LASX2RI5_XXI<0x76858000>; 866 867def XVSLT_B : LASX3R_XXX<0x74060000>; 868def XVSLT_H : LASX3R_XXX<0x74068000>; 869def XVSLT_W : LASX3R_XXX<0x74070000>; 870def XVSLT_D : LASX3R_XXX<0x74078000>; 871def XVSLTI_B : LASX2RI5_XXI<0x76860000, simm5>; 872def XVSLTI_H : LASX2RI5_XXI<0x76868000, simm5>; 873def XVSLTI_W : LASX2RI5_XXI<0x76870000, simm5>; 874def XVSLTI_D : LASX2RI5_XXI<0x76878000, simm5>; 875 876def XVSLT_BU : LASX3R_XXX<0x74080000>; 877def XVSLT_HU : LASX3R_XXX<0x74088000>; 878def XVSLT_WU : LASX3R_XXX<0x74090000>; 879def XVSLT_DU : LASX3R_XXX<0x74098000>; 880def XVSLTI_BU : LASX2RI5_XXI<0x76880000>; 881def XVSLTI_HU : LASX2RI5_XXI<0x76888000>; 882def XVSLTI_WU : LASX2RI5_XXI<0x76890000>; 883def XVSLTI_DU : LASX2RI5_XXI<0x76898000>; 884 885def XVFCMP_CAF_S : LASX3R_XXX<0x0c900000>; 886def XVFCMP_SAF_S : LASX3R_XXX<0x0c908000>; 887def XVFCMP_CLT_S : LASX3R_XXX<0x0c910000>; 888def XVFCMP_SLT_S : LASX3R_XXX<0x0c918000>; 889def XVFCMP_CEQ_S : LASX3R_XXX<0x0c920000>; 890def XVFCMP_SEQ_S : LASX3R_XXX<0x0c928000>; 891def XVFCMP_CLE_S : LASX3R_XXX<0x0c930000>; 892def XVFCMP_SLE_S : LASX3R_XXX<0x0c938000>; 893def XVFCMP_CUN_S : LASX3R_XXX<0x0c940000>; 894def XVFCMP_SUN_S : LASX3R_XXX<0x0c948000>; 895def XVFCMP_CULT_S : LASX3R_XXX<0x0c950000>; 896def XVFCMP_SULT_S : LASX3R_XXX<0x0c958000>; 897def XVFCMP_CUEQ_S : LASX3R_XXX<0x0c960000>; 898def XVFCMP_SUEQ_S : LASX3R_XXX<0x0c968000>; 899def XVFCMP_CULE_S : LASX3R_XXX<0x0c970000>; 900def XVFCMP_SULE_S : LASX3R_XXX<0x0c978000>; 901def XVFCMP_CNE_S : LASX3R_XXX<0x0c980000>; 902def XVFCMP_SNE_S : LASX3R_XXX<0x0c988000>; 903def XVFCMP_COR_S : LASX3R_XXX<0x0c9a0000>; 904def XVFCMP_SOR_S : LASX3R_XXX<0x0c9a8000>; 905def XVFCMP_CUNE_S : LASX3R_XXX<0x0c9c0000>; 906def XVFCMP_SUNE_S : LASX3R_XXX<0x0c9c8000>; 907 908def XVFCMP_CAF_D : LASX3R_XXX<0x0ca00000>; 909def XVFCMP_SAF_D : LASX3R_XXX<0x0ca08000>; 910def XVFCMP_CLT_D : LASX3R_XXX<0x0ca10000>; 911def XVFCMP_SLT_D : LASX3R_XXX<0x0ca18000>; 912def XVFCMP_CEQ_D : LASX3R_XXX<0x0ca20000>; 913def XVFCMP_SEQ_D : LASX3R_XXX<0x0ca28000>; 914def XVFCMP_CLE_D : LASX3R_XXX<0x0ca30000>; 915def XVFCMP_SLE_D : LASX3R_XXX<0x0ca38000>; 916def XVFCMP_CUN_D : LASX3R_XXX<0x0ca40000>; 917def XVFCMP_SUN_D : LASX3R_XXX<0x0ca48000>; 918def XVFCMP_CULT_D : LASX3R_XXX<0x0ca50000>; 919def XVFCMP_SULT_D : LASX3R_XXX<0x0ca58000>; 920def XVFCMP_CUEQ_D : LASX3R_XXX<0x0ca60000>; 921def XVFCMP_SUEQ_D : LASX3R_XXX<0x0ca68000>; 922def XVFCMP_CULE_D : LASX3R_XXX<0x0ca70000>; 923def XVFCMP_SULE_D : LASX3R_XXX<0x0ca78000>; 924def XVFCMP_CNE_D : LASX3R_XXX<0x0ca80000>; 925def XVFCMP_SNE_D : LASX3R_XXX<0x0ca88000>; 926def XVFCMP_COR_D : LASX3R_XXX<0x0caa0000>; 927def XVFCMP_SOR_D : LASX3R_XXX<0x0caa8000>; 928def XVFCMP_CUNE_D : LASX3R_XXX<0x0cac0000>; 929def XVFCMP_SUNE_D : LASX3R_XXX<0x0cac8000>; 930 931def XVBITSEL_V : LASX4R_XXXX<0x0d200000>; 932 933def XVBITSELI_B : LASX2RI8_XXXI<0x77c40000>; 934 935def XVSETEQZ_V : LASX2R_CX<0x769c9800>; 936def XVSETNEZ_V : LASX2R_CX<0x769c9c00>; 937def XVSETANYEQZ_B : LASX2R_CX<0x769ca000>; 938def XVSETANYEQZ_H : LASX2R_CX<0x769ca400>; 939def XVSETANYEQZ_W : LASX2R_CX<0x769ca800>; 940def XVSETANYEQZ_D : LASX2R_CX<0x769cac00>; 941def XVSETALLNEZ_B : LASX2R_CX<0x769cb000>; 942def XVSETALLNEZ_H : LASX2R_CX<0x769cb400>; 943def XVSETALLNEZ_W : LASX2R_CX<0x769cb800>; 944def XVSETALLNEZ_D : LASX2R_CX<0x769cbc00>; 945 946def XVINSGR2VR_W : LASX2RI3_XXRI<0x76ebc000>; 947def XVINSGR2VR_D : LASX2RI2_XXRI<0x76ebe000>; 948def XVPICKVE2GR_W : LASX2RI3_RXI<0x76efc000>; 949def XVPICKVE2GR_D : LASX2RI2_RXI<0x76efe000>; 950def XVPICKVE2GR_WU : LASX2RI3_RXI<0x76f3c000>; 951def XVPICKVE2GR_DU : LASX2RI2_RXI<0x76f3e000>; 952 953def XVREPLGR2VR_B : LASX2R_XR<0x769f0000>; 954def XVREPLGR2VR_H : LASX2R_XR<0x769f0400>; 955def XVREPLGR2VR_W : LASX2R_XR<0x769f0800>; 956def XVREPLGR2VR_D : LASX2R_XR<0x769f0c00>; 957 958def XVREPLVE_B : LASX3R_XXR<0x75220000>; 959def XVREPLVE_H : LASX3R_XXR<0x75228000>; 960def XVREPLVE_W : LASX3R_XXR<0x75230000>; 961def XVREPLVE_D : LASX3R_XXR<0x75238000>; 962def XVREPL128VEI_B : LASX2RI4_XXI<0x76f78000>; 963def XVREPL128VEI_H : LASX2RI3_XXI<0x76f7c000>; 964def XVREPL128VEI_W : LASX2RI2_XXI<0x76f7e000>; 965def XVREPL128VEI_D : LASX2RI1_XXI<0x76f7f000>; 966 967def XVREPLVE0_B : LASX2R_XX<0x77070000>; 968def XVREPLVE0_H : LASX2R_XX<0x77078000>; 969def XVREPLVE0_W : LASX2R_XX<0x7707c000>; 970def XVREPLVE0_D : LASX2R_XX<0x7707e000>; 971def XVREPLVE0_Q : LASX2R_XX<0x7707f000>; 972 973def XVINSVE0_W : LASX2RI3_XXXI<0x76ffc000>; 974def XVINSVE0_D : LASX2RI2_XXXI<0x76ffe000>; 975 976def XVPICKVE_W : LASX2RI3_XXI<0x7703c000>; 977def XVPICKVE_D : LASX2RI2_XXI<0x7703e000>; 978 979def XVBSLL_V : LASX2RI5_XXI<0x768e0000>; 980def XVBSRL_V : LASX2RI5_XXI<0x768e8000>; 981 982def XVPACKEV_B : LASX3R_XXX<0x75160000>; 983def XVPACKEV_H : LASX3R_XXX<0x75168000>; 984def XVPACKEV_W : LASX3R_XXX<0x75170000>; 985def XVPACKEV_D : LASX3R_XXX<0x75178000>; 986def XVPACKOD_B : LASX3R_XXX<0x75180000>; 987def XVPACKOD_H : LASX3R_XXX<0x75188000>; 988def XVPACKOD_W : LASX3R_XXX<0x75190000>; 989def XVPACKOD_D : LASX3R_XXX<0x75198000>; 990 991def XVPICKEV_B : LASX3R_XXX<0x751e0000>; 992def XVPICKEV_H : LASX3R_XXX<0x751e8000>; 993def XVPICKEV_W : LASX3R_XXX<0x751f0000>; 994def XVPICKEV_D : LASX3R_XXX<0x751f8000>; 995def XVPICKOD_B : LASX3R_XXX<0x75200000>; 996def XVPICKOD_H : LASX3R_XXX<0x75208000>; 997def XVPICKOD_W : LASX3R_XXX<0x75210000>; 998def XVPICKOD_D : LASX3R_XXX<0x75218000>; 999 1000def XVILVL_B : LASX3R_XXX<0x751a0000>; 1001def XVILVL_H : LASX3R_XXX<0x751a8000>; 1002def XVILVL_W : LASX3R_XXX<0x751b0000>; 1003def XVILVL_D : LASX3R_XXX<0x751b8000>; 1004def XVILVH_B : LASX3R_XXX<0x751c0000>; 1005def XVILVH_H : LASX3R_XXX<0x751c8000>; 1006def XVILVH_W : LASX3R_XXX<0x751d0000>; 1007def XVILVH_D : LASX3R_XXX<0x751d8000>; 1008 1009def XVSHUF_B : LASX4R_XXXX<0x0d600000>; 1010 1011def XVSHUF_H : LASX3R_XXXX<0x757a8000>; 1012def XVSHUF_W : LASX3R_XXXX<0x757b0000>; 1013def XVSHUF_D : LASX3R_XXXX<0x757b8000>; 1014 1015def XVPERM_W : LASX3R_XXX<0x757d0000>; 1016 1017def XVSHUF4I_B : LASX2RI8_XXI<0x77900000>; 1018def XVSHUF4I_H : LASX2RI8_XXI<0x77940000>; 1019def XVSHUF4I_W : LASX2RI8_XXI<0x77980000>; 1020def XVSHUF4I_D : LASX2RI8_XXXI<0x779c0000>; 1021 1022def XVPERMI_W : LASX2RI8_XXXI<0x77e40000>; 1023def XVPERMI_D : LASX2RI8_XXI<0x77e80000>; 1024def XVPERMI_Q : LASX2RI8_XXXI<0x77ec0000>; 1025 1026def XVEXTRINS_D : LASX2RI8_XXXI<0x77800000>; 1027def XVEXTRINS_W : LASX2RI8_XXXI<0x77840000>; 1028def XVEXTRINS_H : LASX2RI8_XXXI<0x77880000>; 1029def XVEXTRINS_B : LASX2RI8_XXXI<0x778c0000>; 1030} // mayLoad = 0, mayStore = 0 1031 1032let mayLoad = 1, mayStore = 0 in { 1033def XVLD : LASX2RI12_Load<0x2c800000>; 1034def XVLDX : LASX3R_Load<0x38480000>; 1035 1036def XVLDREPL_B : LASX2RI12_Load<0x32800000>; 1037def XVLDREPL_H : LASX2RI11_Load<0x32400000>; 1038def XVLDREPL_W : LASX2RI10_Load<0x32200000>; 1039def XVLDREPL_D : LASX2RI9_Load<0x32100000>; 1040} // mayLoad = 1, mayStore = 0 1041 1042let mayLoad = 0, mayStore = 1 in { 1043def XVST : LASX2RI12_Store<0x2cc00000>; 1044def XVSTX : LASX3R_Store<0x384c0000>; 1045 1046def XVSTELM_B : LASX2RI8I5_XRII<0x33800000>; 1047def XVSTELM_H : LASX2RI8I4_XRII<0x33400000, simm8_lsl1>; 1048def XVSTELM_W : LASX2RI8I3_XRII<0x33200000, simm8_lsl2>; 1049def XVSTELM_D : LASX2RI8I2_XRII<0x33100000, simm8_lsl3>; 1050} // mayLoad = 0, mayStore = 1 1051 1052} // hasSideEffects = 0, Predicates = [HasExtLASX] 1053 1054/// Pseudo-instructions 1055 1056let Predicates = [HasExtLASX] in { 1057 1058let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0, 1059 isAsmParserOnly = 1 in { 1060def PseudoXVREPLI_B : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1061 "xvrepli.b", "$xd, $imm">; 1062def PseudoXVREPLI_H : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1063 "xvrepli.h", "$xd, $imm">; 1064def PseudoXVREPLI_W : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1065 "xvrepli.w", "$xd, $imm">; 1066def PseudoXVREPLI_D : Pseudo<(outs LASX256:$xd), (ins simm10:$imm), [], 1067 "xvrepli.d", "$xd, $imm">; 1068} 1069 1070def PseudoXVBNZ_B : VecCond<loongarch_vall_nonzero, v32i8, LASX256>; 1071def PseudoXVBNZ_H : VecCond<loongarch_vall_nonzero, v16i16, LASX256>; 1072def PseudoXVBNZ_W : VecCond<loongarch_vall_nonzero, v8i32, LASX256>; 1073def PseudoXVBNZ_D : VecCond<loongarch_vall_nonzero, v4i64, LASX256>; 1074def PseudoXVBNZ : VecCond<loongarch_vany_nonzero, v32i8, LASX256>; 1075 1076def PseudoXVBZ_B : VecCond<loongarch_vall_zero, v32i8, LASX256>; 1077def PseudoXVBZ_H : VecCond<loongarch_vall_zero, v16i16, LASX256>; 1078def PseudoXVBZ_W : VecCond<loongarch_vall_zero, v8i32, LASX256>; 1079def PseudoXVBZ_D : VecCond<loongarch_vall_zero, v4i64, LASX256>; 1080def PseudoXVBZ : VecCond<loongarch_vany_zero, v32i8, LASX256>; 1081 1082let usesCustomInserter = 1, Constraints = "$xd = $dst" in { 1083def PseudoXVINSGR2VR_B 1084 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm5:$imm)>; 1085def PseudoXVINSGR2VR_H 1086 : Pseudo<(outs LASX256:$dst), (ins LASX256:$xd, GPR:$rj, uimm4:$imm)>; 1087} // usesCustomInserter = 1, Constraints = "$xd = $dst" 1088 1089} // Predicates = [HasExtLASX] 1090 1091multiclass PatXr<SDPatternOperator OpNode, string Inst> { 1092 def : Pat<(v32i8 (OpNode (v32i8 LASX256:$xj))), 1093 (!cast<LAInst>(Inst#"_B") LASX256:$xj)>; 1094 def : Pat<(v16i16 (OpNode (v16i16 LASX256:$xj))), 1095 (!cast<LAInst>(Inst#"_H") LASX256:$xj)>; 1096 def : Pat<(v8i32 (OpNode (v8i32 LASX256:$xj))), 1097 (!cast<LAInst>(Inst#"_W") LASX256:$xj)>; 1098 def : Pat<(v4i64 (OpNode (v4i64 LASX256:$xj))), 1099 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>; 1100} 1101 1102multiclass PatXrF<SDPatternOperator OpNode, string Inst> { 1103 def : Pat<(v8f32 (OpNode (v8f32 LASX256:$xj))), 1104 (!cast<LAInst>(Inst#"_S") LASX256:$xj)>; 1105 def : Pat<(v4f64 (OpNode (v4f64 LASX256:$xj))), 1106 (!cast<LAInst>(Inst#"_D") LASX256:$xj)>; 1107} 1108 1109multiclass PatXrXr<SDPatternOperator OpNode, string Inst> { 1110 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1111 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1112 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1113 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1114 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1115 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1116 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1117 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1118} 1119 1120multiclass PatXrXrF<SDPatternOperator OpNode, string Inst> { 1121 def : Pat<(OpNode (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)), 1122 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>; 1123 def : Pat<(OpNode (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)), 1124 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1125} 1126 1127multiclass PatXrXrU<SDPatternOperator OpNode, string Inst> { 1128 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1129 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>; 1130 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1131 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>; 1132 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1133 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>; 1134 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1135 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>; 1136} 1137 1138multiclass PatXrSimm5<SDPatternOperator OpNode, string Inst> { 1139 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_simm5 simm5:$imm))), 1140 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>; 1141 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_simm5 simm5:$imm))), 1142 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>; 1143 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_simm5 simm5:$imm))), 1144 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>; 1145 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_simm5 simm5:$imm))), 1146 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>; 1147} 1148 1149multiclass PatXrUimm5<SDPatternOperator OpNode, string Inst> { 1150 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm5 uimm5:$imm))), 1151 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>; 1152 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm5 uimm5:$imm))), 1153 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>; 1154 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))), 1155 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>; 1156 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm5 uimm5:$imm))), 1157 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>; 1158} 1159 1160multiclass PatXrXrXr<SDPatternOperator OpNode, string Inst> { 1161 def : Pat<(OpNode (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), 1162 (v32i8 LASX256:$xk)), 1163 (!cast<LAInst>(Inst#"_B") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1164 def : Pat<(OpNode (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), 1165 (v16i16 LASX256:$xk)), 1166 (!cast<LAInst>(Inst#"_H") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1167 def : Pat<(OpNode (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), 1168 (v8i32 LASX256:$xk)), 1169 (!cast<LAInst>(Inst#"_W") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1170 def : Pat<(OpNode (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), 1171 (v4i64 LASX256:$xk)), 1172 (!cast<LAInst>(Inst#"_D") LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1173} 1174 1175multiclass PatShiftXrXr<SDPatternOperator OpNode, string Inst> { 1176 def : Pat<(OpNode (v32i8 LASX256:$xj), (and vsplati8_imm_eq_7, 1177 (v32i8 LASX256:$xk))), 1178 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1179 def : Pat<(OpNode (v16i16 LASX256:$xj), (and vsplati16_imm_eq_15, 1180 (v16i16 LASX256:$xk))), 1181 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1182 def : Pat<(OpNode (v8i32 LASX256:$xj), (and vsplati32_imm_eq_31, 1183 (v8i32 LASX256:$xk))), 1184 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1185 def : Pat<(OpNode (v4i64 LASX256:$xj), (and vsplati64_imm_eq_63, 1186 (v4i64 LASX256:$xk))), 1187 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1188} 1189 1190multiclass PatShiftXrUimm<SDPatternOperator OpNode, string Inst> { 1191 def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm3 uimm3:$imm))), 1192 (!cast<LAInst>(Inst#"_B") LASX256:$xj, uimm3:$imm)>; 1193 def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 (SplatPat_uimm4 uimm4:$imm))), 1194 (!cast<LAInst>(Inst#"_H") LASX256:$xj, uimm4:$imm)>; 1195 def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 (SplatPat_uimm5 uimm5:$imm))), 1196 (!cast<LAInst>(Inst#"_W") LASX256:$xj, uimm5:$imm)>; 1197 def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 (SplatPat_uimm6 uimm6:$imm))), 1198 (!cast<LAInst>(Inst#"_D") LASX256:$xj, uimm6:$imm)>; 1199} 1200 1201multiclass PatCCXrSimm5<CondCode CC, string Inst> { 1202 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), 1203 (v32i8 (SplatPat_simm5 simm5:$imm)), CC)), 1204 (!cast<LAInst>(Inst#"_B") LASX256:$xj, simm5:$imm)>; 1205 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), 1206 (v16i16 (SplatPat_simm5 simm5:$imm)), CC)), 1207 (!cast<LAInst>(Inst#"_H") LASX256:$xj, simm5:$imm)>; 1208 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), 1209 (v8i32 (SplatPat_simm5 simm5:$imm)), CC)), 1210 (!cast<LAInst>(Inst#"_W") LASX256:$xj, simm5:$imm)>; 1211 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), 1212 (v4i64 (SplatPat_simm5 simm5:$imm)), CC)), 1213 (!cast<LAInst>(Inst#"_D") LASX256:$xj, simm5:$imm)>; 1214} 1215 1216multiclass PatCCXrUimm5<CondCode CC, string Inst> { 1217 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), 1218 (v32i8 (SplatPat_uimm5 uimm5:$imm)), CC)), 1219 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, uimm5:$imm)>; 1220 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), 1221 (v16i16 (SplatPat_uimm5 uimm5:$imm)), CC)), 1222 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, uimm5:$imm)>; 1223 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), 1224 (v8i32 (SplatPat_uimm5 uimm5:$imm)), CC)), 1225 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, uimm5:$imm)>; 1226 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), 1227 (v4i64 (SplatPat_uimm5 uimm5:$imm)), CC)), 1228 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, uimm5:$imm)>; 1229} 1230 1231multiclass PatCCXrXr<CondCode CC, string Inst> { 1232 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)), 1233 (!cast<LAInst>(Inst#"_B") LASX256:$xj, LASX256:$xk)>; 1234 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)), 1235 (!cast<LAInst>(Inst#"_H") LASX256:$xj, LASX256:$xk)>; 1236 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)), 1237 (!cast<LAInst>(Inst#"_W") LASX256:$xj, LASX256:$xk)>; 1238 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)), 1239 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1240} 1241 1242multiclass PatCCXrXrU<CondCode CC, string Inst> { 1243 def : Pat<(v32i8 (setcc (v32i8 LASX256:$xj), (v32i8 LASX256:$xk), CC)), 1244 (!cast<LAInst>(Inst#"_BU") LASX256:$xj, LASX256:$xk)>; 1245 def : Pat<(v16i16 (setcc (v16i16 LASX256:$xj), (v16i16 LASX256:$xk), CC)), 1246 (!cast<LAInst>(Inst#"_HU") LASX256:$xj, LASX256:$xk)>; 1247 def : Pat<(v8i32 (setcc (v8i32 LASX256:$xj), (v8i32 LASX256:$xk), CC)), 1248 (!cast<LAInst>(Inst#"_WU") LASX256:$xj, LASX256:$xk)>; 1249 def : Pat<(v4i64 (setcc (v4i64 LASX256:$xj), (v4i64 LASX256:$xk), CC)), 1250 (!cast<LAInst>(Inst#"_DU") LASX256:$xj, LASX256:$xk)>; 1251} 1252 1253multiclass PatCCXrXrF<CondCode CC, string Inst> { 1254 def : Pat<(v8i32 (setcc (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), CC)), 1255 (!cast<LAInst>(Inst#"_S") LASX256:$xj, LASX256:$xk)>; 1256 def : Pat<(v4i64 (setcc (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), CC)), 1257 (!cast<LAInst>(Inst#"_D") LASX256:$xj, LASX256:$xk)>; 1258} 1259 1260let Predicates = [HasExtLASX] in { 1261 1262// XVADD_{B/H/W/D} 1263defm : PatXrXr<add, "XVADD">; 1264// XVSUB_{B/H/W/D} 1265defm : PatXrXr<sub, "XVSUB">; 1266 1267// XVADDI_{B/H/W/D}U 1268defm : PatXrUimm5<add, "XVADDI">; 1269// XVSUBI_{B/H/W/D}U 1270defm : PatXrUimm5<sub, "XVSUBI">; 1271 1272// XVNEG_{B/H/W/D} 1273def : Pat<(sub immAllZerosV, (v32i8 LASX256:$xj)), (XVNEG_B LASX256:$xj)>; 1274def : Pat<(sub immAllZerosV, (v16i16 LASX256:$xj)), (XVNEG_H LASX256:$xj)>; 1275def : Pat<(sub immAllZerosV, (v8i32 LASX256:$xj)), (XVNEG_W LASX256:$xj)>; 1276def : Pat<(sub immAllZerosV, (v4i64 LASX256:$xj)), (XVNEG_D LASX256:$xj)>; 1277 1278// XVMAX[I]_{B/H/W/D}[U] 1279defm : PatXrXr<smax, "XVMAX">; 1280defm : PatXrXrU<umax, "XVMAX">; 1281defm : PatXrSimm5<smax, "XVMAXI">; 1282defm : PatXrUimm5<umax, "XVMAXI">; 1283 1284// XVMIN[I]_{B/H/W/D}[U] 1285defm : PatXrXr<smin, "XVMIN">; 1286defm : PatXrXrU<umin, "XVMIN">; 1287defm : PatXrSimm5<smin, "XVMINI">; 1288defm : PatXrUimm5<umin, "XVMINI">; 1289 1290// XVMUL_{B/H/W/D} 1291defm : PatXrXr<mul, "XVMUL">; 1292 1293// XVMUH_{B/H/W/D}[U] 1294defm : PatXrXr<mulhs, "XVMUH">; 1295defm : PatXrXrU<mulhu, "XVMUH">; 1296 1297// XVMADD_{B/H/W/D} 1298defm : PatXrXrXr<muladd, "XVMADD">; 1299// XVMSUB_{B/H/W/D} 1300defm : PatXrXrXr<mulsub, "XVMSUB">; 1301 1302// XVDIV_{B/H/W/D}[U] 1303defm : PatXrXr<sdiv, "XVDIV">; 1304defm : PatXrXrU<udiv, "XVDIV">; 1305 1306// XVMOD_{B/H/W/D}[U] 1307defm : PatXrXr<srem, "XVMOD">; 1308defm : PatXrXrU<urem, "XVMOD">; 1309 1310// XVAND_V 1311foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1312def : Pat<(and (vt LASX256:$xj), (vt LASX256:$xk)), 1313 (XVAND_V LASX256:$xj, LASX256:$xk)>; 1314// XVOR_V 1315foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1316def : Pat<(or (vt LASX256:$xj), (vt LASX256:$xk)), 1317 (XVOR_V LASX256:$xj, LASX256:$xk)>; 1318// XVXOR_V 1319foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1320def : Pat<(xor (vt LASX256:$xj), (vt LASX256:$xk)), 1321 (XVXOR_V LASX256:$xj, LASX256:$xk)>; 1322// XVNOR_V 1323foreach vt = [v32i8, v16i16, v8i32, v4i64] in 1324def : Pat<(vnot (or (vt LASX256:$xj), (vt LASX256:$xk))), 1325 (XVNOR_V LASX256:$xj, LASX256:$xk)>; 1326 1327// XVANDI_B 1328def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1329 (XVANDI_B LASX256:$xj, uimm8:$imm)>; 1330// XVORI_B 1331def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1332 (XVORI_B LASX256:$xj, uimm8:$imm)>; 1333 1334// XVXORI_B 1335def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (SplatPat_uimm8 uimm8:$imm))), 1336 (XVXORI_B LASX256:$xj, uimm8:$imm)>; 1337 1338// XVSLL[I]_{B/H/W/D} 1339defm : PatXrXr<shl, "XVSLL">; 1340defm : PatShiftXrXr<shl, "XVSLL">; 1341defm : PatShiftXrUimm<shl, "XVSLLI">; 1342 1343// XVSRL[I]_{B/H/W/D} 1344defm : PatXrXr<srl, "XVSRL">; 1345defm : PatShiftXrXr<srl, "XVSRL">; 1346defm : PatShiftXrUimm<srl, "XVSRLI">; 1347 1348// XVSRA[I]_{B/H/W/D} 1349defm : PatXrXr<sra, "XVSRA">; 1350defm : PatShiftXrXr<sra, "XVSRA">; 1351defm : PatShiftXrUimm<sra, "XVSRAI">; 1352 1353// XVCLZ_{B/H/W/D} 1354defm : PatXr<ctlz, "XVCLZ">; 1355 1356// XVPCNT_{B/H/W/D} 1357defm : PatXr<ctpop, "XVPCNT">; 1358 1359// XVBITCLR_{B/H/W/D} 1360def : Pat<(and v32i8:$xj, (vnot (shl vsplat_imm_eq_1, v32i8:$xk))), 1361 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>; 1362def : Pat<(and v16i16:$xj, (vnot (shl vsplat_imm_eq_1, v16i16:$xk))), 1363 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>; 1364def : Pat<(and v8i32:$xj, (vnot (shl vsplat_imm_eq_1, v8i32:$xk))), 1365 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>; 1366def : Pat<(and v4i64:$xj, (vnot (shl vsplat_imm_eq_1, v4i64:$xk))), 1367 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>; 1368def : Pat<(and v32i8:$xj, (vnot (shl vsplat_imm_eq_1, 1369 (vsplati8imm7 v32i8:$xk)))), 1370 (v32i8 (XVBITCLR_B v32i8:$xj, v32i8:$xk))>; 1371def : Pat<(and v16i16:$xj, (vnot (shl vsplat_imm_eq_1, 1372 (vsplati16imm15 v16i16:$xk)))), 1373 (v16i16 (XVBITCLR_H v16i16:$xj, v16i16:$xk))>; 1374def : Pat<(and v8i32:$xj, (vnot (shl vsplat_imm_eq_1, 1375 (vsplati32imm31 v8i32:$xk)))), 1376 (v8i32 (XVBITCLR_W v8i32:$xj, v8i32:$xk))>; 1377def : Pat<(and v4i64:$xj, (vnot (shl vsplat_imm_eq_1, 1378 (vsplati64imm63 v4i64:$xk)))), 1379 (v4i64 (XVBITCLR_D v4i64:$xj, v4i64:$xk))>; 1380 1381// XVBITCLRI_{B/H/W/D} 1382def : Pat<(and (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_inv_pow2 uimm3:$imm))), 1383 (XVBITCLRI_B LASX256:$xj, uimm3:$imm)>; 1384def : Pat<(and (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_inv_pow2 uimm4:$imm))), 1385 (XVBITCLRI_H LASX256:$xj, uimm4:$imm)>; 1386def : Pat<(and (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_inv_pow2 uimm5:$imm))), 1387 (XVBITCLRI_W LASX256:$xj, uimm5:$imm)>; 1388def : Pat<(and (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_inv_pow2 uimm6:$imm))), 1389 (XVBITCLRI_D LASX256:$xj, uimm6:$imm)>; 1390 1391// XVBITSET_{B/H/W/D} 1392def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)), 1393 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>; 1394def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)), 1395 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>; 1396def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)), 1397 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>; 1398def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)), 1399 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>; 1400def : Pat<(or v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))), 1401 (v32i8 (XVBITSET_B v32i8:$xj, v32i8:$xk))>; 1402def : Pat<(or v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))), 1403 (v16i16 (XVBITSET_H v16i16:$xj, v16i16:$xk))>; 1404def : Pat<(or v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))), 1405 (v8i32 (XVBITSET_W v8i32:$xj, v8i32:$xk))>; 1406def : Pat<(or v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))), 1407 (v4i64 (XVBITSET_D v4i64:$xj, v4i64:$xk))>; 1408 1409// XVBITSETI_{B/H/W/D} 1410def : Pat<(or (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))), 1411 (XVBITSETI_B LASX256:$xj, uimm3:$imm)>; 1412def : Pat<(or (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))), 1413 (XVBITSETI_H LASX256:$xj, uimm4:$imm)>; 1414def : Pat<(or (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))), 1415 (XVBITSETI_W LASX256:$xj, uimm5:$imm)>; 1416def : Pat<(or (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))), 1417 (XVBITSETI_D LASX256:$xj, uimm6:$imm)>; 1418 1419// XVBITREV_{B/H/W/D} 1420def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, v32i8:$xk)), 1421 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>; 1422def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, v16i16:$xk)), 1423 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>; 1424def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, v8i32:$xk)), 1425 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>; 1426def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, v4i64:$xk)), 1427 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>; 1428def : Pat<(xor v32i8:$xj, (shl vsplat_imm_eq_1, (vsplati8imm7 v32i8:$xk))), 1429 (v32i8 (XVBITREV_B v32i8:$xj, v32i8:$xk))>; 1430def : Pat<(xor v16i16:$xj, (shl vsplat_imm_eq_1, (vsplati16imm15 v16i16:$xk))), 1431 (v16i16 (XVBITREV_H v16i16:$xj, v16i16:$xk))>; 1432def : Pat<(xor v8i32:$xj, (shl vsplat_imm_eq_1, (vsplati32imm31 v8i32:$xk))), 1433 (v8i32 (XVBITREV_W v8i32:$xj, v8i32:$xk))>; 1434def : Pat<(xor v4i64:$xj, (shl vsplat_imm_eq_1, (vsplati64imm63 v4i64:$xk))), 1435 (v4i64 (XVBITREV_D v4i64:$xj, v4i64:$xk))>; 1436 1437// XVBITREVI_{B/H/W/D} 1438def : Pat<(xor (v32i8 LASX256:$xj), (v32i8 (vsplat_uimm_pow2 uimm3:$imm))), 1439 (XVBITREVI_B LASX256:$xj, uimm3:$imm)>; 1440def : Pat<(xor (v16i16 LASX256:$xj), (v16i16 (vsplat_uimm_pow2 uimm4:$imm))), 1441 (XVBITREVI_H LASX256:$xj, uimm4:$imm)>; 1442def : Pat<(xor (v8i32 LASX256:$xj), (v8i32 (vsplat_uimm_pow2 uimm5:$imm))), 1443 (XVBITREVI_W LASX256:$xj, uimm5:$imm)>; 1444def : Pat<(xor (v4i64 LASX256:$xj), (v4i64 (vsplat_uimm_pow2 uimm6:$imm))), 1445 (XVBITREVI_D LASX256:$xj, uimm6:$imm)>; 1446 1447// Vector bswaps 1448def : Pat<(bswap (v16i16 LASX256:$xj)), (XVSHUF4I_B LASX256:$xj, 0b10110001)>; 1449def : Pat<(bswap (v8i32 LASX256:$xj)), (XVSHUF4I_B LASX256:$xj, 0b00011011)>; 1450def : Pat<(bswap (v4i64 LASX256:$xj)), 1451 (XVSHUF4I_W (XVSHUF4I_B LASX256:$xj, 0b00011011), 0b10110001)>; 1452 1453// XVFADD_{S/D} 1454defm : PatXrXrF<fadd, "XVFADD">; 1455 1456// XVFSUB_{S/D} 1457defm : PatXrXrF<fsub, "XVFSUB">; 1458 1459// XVFMUL_{S/D} 1460defm : PatXrXrF<fmul, "XVFMUL">; 1461 1462// XVFDIV_{S/D} 1463defm : PatXrXrF<fdiv, "XVFDIV">; 1464 1465// XVFMADD_{S/D} 1466def : Pat<(fma v8f32:$xj, v8f32:$xk, v8f32:$xa), 1467 (XVFMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1468def : Pat<(fma v4f64:$xj, v4f64:$xk, v4f64:$xa), 1469 (XVFMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1470 1471// XVFMSUB_{S/D} 1472def : Pat<(fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa)), 1473 (XVFMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1474def : Pat<(fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa)), 1475 (XVFMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1476 1477// XVFNMADD_{S/D} 1478def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, v8f32:$xa)), 1479 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1480def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, v4f64:$xa)), 1481 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1482def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, (fneg v8f32:$xa)), 1483 (XVFNMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1484def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, (fneg v4f64:$xa)), 1485 (XVFNMADD_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1486 1487// XVFNMSUB_{S/D} 1488def : Pat<(fneg (fma v8f32:$xj, v8f32:$xk, (fneg v8f32:$xa))), 1489 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1490def : Pat<(fneg (fma v4f64:$xj, v4f64:$xk, (fneg v4f64:$xa))), 1491 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1492def : Pat<(fma_nsz (fneg v8f32:$xj), v8f32:$xk, v8f32:$xa), 1493 (XVFNMSUB_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>; 1494def : Pat<(fma_nsz (fneg v4f64:$xj), v4f64:$xk, v4f64:$xa), 1495 (XVFNMSUB_D v4f64:$xj, v4f64:$xk, v4f64:$xa)>; 1496 1497// XVFSQRT_{S/D} 1498defm : PatXrF<fsqrt, "XVFSQRT">; 1499 1500// XVRECIP_{S/D} 1501def : Pat<(fdiv vsplatf32_fpimm_eq_1, v8f32:$xj), 1502 (XVFRECIP_S v8f32:$xj)>; 1503def : Pat<(fdiv vsplatf64_fpimm_eq_1, v4f64:$xj), 1504 (XVFRECIP_D v4f64:$xj)>; 1505 1506// XVFRSQRT_{S/D} 1507def : Pat<(fdiv vsplatf32_fpimm_eq_1, (fsqrt v8f32:$xj)), 1508 (XVFRSQRT_S v8f32:$xj)>; 1509def : Pat<(fdiv vsplatf64_fpimm_eq_1, (fsqrt v4f64:$xj)), 1510 (XVFRSQRT_D v4f64:$xj)>; 1511 1512// XVSEQ[I]_{B/H/W/D} 1513defm : PatCCXrSimm5<SETEQ, "XVSEQI">; 1514defm : PatCCXrXr<SETEQ, "XVSEQ">; 1515 1516// XVSLE[I]_{B/H/W/D}[U] 1517defm : PatCCXrSimm5<SETLE, "XVSLEI">; 1518defm : PatCCXrUimm5<SETULE, "XVSLEI">; 1519defm : PatCCXrXr<SETLE, "XVSLE">; 1520defm : PatCCXrXrU<SETULE, "XVSLE">; 1521 1522// XVSLT[I]_{B/H/W/D}[U] 1523defm : PatCCXrSimm5<SETLT, "XVSLTI">; 1524defm : PatCCXrUimm5<SETULT, "XVSLTI">; 1525defm : PatCCXrXr<SETLT, "XVSLT">; 1526defm : PatCCXrXrU<SETULT, "XVSLT">; 1527 1528// XVFCMP.cond.{S/D} 1529defm : PatCCXrXrF<SETEQ, "XVFCMP_CEQ">; 1530defm : PatCCXrXrF<SETOEQ, "XVFCMP_CEQ">; 1531defm : PatCCXrXrF<SETUEQ, "XVFCMP_CUEQ">; 1532 1533defm : PatCCXrXrF<SETLE, "XVFCMP_CLE">; 1534defm : PatCCXrXrF<SETOLE, "XVFCMP_CLE">; 1535defm : PatCCXrXrF<SETULE, "XVFCMP_CULE">; 1536 1537defm : PatCCXrXrF<SETLT, "XVFCMP_CLT">; 1538defm : PatCCXrXrF<SETOLT, "XVFCMP_CLT">; 1539defm : PatCCXrXrF<SETULT, "XVFCMP_CULT">; 1540 1541defm : PatCCXrXrF<SETNE, "XVFCMP_CNE">; 1542defm : PatCCXrXrF<SETONE, "XVFCMP_CNE">; 1543defm : PatCCXrXrF<SETUNE, "XVFCMP_CUNE">; 1544 1545defm : PatCCXrXrF<SETO, "XVFCMP_COR">; 1546defm : PatCCXrXrF<SETUO, "XVFCMP_CUN">; 1547 1548// PseudoXVINSGR2VR_{B/H} 1549def : Pat<(vector_insert v32i8:$xd, GRLenVT:$rj, uimm5:$imm), 1550 (PseudoXVINSGR2VR_B v32i8:$xd, GRLenVT:$rj, uimm5:$imm)>; 1551def : Pat<(vector_insert v16i16:$xd, GRLenVT:$rj, uimm4:$imm), 1552 (PseudoXVINSGR2VR_H v16i16:$xd, GRLenVT:$rj, uimm4:$imm)>; 1553 1554// XVINSGR2VR_{W/D} 1555def : Pat<(vector_insert v8i32:$xd, GRLenVT:$rj, uimm3:$imm), 1556 (XVINSGR2VR_W v8i32:$xd, GRLenVT:$rj, uimm3:$imm)>; 1557def : Pat<(vector_insert v4i64:$xd, GRLenVT:$rj, uimm2:$imm), 1558 (XVINSGR2VR_D v4i64:$xd, GRLenVT:$rj, uimm2:$imm)>; 1559 1560def : Pat<(vector_insert v8f32:$vd, FPR32:$fj, uimm3:$imm), 1561 (XVINSGR2VR_W $vd, (COPY_TO_REGCLASS FPR32:$fj, GPR), uimm3:$imm)>; 1562def : Pat<(vector_insert v4f64:$vd, FPR64:$fj, uimm2:$imm), 1563 (XVINSGR2VR_D $vd, (COPY_TO_REGCLASS FPR64:$fj, GPR), uimm2:$imm)>; 1564 1565// scalar_to_vector 1566def : Pat<(v8f32 (scalar_to_vector FPR32:$fj)), 1567 (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32)>; 1568def : Pat<(v4f64 (scalar_to_vector FPR64:$fj)), 1569 (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64)>; 1570 1571// XVPICKVE2GR_W[U] 1572def : Pat<(loongarch_vpick_sext_elt v8i32:$xd, uimm3:$imm, i32), 1573 (XVPICKVE2GR_W v8i32:$xd, uimm3:$imm)>; 1574def : Pat<(loongarch_vpick_zext_elt v8i32:$xd, uimm3:$imm, i32), 1575 (XVPICKVE2GR_WU v8i32:$xd, uimm3:$imm)>; 1576 1577// XVREPLGR2VR_{B/H/W/D} 1578def : Pat<(lasxsplati8 GPR:$rj), (XVREPLGR2VR_B GPR:$rj)>; 1579def : Pat<(lasxsplati16 GPR:$rj), (XVREPLGR2VR_H GPR:$rj)>; 1580def : Pat<(lasxsplati32 GPR:$rj), (XVREPLGR2VR_W GPR:$rj)>; 1581def : Pat<(lasxsplati64 GPR:$rj), (XVREPLGR2VR_D GPR:$rj)>; 1582 1583def : Pat<(v32i8 (loongarch_vreplgr2vr GRLenVT:$rj)), 1584 (v32i8 (XVREPLGR2VR_B GRLenVT:$rj))>; 1585def : Pat<(v16i16 (loongarch_vreplgr2vr GRLenVT:$rj)), 1586 (v16i16 (XVREPLGR2VR_H GRLenVT:$rj))>; 1587def : Pat<(v8i32 (loongarch_vreplgr2vr GRLenVT:$rj)), 1588 (v8i32 (XVREPLGR2VR_W GRLenVT:$rj))>; 1589def : Pat<(v4i64 (loongarch_vreplgr2vr GRLenVT:$rj)), 1590 (v4i64 (XVREPLGR2VR_D GRLenVT:$rj))>; 1591 1592// XVREPLVE_{B/H/W/D} 1593def : Pat<(loongarch_vreplve v32i8:$xj, GRLenVT:$rk), 1594 (XVREPLVE_B v32i8:$xj, GRLenVT:$rk)>; 1595def : Pat<(loongarch_vreplve v16i16:$xj, GRLenVT:$rk), 1596 (XVREPLVE_H v16i16:$xj, GRLenVT:$rk)>; 1597def : Pat<(loongarch_vreplve v8i32:$xj, GRLenVT:$rk), 1598 (XVREPLVE_W v8i32:$xj, GRLenVT:$rk)>; 1599def : Pat<(loongarch_vreplve v4i64:$xj, GRLenVT:$rk), 1600 (XVREPLVE_D v4i64:$xj, GRLenVT:$rk)>; 1601 1602// XVSHUF_{B/H/W/D} 1603def : Pat<(loongarch_vshuf v32i8:$xa, v32i8:$xj, v32i8:$xk), 1604 (XVSHUF_B v32i8:$xj, v32i8:$xk, v32i8:$xa)>; 1605def : Pat<(loongarch_vshuf v16i16:$xd, v16i16:$xj, v16i16:$xk), 1606 (XVSHUF_H v16i16:$xd, v16i16:$xj, v16i16:$xk)>; 1607def : Pat<(loongarch_vshuf v8i32:$xd, v8i32:$xj, v8i32:$xk), 1608 (XVSHUF_W v8i32:$xd, v8i32:$xj, v8i32:$xk)>; 1609def : Pat<(loongarch_vshuf v4i64:$xd, v4i64:$xj, v4i64:$xk), 1610 (XVSHUF_D v4i64:$xd, v4i64:$xj, v4i64:$xk)>; 1611def : Pat<(loongarch_vshuf v8i32:$xd, v8f32:$xj, v8f32:$xk), 1612 (XVSHUF_W v8i32:$xd, v8f32:$xj, v8f32:$xk)>; 1613def : Pat<(loongarch_vshuf v4i64:$xd, v4f64:$xj, v4f64:$xk), 1614 (XVSHUF_D v4i64:$xd, v4f64:$xj, v4f64:$xk)>; 1615 1616// XVPICKEV_{B/H/W/D} 1617def : Pat<(loongarch_vpickev v32i8:$xj, v32i8:$xk), 1618 (XVPICKEV_B v32i8:$xj, v32i8:$xk)>; 1619def : Pat<(loongarch_vpickev v16i16:$xj, v16i16:$xk), 1620 (XVPICKEV_H v16i16:$xj, v16i16:$xk)>; 1621def : Pat<(loongarch_vpickev v8i32:$xj, v8i32:$xk), 1622 (XVPICKEV_W v8i32:$xj, v8i32:$xk)>; 1623def : Pat<(loongarch_vpickev v4i64:$xj, v4i64:$xk), 1624 (XVPICKEV_D v4i64:$xj, v4i64:$xk)>; 1625def : Pat<(loongarch_vpickev v8f32:$xj, v8f32:$xk), 1626 (XVPICKEV_W v8f32:$xj, v8f32:$xk)>; 1627def : Pat<(loongarch_vpickev v4f64:$xj, v4f64:$xk), 1628 (XVPICKEV_D v4f64:$xj, v4f64:$xk)>; 1629 1630// XVPICKOD_{B/H/W/D} 1631def : Pat<(loongarch_vpickod v32i8:$xj, v32i8:$xk), 1632 (XVPICKOD_B v32i8:$xj, v32i8:$xk)>; 1633def : Pat<(loongarch_vpickod v16i16:$xj, v16i16:$xk), 1634 (XVPICKOD_H v16i16:$xj, v16i16:$xk)>; 1635def : Pat<(loongarch_vpickod v8i32:$xj, v8i32:$xk), 1636 (XVPICKOD_W v8i32:$xj, v8i32:$xk)>; 1637def : Pat<(loongarch_vpickod v4i64:$xj, v4i64:$xk), 1638 (XVPICKOD_D v4i64:$xj, v4i64:$xk)>; 1639def : Pat<(loongarch_vpickod v8f32:$xj, v8f32:$xk), 1640 (XVPICKOD_W v8f32:$xj, v8f32:$xk)>; 1641def : Pat<(loongarch_vpickod v4f64:$xj, v4f64:$xk), 1642 (XVPICKOD_D v4f64:$xj, v4f64:$xk)>; 1643 1644// XVPACKEV_{B/H/W/D} 1645def : Pat<(loongarch_vpackev v32i8:$xj, v32i8:$xk), 1646 (XVPACKEV_B v32i8:$xj, v32i8:$xk)>; 1647def : Pat<(loongarch_vpackev v16i16:$xj, v16i16:$xk), 1648 (XVPACKEV_H v16i16:$xj, v16i16:$xk)>; 1649def : Pat<(loongarch_vpackev v8i32:$xj, v8i32:$xk), 1650 (XVPACKEV_W v8i32:$xj, v8i32:$xk)>; 1651def : Pat<(loongarch_vpackev v4i64:$xj, v4i64:$xk), 1652 (XVPACKEV_D v4i64:$xj, v4i64:$xk)>; 1653def : Pat<(loongarch_vpackev v8f32:$xj, v8f32:$xk), 1654 (XVPACKEV_W v8f32:$xj, v8f32:$xk)>; 1655def : Pat<(loongarch_vpackev v4f64:$xj, v4f64:$xk), 1656 (XVPACKEV_D v4f64:$xj, v4f64:$xk)>; 1657 1658// XVPACKOD_{B/H/W/D} 1659def : Pat<(loongarch_vpackod v32i8:$xj, v32i8:$xk), 1660 (XVPACKOD_B v32i8:$xj, v32i8:$xk)>; 1661def : Pat<(loongarch_vpackod v16i16:$xj, v16i16:$xk), 1662 (XVPACKOD_H v16i16:$xj, v16i16:$xk)>; 1663def : Pat<(loongarch_vpackod v8i32:$xj, v8i32:$xk), 1664 (XVPACKOD_W v8i32:$xj, v8i32:$xk)>; 1665def : Pat<(loongarch_vpackod v4i64:$xj, v4i64:$xk), 1666 (XVPACKOD_D v4i64:$xj, v4i64:$xk)>; 1667def : Pat<(loongarch_vpackod v8f32:$xj, v8f32:$xk), 1668 (XVPACKOD_W v8f32:$xj, v8f32:$xk)>; 1669def : Pat<(loongarch_vpackod v4f64:$xj, v4f64:$xk), 1670 (XVPACKOD_D v4f64:$xj, v4f64:$xk)>; 1671 1672// XVILVL_{B/H/W/D} 1673def : Pat<(loongarch_vilvl v32i8:$xj, v32i8:$xk), 1674 (XVILVL_B v32i8:$xj, v32i8:$xk)>; 1675def : Pat<(loongarch_vilvl v16i16:$xj, v16i16:$xk), 1676 (XVILVL_H v16i16:$xj, v16i16:$xk)>; 1677def : Pat<(loongarch_vilvl v8i32:$xj, v8i32:$xk), 1678 (XVILVL_W v8i32:$xj, v8i32:$xk)>; 1679def : Pat<(loongarch_vilvl v4i64:$xj, v4i64:$xk), 1680 (XVILVL_D v4i64:$xj, v4i64:$xk)>; 1681def : Pat<(loongarch_vilvl v8f32:$xj, v8f32:$xk), 1682 (XVILVL_W v8f32:$xj, v8f32:$xk)>; 1683def : Pat<(loongarch_vilvl v4f64:$xj, v4f64:$xk), 1684 (XVILVL_D v4f64:$xj, v4f64:$xk)>; 1685 1686// XVILVH_{B/H/W/D} 1687def : Pat<(loongarch_vilvh v32i8:$xj, v32i8:$xk), 1688 (XVILVH_B v32i8:$xj, v32i8:$xk)>; 1689def : Pat<(loongarch_vilvh v16i16:$xj, v16i16:$xk), 1690 (XVILVH_H v16i16:$xj, v16i16:$xk)>; 1691def : Pat<(loongarch_vilvh v8i32:$xj, v8i32:$xk), 1692 (XVILVH_W v8i32:$xj, v8i32:$xk)>; 1693def : Pat<(loongarch_vilvh v4i64:$xj, v4i64:$xk), 1694 (XVILVH_D v4i64:$xj, v4i64:$xk)>; 1695def : Pat<(loongarch_vilvh v8f32:$xj, v8f32:$xk), 1696 (XVILVH_W v8f32:$xj, v8f32:$xk)>; 1697def : Pat<(loongarch_vilvh v4f64:$xj, v4f64:$xk), 1698 (XVILVH_D v4f64:$xj, v4f64:$xk)>; 1699 1700// XVSHUF4I_{B/H/W} 1701def : Pat<(loongarch_vshuf4i v32i8:$xj, immZExt8:$ui8), 1702 (XVSHUF4I_B v32i8:$xj, immZExt8:$ui8)>; 1703def : Pat<(loongarch_vshuf4i v16i16:$xj, immZExt8:$ui8), 1704 (XVSHUF4I_H v16i16:$xj, immZExt8:$ui8)>; 1705def : Pat<(loongarch_vshuf4i v8i32:$xj, immZExt8:$ui8), 1706 (XVSHUF4I_W v8i32:$xj, immZExt8:$ui8)>; 1707def : Pat<(loongarch_vshuf4i v8f32:$xj, immZExt8:$ui8), 1708 (XVSHUF4I_W v8f32:$xj, immZExt8:$ui8)>; 1709 1710// XVREPL128VEI_{B/H/W/D} 1711def : Pat<(loongarch_vreplvei v32i8:$xj, immZExt4:$ui4), 1712 (XVREPL128VEI_B v32i8:$xj, immZExt4:$ui4)>; 1713def : Pat<(loongarch_vreplvei v16i16:$xj, immZExt3:$ui3), 1714 (XVREPL128VEI_H v16i16:$xj, immZExt3:$ui3)>; 1715def : Pat<(loongarch_vreplvei v8i32:$xj, immZExt2:$ui2), 1716 (XVREPL128VEI_W v8i32:$xj, immZExt2:$ui2)>; 1717def : Pat<(loongarch_vreplvei v4i64:$xj, immZExt1:$ui1), 1718 (XVREPL128VEI_D v4i64:$xj, immZExt1:$ui1)>; 1719def : Pat<(loongarch_vreplvei v8f32:$xj, immZExt2:$ui2), 1720 (XVREPL128VEI_W v8f32:$xj, immZExt2:$ui2)>; 1721def : Pat<(loongarch_vreplvei v4f64:$xj, immZExt1:$ui1), 1722 (XVREPL128VEI_D v4f64:$xj, immZExt1:$ui1)>; 1723 1724// XVPERMI_D 1725def : Pat<(loongarch_xvpermi v4i64:$xj, immZExt8: $ui8), 1726 (XVPERMI_D v4i64:$xj, immZExt8: $ui8)>; 1727def : Pat<(loongarch_xvpermi v4f64:$xj, immZExt8: $ui8), 1728 (XVPERMI_D v4f64:$xj, immZExt8: $ui8)>; 1729 1730// XVREPLVE0_{W/D} 1731def : Pat<(lasxsplatf32 FPR32:$fj), 1732 (XVREPLVE0_W (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32))>; 1733def : Pat<(lasxsplatf64 FPR64:$fj), 1734 (XVREPLVE0_D (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64))>; 1735 1736// Loads/Stores 1737foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in { 1738 defm : LdPat<load, XVLD, vt>; 1739 def : RegRegLdPat<load, XVLDX, vt>; 1740 defm : StPat<store, XVST, LASX256, vt>; 1741 def : RegRegStPat<store, XVSTX, LASX256, vt>; 1742} 1743 1744// Vector extraction with constant index. 1745def : Pat<(i64 (vector_extract v32i8:$xj, uimm4:$imm)), 1746 (VPICKVE2GR_B (EXTRACT_SUBREG v32i8:$xj, sub_128), uimm4:$imm)>; 1747def : Pat<(i64 (vector_extract v16i16:$xj, uimm3:$imm)), 1748 (VPICKVE2GR_H (EXTRACT_SUBREG v16i16:$xj, sub_128), uimm3:$imm)>; 1749def : Pat<(i64 (vector_extract v8i32:$xj, uimm3:$imm)), 1750 (XVPICKVE2GR_W v8i32:$xj, uimm3:$imm)>; 1751def : Pat<(i64 (vector_extract v4i64:$xj, uimm2:$imm)), 1752 (XVPICKVE2GR_D v4i64:$xj, uimm2:$imm)>; 1753def : Pat<(f32 (vector_extract v8f32:$xj, uimm3:$imm)), 1754 (MOVGR2FR_W (XVPICKVE2GR_W v8f32:$xj, uimm3:$imm))>; 1755def : Pat<(f64 (vector_extract v4f64:$xj, uimm2:$imm)), 1756 (MOVGR2FR_D (XVPICKVE2GR_D v4f64:$xj, uimm2:$imm))>; 1757 1758// vselect 1759def : Pat<(v32i8 (vselect LASX256:$xd, (v32i8 (SplatPat_uimm8 uimm8:$imm)), 1760 LASX256:$xj)), 1761 (XVBITSELI_B LASX256:$xd, LASX256:$xj, uimm8:$imm)>; 1762foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in 1763 def : Pat<(vt (vselect LASX256:$xa, LASX256:$xk, LASX256:$xj)), 1764 (XVBITSEL_V LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 1765 1766// fneg 1767def : Pat<(fneg (v8f32 LASX256:$xj)), (XVBITREVI_W LASX256:$xj, 31)>; 1768def : Pat<(fneg (v4f64 LASX256:$xj)), (XVBITREVI_D LASX256:$xj, 63)>; 1769 1770// XVFFINT_{S_W/D_L} 1771def : Pat<(v8f32 (sint_to_fp v8i32:$vj)), (XVFFINT_S_W v8i32:$vj)>; 1772def : Pat<(v4f64 (sint_to_fp v4i64:$vj)), (XVFFINT_D_L v4i64:$vj)>; 1773def : Pat<(v4f64 (sint_to_fp v4i32:$vj)), 1774 (XVFFINT_D_L (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), v4i32:$vj, 1775 sub_128)))>; 1776def : Pat<(v4f32 (sint_to_fp v4i64:$vj)), 1777 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_L v4i64:$vj), 238), 1778 (XVFFINT_D_L v4i64:$vj)), 1779 sub_128)>; 1780 1781// XVFFINT_{S_WU/D_LU} 1782def : Pat<(v8f32 (uint_to_fp v8i32:$vj)), (XVFFINT_S_WU v8i32:$vj)>; 1783def : Pat<(v4f64 (uint_to_fp v4i64:$vj)), (XVFFINT_D_LU v4i64:$vj)>; 1784def : Pat<(v4f64 (uint_to_fp v4i32:$vj)), 1785 (XVFFINT_D_LU (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), v4i32:$vj, 1786 sub_128)))>; 1787def : Pat<(v4f32 (uint_to_fp v4i64:$vj)), 1788 (EXTRACT_SUBREG (XVFCVT_S_D (XVPERMI_D (XVFFINT_D_LU v4i64:$vj), 238), 1789 (XVFFINT_D_LU v4i64:$vj)), 1790 sub_128)>; 1791 1792// XVFTINTRZ_{W_S/L_D} 1793def : Pat<(v8i32 (fp_to_sint v8f32:$vj)), (XVFTINTRZ_W_S v8f32:$vj)>; 1794def : Pat<(v4i64 (fp_to_sint v4f64:$vj)), (XVFTINTRZ_L_D v4f64:$vj)>; 1795def : Pat<(v4i64 (fp_to_sint v4f32:$vj)), 1796 (VEXT2XV_D_W (SUBREG_TO_REG (i64 0), (VFTINTRZ_W_S v4f32:$vj), 1797 sub_128))>; 1798def : Pat<(v4i32 (fp_to_sint (v4f64 LASX256:$vj))), 1799 (EXTRACT_SUBREG (XVFTINTRZ_W_S (XVFCVT_S_D (XVPERMI_D v4f64:$vj, 238), 1800 v4f64:$vj)), 1801 sub_128)>; 1802 1803// XVFTINTRZ_{W_SU/L_DU} 1804def : Pat<(v8i32 (fp_to_uint v8f32:$vj)), (XVFTINTRZ_WU_S v8f32:$vj)>; 1805def : Pat<(v4i64 (fp_to_uint v4f64:$vj)), (XVFTINTRZ_LU_D v4f64:$vj)>; 1806def : Pat<(v4i64 (fp_to_uint v4f32:$vj)), 1807 (VEXT2XV_DU_WU (SUBREG_TO_REG (i64 0), (VFTINTRZ_WU_S v4f32:$vj), 1808 sub_128))>; 1809def : Pat<(v4i32 (fp_to_uint (v4f64 LASX256:$vj))), 1810 (EXTRACT_SUBREG (XVFTINTRZ_W_S (XVFCVT_S_D (XVPERMI_D v4f64:$vj, 238), 1811 v4f64:$vj)), 1812 sub_128)>; 1813 1814// XVPERMI_Q 1815foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in 1816def : Pat<(vt (concat_vectors LSX128:$vd, LSX128:$vj)), 1817 (XVPERMI_Q (SUBREG_TO_REG (i64 0), LSX128:$vd, sub_128), 1818 (SUBREG_TO_REG (i64 0), LSX128:$vj, sub_128), 2)>; 1819 1820} // Predicates = [HasExtLASX] 1821 1822/// Intrinsic pattern 1823 1824class deriveLASXIntrinsic<string Inst> { 1825 Intrinsic ret = !cast<Intrinsic>(!tolower("int_loongarch_lasx_"#Inst)); 1826} 1827 1828let Predicates = [HasExtLASX] in { 1829 1830// vty: v32i8/v16i16/v8i32/v4i64 1831// Pat<(Intrinsic vty:$xj, vty:$xk), 1832// (LAInst vty:$xj, vty:$xk)>; 1833foreach Inst = ["XVSADD_B", "XVSADD_BU", "XVSSUB_B", "XVSSUB_BU", 1834 "XVHADDW_H_B", "XVHADDW_HU_BU", "XVHSUBW_H_B", "XVHSUBW_HU_BU", 1835 "XVADDWEV_H_B", "XVADDWOD_H_B", "XVSUBWEV_H_B", "XVSUBWOD_H_B", 1836 "XVADDWEV_H_BU", "XVADDWOD_H_BU", "XVSUBWEV_H_BU", "XVSUBWOD_H_BU", 1837 "XVADDWEV_H_BU_B", "XVADDWOD_H_BU_B", 1838 "XVAVG_B", "XVAVG_BU", "XVAVGR_B", "XVAVGR_BU", 1839 "XVABSD_B", "XVABSD_BU", "XVADDA_B", "XVMUH_B", "XVMUH_BU", 1840 "XVMULWEV_H_B", "XVMULWOD_H_B", "XVMULWEV_H_BU", "XVMULWOD_H_BU", 1841 "XVMULWEV_H_BU_B", "XVMULWOD_H_BU_B", "XVSIGNCOV_B", 1842 "XVANDN_V", "XVORN_V", "XVROTR_B", "XVSRLR_B", "XVSRAR_B", 1843 "XVSEQ_B", "XVSLE_B", "XVSLE_BU", "XVSLT_B", "XVSLT_BU", 1844 "XVPACKEV_B", "XVPACKOD_B", "XVPICKEV_B", "XVPICKOD_B", 1845 "XVILVL_B", "XVILVH_B"] in 1846 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1847 (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1848 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1849foreach Inst = ["XVSADD_H", "XVSADD_HU", "XVSSUB_H", "XVSSUB_HU", 1850 "XVHADDW_W_H", "XVHADDW_WU_HU", "XVHSUBW_W_H", "XVHSUBW_WU_HU", 1851 "XVADDWEV_W_H", "XVADDWOD_W_H", "XVSUBWEV_W_H", "XVSUBWOD_W_H", 1852 "XVADDWEV_W_HU", "XVADDWOD_W_HU", "XVSUBWEV_W_HU", "XVSUBWOD_W_HU", 1853 "XVADDWEV_W_HU_H", "XVADDWOD_W_HU_H", 1854 "XVAVG_H", "XVAVG_HU", "XVAVGR_H", "XVAVGR_HU", 1855 "XVABSD_H", "XVABSD_HU", "XVADDA_H", "XVMUH_H", "XVMUH_HU", 1856 "XVMULWEV_W_H", "XVMULWOD_W_H", "XVMULWEV_W_HU", "XVMULWOD_W_HU", 1857 "XVMULWEV_W_HU_H", "XVMULWOD_W_HU_H", "XVSIGNCOV_H", "XVROTR_H", 1858 "XVSRLR_H", "XVSRAR_H", "XVSRLN_B_H", "XVSRAN_B_H", "XVSRLRN_B_H", 1859 "XVSRARN_B_H", "XVSSRLN_B_H", "XVSSRAN_B_H", "XVSSRLN_BU_H", 1860 "XVSSRAN_BU_H", "XVSSRLRN_B_H", "XVSSRARN_B_H", "XVSSRLRN_BU_H", 1861 "XVSSRARN_BU_H", 1862 "XVSEQ_H", "XVSLE_H", "XVSLE_HU", "XVSLT_H", "XVSLT_HU", 1863 "XVPACKEV_H", "XVPACKOD_H", "XVPICKEV_H", "XVPICKOD_H", 1864 "XVILVL_H", "XVILVH_H"] in 1865 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1866 (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1867 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1868foreach Inst = ["XVSADD_W", "XVSADD_WU", "XVSSUB_W", "XVSSUB_WU", 1869 "XVHADDW_D_W", "XVHADDW_DU_WU", "XVHSUBW_D_W", "XVHSUBW_DU_WU", 1870 "XVADDWEV_D_W", "XVADDWOD_D_W", "XVSUBWEV_D_W", "XVSUBWOD_D_W", 1871 "XVADDWEV_D_WU", "XVADDWOD_D_WU", "XVSUBWEV_D_WU", "XVSUBWOD_D_WU", 1872 "XVADDWEV_D_WU_W", "XVADDWOD_D_WU_W", 1873 "XVAVG_W", "XVAVG_WU", "XVAVGR_W", "XVAVGR_WU", 1874 "XVABSD_W", "XVABSD_WU", "XVADDA_W", "XVMUH_W", "XVMUH_WU", 1875 "XVMULWEV_D_W", "XVMULWOD_D_W", "XVMULWEV_D_WU", "XVMULWOD_D_WU", 1876 "XVMULWEV_D_WU_W", "XVMULWOD_D_WU_W", "XVSIGNCOV_W", "XVROTR_W", 1877 "XVSRLR_W", "XVSRAR_W", "XVSRLN_H_W", "XVSRAN_H_W", "XVSRLRN_H_W", 1878 "XVSRARN_H_W", "XVSSRLN_H_W", "XVSSRAN_H_W", "XVSSRLN_HU_W", 1879 "XVSSRAN_HU_W", "XVSSRLRN_H_W", "XVSSRARN_H_W", "XVSSRLRN_HU_W", 1880 "XVSSRARN_HU_W", 1881 "XVSEQ_W", "XVSLE_W", "XVSLE_WU", "XVSLT_W", "XVSLT_WU", 1882 "XVPACKEV_W", "XVPACKOD_W", "XVPICKEV_W", "XVPICKOD_W", 1883 "XVILVL_W", "XVILVH_W", "XVPERM_W"] in 1884 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1885 (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1886 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1887foreach Inst = ["XVADD_Q", "XVSUB_Q", 1888 "XVSADD_D", "XVSADD_DU", "XVSSUB_D", "XVSSUB_DU", 1889 "XVHADDW_Q_D", "XVHADDW_QU_DU", "XVHSUBW_Q_D", "XVHSUBW_QU_DU", 1890 "XVADDWEV_Q_D", "XVADDWOD_Q_D", "XVSUBWEV_Q_D", "XVSUBWOD_Q_D", 1891 "XVADDWEV_Q_DU", "XVADDWOD_Q_DU", "XVSUBWEV_Q_DU", "XVSUBWOD_Q_DU", 1892 "XVADDWEV_Q_DU_D", "XVADDWOD_Q_DU_D", 1893 "XVAVG_D", "XVAVG_DU", "XVAVGR_D", "XVAVGR_DU", 1894 "XVABSD_D", "XVABSD_DU", "XVADDA_D", "XVMUH_D", "XVMUH_DU", 1895 "XVMULWEV_Q_D", "XVMULWOD_Q_D", "XVMULWEV_Q_DU", "XVMULWOD_Q_DU", 1896 "XVMULWEV_Q_DU_D", "XVMULWOD_Q_DU_D", "XVSIGNCOV_D", "XVROTR_D", 1897 "XVSRLR_D", "XVSRAR_D", "XVSRLN_W_D", "XVSRAN_W_D", "XVSRLRN_W_D", 1898 "XVSRARN_W_D", "XVSSRLN_W_D", "XVSSRAN_W_D", "XVSSRLN_WU_D", 1899 "XVSSRAN_WU_D", "XVSSRLRN_W_D", "XVSSRARN_W_D", "XVSSRLRN_WU_D", 1900 "XVSSRARN_WU_D", "XVFFINT_S_L", 1901 "XVSEQ_D", "XVSLE_D", "XVSLE_DU", "XVSLT_D", "XVSLT_DU", 1902 "XVPACKEV_D", "XVPACKOD_D", "XVPICKEV_D", "XVPICKOD_D", 1903 "XVILVL_D", "XVILVH_D"] in 1904 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1905 (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1906 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 1907 1908// vty: v32i8/v16i16/v8i32/v4i64 1909// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk), 1910// (LAInst vty:$xd, vty:$xj, vty:$xk)>; 1911foreach Inst = ["XVMADDWEV_H_B", "XVMADDWOD_H_B", "XVMADDWEV_H_BU", 1912 "XVMADDWOD_H_BU", "XVMADDWEV_H_BU_B", "XVMADDWOD_H_BU_B"] in 1913 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1914 (v16i16 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 1915 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1916foreach Inst = ["XVMADDWEV_W_H", "XVMADDWOD_W_H", "XVMADDWEV_W_HU", 1917 "XVMADDWOD_W_HU", "XVMADDWEV_W_HU_H", "XVMADDWOD_W_HU_H"] in 1918 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1919 (v8i32 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 1920 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1921foreach Inst = ["XVMADDWEV_D_W", "XVMADDWOD_D_W", "XVMADDWEV_D_WU", 1922 "XVMADDWOD_D_WU", "XVMADDWEV_D_WU_W", "XVMADDWOD_D_WU_W"] in 1923 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1924 (v4i64 LASX256:$xd), (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)), 1925 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1926foreach Inst = ["XVMADDWEV_Q_D", "XVMADDWOD_Q_D", "XVMADDWEV_Q_DU", 1927 "XVMADDWOD_Q_DU", "XVMADDWEV_Q_DU_D", "XVMADDWOD_Q_DU_D"] in 1928 def : Pat<(deriveLASXIntrinsic<Inst>.ret 1929 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)), 1930 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 1931 1932// vty: v32i8/v16i16/v8i32/v4i64 1933// Pat<(Intrinsic vty:$xj), 1934// (LAInst vty:$xj)>; 1935foreach Inst = ["XVEXTH_H_B", "XVEXTH_HU_BU", 1936 "XVMSKLTZ_B", "XVMSKGEZ_B", "XVMSKNZ_B", 1937 "XVCLO_B", "VEXT2XV_H_B", "VEXT2XV_HU_BU", 1938 "VEXT2XV_W_B", "VEXT2XV_WU_BU", "VEXT2XV_D_B", 1939 "VEXT2XV_DU_BU", "XVREPLVE0_B", "XVREPLVE0_Q"] in 1940 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj)), 1941 (!cast<LAInst>(Inst) LASX256:$xj)>; 1942foreach Inst = ["XVEXTH_W_H", "XVEXTH_WU_HU", "XVMSKLTZ_H", 1943 "XVCLO_H", "XVFCVTL_S_H", "XVFCVTH_S_H", 1944 "VEXT2XV_W_H", "VEXT2XV_WU_HU", "VEXT2XV_D_H", 1945 "VEXT2XV_DU_HU", "XVREPLVE0_H"] in 1946 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj)), 1947 (!cast<LAInst>(Inst) LASX256:$xj)>; 1948foreach Inst = ["XVEXTH_D_W", "XVEXTH_DU_WU", "XVMSKLTZ_W", 1949 "XVCLO_W", "XVFFINT_S_W", "XVFFINT_S_WU", 1950 "XVFFINTL_D_W", "XVFFINTH_D_W", 1951 "VEXT2XV_D_W", "VEXT2XV_DU_WU", "XVREPLVE0_W"] in 1952 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj)), 1953 (!cast<LAInst>(Inst) LASX256:$xj)>; 1954foreach Inst = ["XVEXTH_Q_D", "XVEXTH_QU_DU", "XVMSKLTZ_D", 1955 "XVEXTL_Q_D", "XVEXTL_QU_DU", 1956 "XVCLO_D", "XVFFINT_D_L", "XVFFINT_D_LU", 1957 "XVREPLVE0_D"] in 1958 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj)), 1959 (!cast<LAInst>(Inst) LASX256:$xj)>; 1960 1961// Pat<(Intrinsic timm:$imm) 1962// (LAInst timm:$imm)>; 1963def : Pat<(int_loongarch_lasx_xvldi timm:$imm), 1964 (XVLDI (to_valid_timm timm:$imm))>; 1965foreach Inst = ["XVREPLI_B", "XVREPLI_H", "XVREPLI_W", "XVREPLI_D"] in 1966 def : Pat<(deriveLASXIntrinsic<Inst>.ret timm:$imm), 1967 (!cast<LAInst>("Pseudo"#Inst) (to_valid_timm timm:$imm))>; 1968 1969// vty: v32i8/v16i16/v8i32/v4i64 1970// Pat<(Intrinsic vty:$xj, timm:$imm) 1971// (LAInst vty:$xj, timm:$imm)>; 1972foreach Inst = ["XVSAT_B", "XVSAT_BU", "XVNORI_B", "XVROTRI_B", "XVSLLWIL_H_B", 1973 "XVSLLWIL_HU_BU", "XVSRLRI_B", "XVSRARI_B", 1974 "XVSEQI_B", "XVSLEI_B", "XVSLEI_BU", "XVSLTI_B", "XVSLTI_BU", 1975 "XVREPL128VEI_B", "XVBSLL_V", "XVBSRL_V", "XVSHUF4I_B"] in 1976 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v32i8 LASX256:$xj), timm:$imm), 1977 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1978foreach Inst = ["XVSAT_H", "XVSAT_HU", "XVROTRI_H", "XVSLLWIL_W_H", 1979 "XVSLLWIL_WU_HU", "XVSRLRI_H", "XVSRARI_H", 1980 "XVSEQI_H", "XVSLEI_H", "XVSLEI_HU", "XVSLTI_H", "XVSLTI_HU", 1981 "XVREPL128VEI_H", "XVSHUF4I_H"] in 1982 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v16i16 LASX256:$xj), timm:$imm), 1983 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1984foreach Inst = ["XVSAT_W", "XVSAT_WU", "XVROTRI_W", "XVSLLWIL_D_W", 1985 "XVSLLWIL_DU_WU", "XVSRLRI_W", "XVSRARI_W", 1986 "XVSEQI_W", "XVSLEI_W", "XVSLEI_WU", "XVSLTI_W", "XVSLTI_WU", 1987 "XVREPL128VEI_W", "XVSHUF4I_W", "XVPICKVE_W"] in 1988 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8i32 LASX256:$xj), timm:$imm), 1989 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1990foreach Inst = ["XVSAT_D", "XVSAT_DU", "XVROTRI_D", "XVSRLRI_D", "XVSRARI_D", 1991 "XVSEQI_D", "XVSLEI_D", "XVSLEI_DU", "XVSLTI_D", "XVSLTI_DU", 1992 "XVPICKVE2GR_D", "XVPICKVE2GR_DU", 1993 "XVREPL128VEI_D", "XVPERMI_D", "XVPICKVE_D"] in 1994 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4i64 LASX256:$xj), timm:$imm), 1995 (!cast<LAInst>(Inst) LASX256:$xj, (to_valid_timm timm:$imm))>; 1996 1997// vty: v32i8/v16i16/v8i32/v4i64 1998// Pat<(Intrinsic vty:$xd, vty:$xj, timm:$imm) 1999// (LAInst vty:$xd, vty:$xj, timm:$imm)>; 2000foreach Inst = ["XVSRLNI_B_H", "XVSRANI_B_H", "XVSRLRNI_B_H", "XVSRARNI_B_H", 2001 "XVSSRLNI_B_H", "XVSSRANI_B_H", "XVSSRLNI_BU_H", "XVSSRANI_BU_H", 2002 "XVSSRLRNI_B_H", "XVSSRARNI_B_H", "XVSSRLRNI_BU_H", "XVSSRARNI_BU_H", 2003 "XVFRSTPI_B", "XVBITSELI_B", "XVEXTRINS_B", "XVPERMI_Q"] in 2004 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2005 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), timm:$imm), 2006 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 2007 (to_valid_timm timm:$imm))>; 2008foreach Inst = ["XVSRLNI_H_W", "XVSRANI_H_W", "XVSRLRNI_H_W", "XVSRARNI_H_W", 2009 "XVSSRLNI_H_W", "XVSSRANI_H_W", "XVSSRLNI_HU_W", "XVSSRANI_HU_W", 2010 "XVSSRLRNI_H_W", "XVSSRARNI_H_W", "XVSSRLRNI_HU_W", "XVSSRARNI_HU_W", 2011 "XVFRSTPI_H", "XVEXTRINS_H"] in 2012 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2013 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), timm:$imm), 2014 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 2015 (to_valid_timm timm:$imm))>; 2016foreach Inst = ["XVSRLNI_W_D", "XVSRANI_W_D", "XVSRLRNI_W_D", "XVSRARNI_W_D", 2017 "XVSSRLNI_W_D", "XVSSRANI_W_D", "XVSSRLNI_WU_D", "XVSSRANI_WU_D", 2018 "XVSSRLRNI_W_D", "XVSSRARNI_W_D", "XVSSRLRNI_WU_D", "XVSSRARNI_WU_D", 2019 "XVPERMI_W", "XVEXTRINS_W", "XVINSVE0_W"] in 2020 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2021 (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), timm:$imm), 2022 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 2023 (to_valid_timm timm:$imm))>; 2024foreach Inst = ["XVSRLNI_D_Q", "XVSRANI_D_Q", "XVSRLRNI_D_Q", "XVSRARNI_D_Q", 2025 "XVSSRLNI_D_Q", "XVSSRANI_D_Q", "XVSSRLNI_DU_Q", "XVSSRANI_DU_Q", 2026 "XVSSRLRNI_D_Q", "XVSSRARNI_D_Q", "XVSSRLRNI_DU_Q", "XVSSRARNI_DU_Q", 2027 "XVSHUF4I_D", "XVEXTRINS_D", "XVINSVE0_D"] in 2028 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2029 (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), timm:$imm), 2030 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, 2031 (to_valid_timm timm:$imm))>; 2032 2033// vty: v32i8/v16i16/v8i32/v4i64 2034// Pat<(Intrinsic vty:$xd, vty:$xj, vty:$xk), 2035// (LAInst vty:$xd, vty:$xj, vty:$xk)>; 2036foreach Inst = ["XVFRSTP_B", "XVBITSEL_V", "XVSHUF_B"] in 2037 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2038 (v32i8 LASX256:$xd), (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)), 2039 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2040foreach Inst = ["XVFRSTP_H", "XVSHUF_H"] in 2041 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2042 (v16i16 LASX256:$xd), (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)), 2043 (!cast<LAInst>(Inst) LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2044def : Pat<(int_loongarch_lasx_xvshuf_w (v8i32 LASX256:$xd), (v8i32 LASX256:$xj), 2045 (v8i32 LASX256:$xk)), 2046 (XVSHUF_W LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2047def : Pat<(int_loongarch_lasx_xvshuf_d (v4i64 LASX256:$xd), (v4i64 LASX256:$xj), 2048 (v4i64 LASX256:$xk)), 2049 (XVSHUF_D LASX256:$xd, LASX256:$xj, LASX256:$xk)>; 2050 2051// vty: v8f32/v4f64 2052// Pat<(Intrinsic vty:$xj, vty:$xk, vty:$xa), 2053// (LAInst vty:$xj, vty:$xk, vty:$xa)>; 2054foreach Inst = ["XVFMSUB_S", "XVFNMADD_S", "XVFNMSUB_S"] in 2055 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2056 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk), (v8f32 LASX256:$xa)), 2057 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 2058foreach Inst = ["XVFMSUB_D", "XVFNMADD_D", "XVFNMSUB_D"] in 2059 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2060 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk), (v4f64 LASX256:$xa)), 2061 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk, LASX256:$xa)>; 2062 2063// vty: v8f32/v4f64 2064// Pat<(Intrinsic vty:$xj, vty:$xk), 2065// (LAInst vty:$xj, vty:$xk)>; 2066foreach Inst = ["XVFMAX_S", "XVFMIN_S", "XVFMAXA_S", "XVFMINA_S", "XVFCVT_H_S", 2067 "XVFCMP_CAF_S", "XVFCMP_CUN_S", "XVFCMP_CEQ_S", "XVFCMP_CUEQ_S", 2068 "XVFCMP_CLT_S", "XVFCMP_CULT_S", "XVFCMP_CLE_S", "XVFCMP_CULE_S", 2069 "XVFCMP_CNE_S", "XVFCMP_COR_S", "XVFCMP_CUNE_S", 2070 "XVFCMP_SAF_S", "XVFCMP_SUN_S", "XVFCMP_SEQ_S", "XVFCMP_SUEQ_S", 2071 "XVFCMP_SLT_S", "XVFCMP_SULT_S", "XVFCMP_SLE_S", "XVFCMP_SULE_S", 2072 "XVFCMP_SNE_S", "XVFCMP_SOR_S", "XVFCMP_SUNE_S"] in 2073 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2074 (v8f32 LASX256:$xj), (v8f32 LASX256:$xk)), 2075 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 2076foreach Inst = ["XVFMAX_D", "XVFMIN_D", "XVFMAXA_D", "XVFMINA_D", "XVFCVT_S_D", 2077 "XVFTINTRNE_W_D", "XVFTINTRZ_W_D", "XVFTINTRP_W_D", "XVFTINTRM_W_D", 2078 "XVFTINT_W_D", 2079 "XVFCMP_CAF_D", "XVFCMP_CUN_D", "XVFCMP_CEQ_D", "XVFCMP_CUEQ_D", 2080 "XVFCMP_CLT_D", "XVFCMP_CULT_D", "XVFCMP_CLE_D", "XVFCMP_CULE_D", 2081 "XVFCMP_CNE_D", "XVFCMP_COR_D", "XVFCMP_CUNE_D", 2082 "XVFCMP_SAF_D", "XVFCMP_SUN_D", "XVFCMP_SEQ_D", "XVFCMP_SUEQ_D", 2083 "XVFCMP_SLT_D", "XVFCMP_SULT_D", "XVFCMP_SLE_D", "XVFCMP_SULE_D", 2084 "XVFCMP_SNE_D", "XVFCMP_SOR_D", "XVFCMP_SUNE_D"] in 2085 def : Pat<(deriveLASXIntrinsic<Inst>.ret 2086 (v4f64 LASX256:$xj), (v4f64 LASX256:$xk)), 2087 (!cast<LAInst>(Inst) LASX256:$xj, LASX256:$xk)>; 2088 2089// vty: v8f32/v4f64 2090// Pat<(Intrinsic vty:$xj), 2091// (LAInst vty:$xj)>; 2092foreach Inst = ["XVFLOGB_S", "XVFCLASS_S", "XVFSQRT_S", "XVFRECIP_S", "XVFRSQRT_S", 2093 "XVFRINT_S", "XVFCVTL_D_S", "XVFCVTH_D_S", 2094 "XVFRINTRNE_S", "XVFRINTRZ_S", "XVFRINTRP_S", "XVFRINTRM_S", 2095 "XVFTINTRNE_W_S", "XVFTINTRZ_W_S", "XVFTINTRP_W_S", "XVFTINTRM_W_S", 2096 "XVFTINT_W_S", "XVFTINTRZ_WU_S", "XVFTINT_WU_S", 2097 "XVFTINTRNEL_L_S", "XVFTINTRNEH_L_S", "XVFTINTRZL_L_S", 2098 "XVFTINTRZH_L_S", "XVFTINTRPL_L_S", "XVFTINTRPH_L_S", 2099 "XVFTINTRML_L_S", "XVFTINTRMH_L_S", "XVFTINTL_L_S", 2100 "XVFTINTH_L_S"] in 2101 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)), 2102 (!cast<LAInst>(Inst) LASX256:$xj)>; 2103foreach Inst = ["XVFLOGB_D", "XVFCLASS_D", "XVFSQRT_D", "XVFRECIP_D", "XVFRSQRT_D", 2104 "XVFRINT_D", 2105 "XVFRINTRNE_D", "XVFRINTRZ_D", "XVFRINTRP_D", "XVFRINTRM_D", 2106 "XVFTINTRNE_L_D", "XVFTINTRZ_L_D", "XVFTINTRP_L_D", "XVFTINTRM_L_D", 2107 "XVFTINT_L_D", "XVFTINTRZ_LU_D", "XVFTINT_LU_D"] in 2108 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)), 2109 (!cast<LAInst>(Inst) LASX256:$xj)>; 2110 2111// 256-Bit vector FP approximate reciprocal operation 2112let Predicates = [HasFrecipe] in { 2113foreach Inst = ["XVFRECIPE_S", "XVFRSQRTE_S"] in 2114 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v8f32 LASX256:$xj)), 2115 (!cast<LAInst>(Inst) LASX256:$xj)>; 2116foreach Inst = ["XVFRECIPE_D", "XVFRSQRTE_D"] in 2117 def : Pat<(deriveLASXIntrinsic<Inst>.ret (v4f64 LASX256:$xj)), 2118 (!cast<LAInst>(Inst) LASX256:$xj)>; 2119 2120def : Pat<(loongarch_vfrecipe v8f32:$src), 2121 (XVFRECIPE_S v8f32:$src)>; 2122def : Pat<(loongarch_vfrecipe v4f64:$src), 2123 (XVFRECIPE_D v4f64:$src)>; 2124def : Pat<(loongarch_vfrsqrte v8f32:$src), 2125 (XVFRSQRTE_S v8f32:$src)>; 2126def : Pat<(loongarch_vfrsqrte v4f64:$src), 2127 (XVFRSQRTE_D v4f64:$src)>; 2128} 2129 2130def : Pat<(int_loongarch_lasx_xvpickve_w_f v8f32:$xj, timm:$imm), 2131 (XVPICKVE_W v8f32:$xj, (to_valid_timm timm:$imm))>; 2132def : Pat<(int_loongarch_lasx_xvpickve_d_f v4f64:$xj, timm:$imm), 2133 (XVPICKVE_D v4f64:$xj, (to_valid_timm timm:$imm))>; 2134 2135// load 2136def : Pat<(int_loongarch_lasx_xvld GPR:$rj, timm:$imm), 2137 (XVLD GPR:$rj, (to_valid_timm timm:$imm))>; 2138def : Pat<(int_loongarch_lasx_xvldx GPR:$rj, GPR:$rk), 2139 (XVLDX GPR:$rj, GPR:$rk)>; 2140 2141def : Pat<(int_loongarch_lasx_xvldrepl_b GPR:$rj, timm:$imm), 2142 (XVLDREPL_B GPR:$rj, (to_valid_timm timm:$imm))>; 2143def : Pat<(int_loongarch_lasx_xvldrepl_h GPR:$rj, timm:$imm), 2144 (XVLDREPL_H GPR:$rj, (to_valid_timm timm:$imm))>; 2145def : Pat<(int_loongarch_lasx_xvldrepl_w GPR:$rj, timm:$imm), 2146 (XVLDREPL_W GPR:$rj, (to_valid_timm timm:$imm))>; 2147def : Pat<(int_loongarch_lasx_xvldrepl_d GPR:$rj, timm:$imm), 2148 (XVLDREPL_D GPR:$rj, (to_valid_timm timm:$imm))>; 2149 2150// store 2151def : Pat<(int_loongarch_lasx_xvst LASX256:$xd, GPR:$rj, timm:$imm), 2152 (XVST LASX256:$xd, GPR:$rj, (to_valid_timm timm:$imm))>; 2153def : Pat<(int_loongarch_lasx_xvstx LASX256:$xd, GPR:$rj, GPR:$rk), 2154 (XVSTX LASX256:$xd, GPR:$rj, GPR:$rk)>; 2155 2156def : Pat<(int_loongarch_lasx_xvstelm_b v32i8:$xd, GPR:$rj, timm:$imm, timm:$idx), 2157 (XVSTELM_B v32i8:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2158 (to_valid_timm timm:$idx))>; 2159def : Pat<(int_loongarch_lasx_xvstelm_h v16i16:$xd, GPR:$rj, timm:$imm, timm:$idx), 2160 (XVSTELM_H v16i16:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2161 (to_valid_timm timm:$idx))>; 2162def : Pat<(int_loongarch_lasx_xvstelm_w v8i32:$xd, GPR:$rj, timm:$imm, timm:$idx), 2163 (XVSTELM_W v8i32:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2164 (to_valid_timm timm:$idx))>; 2165def : Pat<(int_loongarch_lasx_xvstelm_d v4i64:$xd, GPR:$rj, timm:$imm, timm:$idx), 2166 (XVSTELM_D v4i64:$xd, GPR:$rj, (to_valid_timm timm:$imm), 2167 (to_valid_timm timm:$idx))>; 2168 2169} // Predicates = [HasExtLASX] 2170