1 //===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Implements the info about Lanai target spec. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "LanaiTargetMachine.h" 14 15 #include "Lanai.h" 16 #include "LanaiMachineFunctionInfo.h" 17 #include "LanaiTargetObjectFile.h" 18 #include "LanaiTargetTransformInfo.h" 19 #include "TargetInfo/LanaiTargetInfo.h" 20 #include "llvm/Analysis/TargetTransformInfo.h" 21 #include "llvm/CodeGen/Passes.h" 22 #include "llvm/CodeGen/TargetPassConfig.h" 23 #include "llvm/MC/TargetRegistry.h" 24 #include "llvm/Target/TargetOptions.h" 25 #include <optional> 26 27 using namespace llvm; 28 29 namespace llvm { 30 void initializeLanaiMemAluCombinerPass(PassRegistry &); 31 } // namespace llvm 32 33 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() { 34 // Register the target. 35 RegisterTargetMachine<LanaiTargetMachine> registered_target( 36 getTheLanaiTarget()); 37 PassRegistry &PR = *PassRegistry::getPassRegistry(); 38 initializeLanaiDAGToDAGISelLegacyPass(PR); 39 } 40 41 static std::string computeDataLayout() { 42 // Data layout (keep in sync with clang/lib/Basic/Targets.cpp) 43 return "E" // Big endian 44 "-m:e" // ELF name manging 45 "-p:32:32" // 32-bit pointers, 32 bit aligned 46 "-i64:64" // 64 bit integers, 64 bit aligned 47 "-a:0:32" // 32 bit alignment of objects of aggregate type 48 "-n32" // 32 bit native integer width 49 "-S64"; // 64 bit natural stack alignment 50 } 51 52 static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) { 53 return RM.value_or(Reloc::PIC_); 54 } 55 56 LanaiTargetMachine::LanaiTargetMachine( 57 const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString, 58 const TargetOptions &Options, std::optional<Reloc::Model> RM, 59 std::optional<CodeModel::Model> CodeModel, CodeGenOptLevel OptLevel, 60 bool JIT) 61 : CodeGenTargetMachineImpl( 62 T, computeDataLayout(), TT, Cpu, FeatureString, Options, 63 getEffectiveRelocModel(RM), 64 getEffectiveCodeModel(CodeModel, CodeModel::Medium), OptLevel), 65 Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(), 66 OptLevel), 67 TLOF(new LanaiTargetObjectFile()) { 68 initAsmInfo(); 69 } 70 71 TargetTransformInfo 72 LanaiTargetMachine::getTargetTransformInfo(const Function &F) const { 73 return TargetTransformInfo(LanaiTTIImpl(this, F)); 74 } 75 76 MachineFunctionInfo *LanaiTargetMachine::createMachineFunctionInfo( 77 BumpPtrAllocator &Allocator, const Function &F, 78 const TargetSubtargetInfo *STI) const { 79 return LanaiMachineFunctionInfo::create<LanaiMachineFunctionInfo>(Allocator, 80 F, STI); 81 } 82 83 namespace { 84 // Lanai Code Generator Pass Configuration Options. 85 class LanaiPassConfig : public TargetPassConfig { 86 public: 87 LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager) 88 : TargetPassConfig(TM, *PassManager) {} 89 90 LanaiTargetMachine &getLanaiTargetMachine() const { 91 return getTM<LanaiTargetMachine>(); 92 } 93 94 void addIRPasses() override; 95 bool addInstSelector() override; 96 void addPreSched2() override; 97 void addPreEmitPass() override; 98 }; 99 } // namespace 100 101 TargetPassConfig * 102 LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) { 103 return new LanaiPassConfig(*this, &PassManager); 104 } 105 106 void LanaiPassConfig::addIRPasses() { 107 addPass(createAtomicExpandLegacyPass()); 108 109 TargetPassConfig::addIRPasses(); 110 } 111 112 // Install an instruction selector pass. 113 bool LanaiPassConfig::addInstSelector() { 114 addPass(createLanaiISelDag(getLanaiTargetMachine())); 115 return false; 116 } 117 118 // Implemented by targets that want to run passes immediately before 119 // machine code is emitted. 120 void LanaiPassConfig::addPreEmitPass() { 121 addPass(createLanaiDelaySlotFillerPass(getLanaiTargetMachine())); 122 } 123 124 // Run passes after prolog-epilog insertion and before the second instruction 125 // scheduling pass. 126 void LanaiPassConfig::addPreSched2() { 127 addPass(createLanaiMemAluCombinerPass()); 128 } 129