1//===- PPCTargetParser.def - PPC target parsing defines ---------*- C++ -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file provides defines to build up the PPC target parser's logic. 10// 11//===----------------------------------------------------------------------===// 12 13// NOTE: NO INCLUDE GUARD DESIRED! 14 15#ifdef PPC_TGT_PARSER_UNDEF_MACROS 16#undef PPC_LNX_FEATURE 17#undef PPC_CPU 18#undef PPC_FAWORD_HWCAP 19#undef PPC_FAWORD_HWCAP2 20#undef PPC_FAWORD_CPUID 21#undef PPC_HWCAP_OFFSET_LE32 22#undef PPC_HWCAP_OFFSET_LE64 23#undef PPC_HWCAP_OFFSET_BE32 24#undef PPC_HWCAP_OFFSET_BE64 25#undef PPC_HWCAP2_OFFSET_LE32 26#undef PPC_HWCAP2_OFFSET_LE64 27#undef PPC_HWCAP2_OFFSET_BE32 28#undef PPC_HWCAP2_OFFSET_BE64 29#undef PPC_CPUID_OFFSET_LE32 30#undef PPC_CPUID_OFFSET_LE64 31#undef PPC_CPUID_OFFSET_BE32 32#undef PPC_CPUID_OFFSET_BE64 33#undef BUILTIN_PPC_TRUE 34#undef BUILTIN_PPC_FALSE 35#undef USE_SYS_CONF 36#undef SYS_CALL 37#undef BUILTIN_PPC_UNSUPPORTED 38#undef AIX_SYSCON_IMPL_IDX 39#undef AIX_PPC7_VALUE 40#undef AIX_PPC8_VALUE 41#undef AIX_PPC9_VALUE 42#undef AIX_PPC10_VALUE 43#undef AIX_PPC11_VALUE 44#else 45#ifndef PPC_LNX_FEATURE 46#define PPC_LNX_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) 47#endif 48#ifndef PPC_CPU 49#define PPC_CPU(Name, Linux_SUPPORT_METHOD, LinuxID, AIX_SUPPORT_METHOD, AIXID) 50#endif 51#ifndef PPC_FAWORD_HWCAP 52#define PPC_FAWORD_HWCAP 1 53#endif 54#ifndef PPC_FAWORD_HWCAP2 55#define PPC_FAWORD_HWCAP2 2 56#endif 57#ifndef PPC_FAWORD_CPUID 58#define PPC_FAWORD_CPUID 3 59#endif 60 61// PPC CPUs 62// 63// The value of SUPPORT_METHOD can be: 64// BUILTIN_PPC_TRUE : feature supported 65// BUILTIN_PPC_FALSE : feature not supported 66// USE_SYS_CONF : return value depends on comparing VALUE with the specified 67// data member of _system_configuration at INDEX, where the 68// data member is masked by Mask. 69// SYS_CALL : return value depends on comparing a VALUE with the return value 70// of calling `getsystemcfg` with the parameter INDEX, which is 71// then masked by Mask. 72// 73// USE_SYS_CONF is only a methond supported on AIX. 74// 75// Supported SUPPORT_METHOD values. 76#define BUILTIN_PPC_TRUE 1 77#define BUILTIN_PPC_FALSE 0 78#define USE_SYS_CONF 2 79#define SYS_CALL 3 80#define BUILTIN_PPC_UNSUPPORTED 4 81 82#define AIX_SYSCON_IMPL_IDX 1 83 84#define AIX_PPC7_VALUE 0x00008000 85#define AIX_PPC8_VALUE 0x00010000 86#define AIX_PPC9_VALUE 0x00020000 87#define AIX_PPC10_VALUE 0x00040000 88#define AIX_PPC11_VALUE 0x00080000 89 90// __builtin_cpu_is() and __builtin_cpu_supports() are supported only on Power7 and up on AIX. 91// PPC_CPU(Name, Linux_SUPPORT_METHOD, LinuxID, AIX_SUPPORT_METHOD, AIXID) 92PPC_CPU("generic",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 93PPC_CPU("440",SYS_CALL,42,BUILTIN_PPC_FALSE,0) 94PPC_CPU("440fp",SYS_CALL,42,BUILTIN_PPC_FALSE,0) 95PPC_CPU("ppc440",SYS_CALL,42,BUILTIN_PPC_FALSE,0) 96PPC_CPU("450",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 97PPC_CPU("601",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 98PPC_CPU("602",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 99PPC_CPU("603",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 100PPC_CPU("603e",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 101PPC_CPU("603ev",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 102PPC_CPU("604",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 103PPC_CPU("604e",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 104PPC_CPU("620",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 105PPC_CPU("630",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 106PPC_CPU("g3",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 107PPC_CPU("7400",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 108PPC_CPU("g4",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 109PPC_CPU("7450",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 110PPC_CPU("g4+",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 111PPC_CPU("750",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 112PPC_CPU("8548",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 113PPC_CPU("ppc405",SYS_CALL,41,BUILTIN_PPC_FALSE,0) 114PPC_CPU("ppc464",SYS_CALL,43,BUILTIN_PPC_FALSE,0) 115PPC_CPU("ppc476",SYS_CALL,44,BUILTIN_PPC_FALSE,0) 116PPC_CPU("970",SYS_CALL,33,BUILTIN_PPC_FALSE,0) 117PPC_CPU("ppc970",SYS_CALL,33,BUILTIN_PPC_FALSE,0) 118PPC_CPU("g5",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 119PPC_CPU("a2",SYS_CALL,40,BUILTIN_PPC_FALSE,0) 120PPC_CPU("ppca2",SYS_CALL,40,BUILTIN_PPC_FALSE,0) 121PPC_CPU("ppc-cell-be",SYS_CALL,37,BUILTIN_PPC_FALSE,0) 122PPC_CPU("e500",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 123PPC_CPU("e500mc",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 124PPC_CPU("e5500",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 125PPC_CPU("power3",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 126PPC_CPU("pwr3",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 127PPC_CPU("pwr4",SYS_CALL,32,BUILTIN_PPC_FALSE,0) 128PPC_CPU("power4",SYS_CALL,32,BUILTIN_PPC_FALSE,0) 129PPC_CPU("pwr5",SYS_CALL,34,BUILTIN_PPC_FALSE,0) 130PPC_CPU("power5",SYS_CALL,34,BUILTIN_PPC_FALSE,0) 131PPC_CPU("pwr5+",SYS_CALL,35,BUILTIN_PPC_FALSE,0) 132PPC_CPU("power5+",SYS_CALL,35,BUILTIN_PPC_FALSE,0) 133PPC_CPU("pwr5x",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 134PPC_CPU("power5x",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 135PPC_CPU("pwr6",SYS_CALL,36,BUILTIN_PPC_FALSE,0) 136PPC_CPU("power6",SYS_CALL,36,BUILTIN_PPC_FALSE,0) 137PPC_CPU("pwr6x",SYS_CALL,38,BUILTIN_PPC_FALSE,0) 138PPC_CPU("power6x",SYS_CALL,38,BUILTIN_PPC_FALSE,0) 139PPC_CPU("pwr7",SYS_CALL,39,USE_SYS_CONF,AIX_PPC7_VALUE) 140PPC_CPU("power7",SYS_CALL,39,USE_SYS_CONF,AIX_PPC7_VALUE) 141PPC_CPU("pwr8",SYS_CALL,45,USE_SYS_CONF,AIX_PPC8_VALUE) 142PPC_CPU("power8",SYS_CALL,45,USE_SYS_CONF,AIX_PPC8_VALUE) 143PPC_CPU("pwr9",SYS_CALL,46,USE_SYS_CONF,AIX_PPC9_VALUE) 144PPC_CPU("power9",SYS_CALL,46,USE_SYS_CONF,AIX_PPC9_VALUE) 145PPC_CPU("pwr10",SYS_CALL,47,USE_SYS_CONF,AIX_PPC10_VALUE) 146PPC_CPU("power10",SYS_CALL,47,USE_SYS_CONF,AIX_PPC10_VALUE) 147PPC_CPU("pwr11",SYS_CALL,48,USE_SYS_CONF,AIX_PPC11_VALUE) 148PPC_CPU("power11",SYS_CALL,48,USE_SYS_CONF,AIX_PPC11_VALUE) 149PPC_CPU("powerpc",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 150PPC_CPU("ppc",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 151PPC_CPU("ppc32",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 152PPC_CPU("powerpc64",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 153PPC_CPU("ppc64",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 154PPC_CPU("powerpc64le",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 155PPC_CPU("ppc64le",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 156PPC_CPU("future",BUILTIN_PPC_UNSUPPORTED,0,BUILTIN_PPC_UNSUPPORTED,0) 157#undef PPC_CPU 158 159// PPC features on Linux: 160// 161// PPC_LNX_FEATURE(Name, Description, EnumName, BitMask, PPC_FAWORD_WORD) 162PPC_LNX_FEATURE("4xxmac","4xx CPU has a Multiply Accumulator",PPCF_4XXMAC,0x02000000,PPC_FAWORD_HWCAP) 163PPC_LNX_FEATURE("altivec","CPU has a SIMD/Vector Unit",PPCF_ALTIVEC,0x10000000,PPC_FAWORD_HWCAP) 164PPC_LNX_FEATURE("arch_2_05","CPU supports ISA 205 (eg, POWER6)",PPCF_ARCH205,0x00001000,PPC_FAWORD_HWCAP) 165PPC_LNX_FEATURE("arch_2_06","CPU supports ISA 206 (eg, POWER7)",PPCF_ARCH206,0x00000100,PPC_FAWORD_HWCAP) 166PPC_LNX_FEATURE("arch_2_07","CPU supports ISA 207 (eg, POWER8)",PPCF_ARCH207,0x80000000,PPC_FAWORD_HWCAP2) 167PPC_LNX_FEATURE("arch_3_00","CPU supports ISA 30 (eg, POWER9)",PPCF_ARCH30,0x00800000,PPC_FAWORD_HWCAP2) 168PPC_LNX_FEATURE("arch_3_1","CPU supports ISA 31 (eg, POWER10)",PPCF_ARCH31,0x00040000,PPC_FAWORD_HWCAP2) 169PPC_LNX_FEATURE("archpmu","CPU supports the set of compatible performance monitoring events",PPCF_ARCHPMU,0x00000040,PPC_FAWORD_HWCAP) 170PPC_LNX_FEATURE("booke","CPU supports the Embedded ISA category",PPCF_BOOKE,0x00008000,PPC_FAWORD_HWCAP) 171PPC_LNX_FEATURE("cellbe","CPU has a CELL broadband engine",PPCF_CELLBE,0x00010000,PPC_FAWORD_HWCAP) 172PPC_LNX_FEATURE("darn","CPU supports the darn (deliver a random number) instruction",PPCF_DARN,0x00200000,PPC_FAWORD_HWCAP2) 173PPC_LNX_FEATURE("dfp","CPU has a decimal floating point unit",PPCF_DFP,0x00000400,PPC_FAWORD_HWCAP) 174PPC_LNX_FEATURE("dscr","CPU supports the data stream control register",PPCF_DSCR,0x20000000,PPC_FAWORD_HWCAP2) 175PPC_LNX_FEATURE("ebb","CPU supports event base branching",PPCF_EBB,0x10000000,PPC_FAWORD_HWCAP2) 176PPC_LNX_FEATURE("efpdouble","CPU has a SPE double precision floating point unit",PPCF_EFPDOUBLE,0x00200000,PPC_FAWORD_HWCAP) 177PPC_LNX_FEATURE("efpsingle","CPU has a SPE single precision floating point unit",PPCF_EFPSINGLE,0x00400000,PPC_FAWORD_HWCAP) 178PPC_LNX_FEATURE("fpu","CPU has a floating point unit",PPCF_FPU,0x08000000,PPC_FAWORD_HWCAP) 179PPC_LNX_FEATURE("htm","CPU has hardware transaction memory instructions",PPCF_HTM,0x40000000,PPC_FAWORD_HWCAP2) 180PPC_LNX_FEATURE("htm-nosc","Kernel aborts hardware transactions when a syscall is made",PPCF_HTM_NOSC,0x01000000,PPC_FAWORD_HWCAP2) 181PPC_LNX_FEATURE("htm-no-suspend","CPU supports hardware transaction memory but does not support the tsuspend instruction.",PPCF_HTM_NO_SUSPEND,0x00080000,PPC_FAWORD_HWCAP2) 182PPC_LNX_FEATURE("ic_snoop","CPU supports icache snooping capabilities",PPCF_IC_SNOOP,0x00002000,PPC_FAWORD_HWCAP) 183PPC_LNX_FEATURE("ieee128","CPU supports 128-bit IEEE binary floating point instructions",PPCF_IEEE128,0x00400000,PPC_FAWORD_HWCAP2) 184PPC_LNX_FEATURE("isel","CPU supports the integer select instruction",PPCF_ISEL,0x08000000,PPC_FAWORD_HWCAP2) 185PPC_LNX_FEATURE("mma","CPU supports the matrix-multiply assist instructions",PPCF_MMA,0x00020000,PPC_FAWORD_HWCAP2) 186PPC_LNX_FEATURE("mmu","CPU has a memory management unit",PPCF_MMU,0x04000000,PPC_FAWORD_HWCAP) 187PPC_LNX_FEATURE("notb","CPU does not have a timebase (eg, 601 and 403gx)",PPCF_NOTB,0x00100000,PPC_FAWORD_HWCAP) 188PPC_LNX_FEATURE("pa6t","CPU supports the PA Semi 6T CORE ISA",PPCF_PA6T,0x00000800,PPC_FAWORD_HWCAP) 189PPC_LNX_FEATURE("power4","CPU supports ISA 200 (eg, POWER4)",PPCF_POWER4,0x00080000,PPC_FAWORD_HWCAP) 190PPC_LNX_FEATURE("power5","CPU supports ISA 202 (eg, POWER5)",PPCF_POWER5,0x00040000,PPC_FAWORD_HWCAP) 191PPC_LNX_FEATURE("power5+","CPU supports ISA 203 (eg, POWER5+)",PPCF_POWER5P,0x00020000,PPC_FAWORD_HWCAP) 192PPC_LNX_FEATURE("power6x","CPU supports ISA 205 (eg, POWER6) extended opcodes mffgpr and mftgpr.",PPCF_POWER6X,0x00000200,PPC_FAWORD_HWCAP) 193PPC_LNX_FEATURE("ppc32","CPU supports 32-bit mode execution",PPCF_PPC32,0x80000000,PPC_FAWORD_HWCAP) 194PPC_LNX_FEATURE("ppc601","CPU supports the old POWER ISA (eg, 601)",PPCF_PPC601,0x20000000,PPC_FAWORD_HWCAP) 195PPC_LNX_FEATURE("ppc64","CPU supports 64-bit mode execution",PPCF_PPC64,0x40000000,PPC_FAWORD_HWCAP) 196PPC_LNX_FEATURE("ppcle","CPU supports a little-endian mode that uses address swizzling",PPCF_PPCLE,0x00000001,PPC_FAWORD_HWCAP) 197PPC_LNX_FEATURE("scv","Kernel supports system call vectored",PPCF_SCV,0x00100000,PPC_FAWORD_HWCAP2) 198PPC_LNX_FEATURE("smt","CPU support simultaneous multi-threading",PPCF_SMT,0x00004000,PPC_FAWORD_HWCAP) 199PPC_LNX_FEATURE("spe","CPU has a signal processing extension unit",PPCF_SPE,0x00800000,PPC_FAWORD_HWCAP) 200PPC_LNX_FEATURE("tar","CPU supports the target address register",PPCF_TAR,0x04000000,PPC_FAWORD_HWCAP2) 201PPC_LNX_FEATURE("true_le","CPU supports true little-endian mode",PPCF_TRUE_LE,0x00000002,PPC_FAWORD_HWCAP) 202PPC_LNX_FEATURE("ucache","CPU has unified I/D cache",PPCF_UCACHE,0x01000000,PPC_FAWORD_HWCAP) 203PPC_LNX_FEATURE("vcrypto","CPU supports the vector cryptography instructions",PPCF_VCRYPTO,0x02000000,PPC_FAWORD_HWCAP2) 204PPC_LNX_FEATURE("vsx","CPU supports the vector-scalar extension",PPCF_VSX,0x00000080,PPC_FAWORD_HWCAP) 205 206#ifdef PPC_LNX_DEFINE_OFFSETS 207# define PPC_HWCAP_OFFSET_LE32 -0x703C 208# define PPC_HWCAP_OFFSET_LE64 -0x7064 209# define PPC_HWCAP_OFFSET_BE32 -0x7040 210# define PPC_HWCAP_OFFSET_BE64 -0x7068 211# define PPC_HWCAP2_OFFSET_LE32 -0x7040 212# define PPC_HWCAP2_OFFSET_LE64 -0x7068 213# define PPC_HWCAP2_OFFSET_BE32 -0x703C 214# define PPC_HWCAP2_OFFSET_BE64 -0x7064 215# define PPC_CPUID_OFFSET_LE32 -0x7034 216# define PPC_CPUID_OFFSET_LE64 -0x705C 217# define PPC_CPUID_OFFSET_BE32 -0x7034 218# define PPC_CPUID_OFFSET_BE64 -0x705C 219#endif 220#undef PPC_LNX_DEFINE_OFFSETS 221#undef PPC_LNX_FEATURE 222 223// PPC features on AIX 224// 225// Definition of the following values are found in the AIX header 226// file: </usr/include/sys/systemcfg.h>. 227#ifndef AIX_POWERPC_USE_SYS_CONF 228 #define AIX_POWERPC_USE_SYS_CONF 229 #define AIX_SYSCON_CACHE_IDX 5 230 #define AIX_SYSCON_SMT_IDX 44 231 #define AIX_SYSCON_VMX_IDX 46 232 #define AIX_SYSCON_DFP_IDX 53 233 234 #define SYS_CALL_TM_VER 59 235 #define SYS_CALL_MMA_VER 62 236#endif 237 238#ifndef PPC_AIX_FEATURE 239#define PPC_AIX_FEATURE(NAME,DESC,SUPPORT_METHOD,INDEX,MASK,COMPARE_OP,VALUE) 240#endif 241 242PPC_AIX_FEATURE("4xxmac","4xx CPU has a Multiply Accumulator",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 243PPC_AIX_FEATURE("altivec","CPU has a SIMD/Vector Unit",USE_SYS_CONF,AIX_SYSCON_VMX_IDX,0,ICmpInst::ICMP_UGT,0) 244PPC_AIX_FEATURE("arch_2_05","CPU supports ISA 205 (eg, POWER6)",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 245PPC_AIX_FEATURE("arch_2_06","CPU supports ISA 206 (eg, POWER7)",USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC7_VALUE) 246PPC_AIX_FEATURE("arch_2_07","CPU supports ISA 207 (eg, POWER8)",USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC8_VALUE) 247PPC_AIX_FEATURE("arch_3_00","CPU supports ISA 30 (eg, POWER9)", USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC9_VALUE) 248PPC_AIX_FEATURE("arch_3_1","CPU supports ISA 31 (eg, POWER10)", USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC10_VALUE) 249PPC_AIX_FEATURE("booke","CPU supports the Embedded ISA category",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 250PPC_AIX_FEATURE("cellbe","CPU has a CELL broadband engine",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 251PPC_AIX_FEATURE("darn","CPU supports the darn (deliver a random number) instruction",USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC9_VALUE) 252PPC_AIX_FEATURE("dfp","CPU has a decimal floating point unit",USE_SYS_CONF,AIX_SYSCON_DFP_IDX,0,ICmpInst::ICMP_NE,0) 253PPC_AIX_FEATURE("dscr","CPU supports the data stream control register",USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC8_VALUE) 254PPC_AIX_FEATURE("ebb","CPU supports event base branching",USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC8_VALUE) 255PPC_AIX_FEATURE("efpsingle","CPU has a SPE single precision floating point unit",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 256PPC_AIX_FEATURE("efpdouble","CPU has a SPE double precision floating point unit",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 257PPC_AIX_FEATURE("fpu","CPU has a floating point unit",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 258PPC_AIX_FEATURE("htm","CPU has hardware transaction memory instructions",SYS_CALL,SYS_CALL_TM_VER,0,ICmpInst::ICMP_UGT,0) 259PPC_AIX_FEATURE("isel","CPU supports the integer select instruction",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 260PPC_AIX_FEATURE("mma","CPU supports the matrix-multiply assist instructions",SYS_CALL,SYS_CALL_MMA_VER,0,ICmpInst::ICMP_UGT,0) 261PPC_AIX_FEATURE("mmu","CPU has a memory management unit",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 262PPC_AIX_FEATURE("pa6t","CPU supports the PA Semi 6T CORE ISA",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 263PPC_AIX_FEATURE("power4","CPU supports ISA 200 (eg, POWER4)",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 264PPC_AIX_FEATURE("power5","CPU supports ISA 202 (eg, POWER5)",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 265PPC_AIX_FEATURE("power5+","CPU supports ISA 203 (eg, POWER5+)",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 266PPC_AIX_FEATURE("power6x","CPU supports ISA 205 (eg, POWER6)",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 267PPC_AIX_FEATURE("ppc32","CPU supports 32-bit mode execution",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 268PPC_AIX_FEATURE("ppc601","CPU supports the old POWER ISA (eg, 601)",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 269PPC_AIX_FEATURE("ppc64","CPU supports 64-bit mode execution",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 270PPC_AIX_FEATURE("ppcle","CPU supports a little-endian mode that uses address swizzling",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 271PPC_AIX_FEATURE("smt","CPU supports simultaneous multi-threading",USE_SYS_CONF,AIX_SYSCON_SMT_IDX,0x3,ICmpInst::ICMP_EQ,0x3) 272PPC_AIX_FEATURE("spe","CPU has a signal processing extension unit",BUILTIN_PPC_FALSE,0,0,CmpInst::Predicate(),0) 273PPC_AIX_FEATURE("tar","CPU supports the target address register",USE_SYS_CONF,AIX_SYSCON_IMPL_IDX,0,ICmpInst::ICMP_UGE,AIX_PPC8_VALUE) 274PPC_AIX_FEATURE("true_le","CPU supports true little-endian mode",BUILTIN_PPC_TRUE,0,0,CmpInst::Predicate(),0) 275PPC_AIX_FEATURE("ucache","CPU has unified I/D cache",USE_SYS_CONF,AIX_SYSCON_CACHE_IDX,0x00000002,ICmpInst::ICMP_EQ,0x00000002) 276PPC_AIX_FEATURE("vsx","CPU supports the vector-scalar extension",USE_SYS_CONF,AIX_SYSCON_VMX_IDX,0,ICmpInst::ICMP_UGT,1) 277#undef PPC_AIX_FEATURE 278 279// PPC_SYSTEMCONFIG_TYPE defines the IR data structure of kernel variable 280// `_system_configuration`, that is found in the AIX OS header file: </usr/include/sys/systemcfg.h>. 281#ifndef PPC_SYSTEMCONFIG_TYPE 282#define PPC_SYSTEMCONFIG_TYPE \ 283Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, \ 284Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, \ 285Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, \ 286Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, \ 287Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, \ 288Int32Ty, Int32Ty, Int64Ty, Int32Ty, Int32Ty, Int32Ty, \ 289Int32Ty, Int64Ty, Int64Ty, Int64Ty, Int64Ty, Int32Ty, \ 290Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int32Ty, Int64Ty, \ 291Int32Ty, Int8Ty, Int8Ty, Int8Ty, Int8Ty, Int32Ty, \ 292Int32Ty, Int16Ty, Int16Ty, llvm::ArrayType::get(Int32Ty,3), Int32Ty 293#endif 294 295#endif // !PPC_TGT_PARSER_UNDEF_MACROS 296