xref: /llvm-project/llvm/docs/AMDGPU/gfx90a_fx_operand.rst (revision 0d0018e709ec4ed453435217c2b8f47c1925ec39)
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8.. _amdgpu_synid_gfx90a_fx_operand:
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10FX Operand
11==========
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13This is a *f32* or *f16* operand depending on instruction modifiers:
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15* Operand size is controlled by :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>`.
16* Location of the 16-bit operand is controlled by :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>`.
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