1// REQUIRES: arm 2// RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf --arm-add-build-attributes %s -o %t.o 3// RUN: ld.lld --fix-cortex-a8 -verbose %t.o -o %t2 2>&1 | FileCheck %s 4// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x29004 --stop-address=0x29024 --no-show-raw-insn | FileCheck --check-prefix=CHECK-PATCHES %s 5// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x21ffa --stop-address=0x22002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE1 %s 6// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x22ffa --stop-address=0x23002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE2 %s 7// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x23ffa --stop-address=0x24002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE3 %s 8// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x24ff4 --stop-address=0x25002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE4 %s 9// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x25ffa --stop-address=0x26002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE5 %s 10// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x26ffa --stop-address=0x27002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE6 %s 11// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x27ffa --stop-address=0x28002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE7 %s 12// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x28ff4 --stop-address=0x29002 --no-show-raw-insn | FileCheck --check-prefix=CALLSITE8 %s 13// RUN: ld.lld --fix-cortex-a8 -verbose -r %t.o -o %t3 2>&1 | FileCheck --check-prefix=CHECK-RELOCATABLE-LLD %s 14// RUN: llvm-objdump --no-print-imm-hex --no-show-raw-insn -d %t3 --start-address=0xffa --stop-address=0x1002 | FileCheck --check-prefix=CHECK-RELOCATABLE %s 15 16// CHECK: ld.lld: detected cortex-a8-657419 erratum sequence starting at 22FFE in unpatched output 17// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 23FFE in unpatched output 18// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 24FFE in unpatched output 19// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 25FFE in unpatched output 20// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 26FFE in unpatched output 21// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 27FFE in unpatched output 22// CHECK-NEXT: ld.lld: detected cortex-a8-657419 erratum sequence starting at 28FFE in unpatched output 23 24/// We do not detect errors when doing a relocatable link as we don't know what 25/// the final addresses are. 26// CHECK-RELOCATABLE-LLD-NOT: ld.lld: detected cortex-a8-657419 erratum sequence 27 28/// Basic tests for the -fix-cortex-a8 erratum fix. The full details of the 29/// erratum and the patch are in ARMErrataFix.cpp . The test creates an 30/// instance of the erratum every 4KiB (32-bit non-branch, followed by 32-bit 31/// branch instruction, where the branch instruction spans two 4 KiB regions, 32/// and the branch destination is in the first 4KiB region. 33/// 34/// Test each 32-bit branch b.w, bcc.w, bl, blx. For b.w, bcc.w, and bl we 35/// check the relocated and non-relocated forms. The blx instruction 36/// always has a relocation in assembler. 37 .syntax unified 38 .thumb 39 .text 40 .global _start 41 .type _start, %function 42 .balign 4096 43 .thumb_func 44_start: 45 nop.w 46 .space 4086 47 .thumb_func 48 .global target 49 .type target, %function 50target: 51/// 32-bit Branch spans 2 4KiB regions, preceded by a 32-bit non branch 52/// instruction, expect a patch. 53 nop.w 54 b.w target 55 56// CALLSITE1: 00021ffa <target>: 57// CALLSITE1-NEXT: 21ffa: nop.w 58// CALLSITE1-NEXT: 21ffe: b.w 0x29004 <__CortexA8657417_21FFE> 59/// Expect no patch when doing a relocatable link ld -r. 60// CHECK-RELOCATABLE: 00000ffa <target>: 61// CHECK-RELOCATABLE-NEXT: ffa: nop.w 62// CHECK-RELOCATABLE-NEXT: ffe: b.w {{.+}} @ imm = #-4 63 64 .space 4088 65 .type target2, %function 66 .local target2 67target2: 68/// 32-bit Branch and link spans 2 4KiB regions, preceded by a 32-bit 69/// non branch instruction, expect a patch. 70 nop.w 71 bl target2 72 73// CALLSITE2: 00022ffa <target2>: 74// CALLSITE2-NEXT: 22ffa: nop.w 75// CALLSITE2-NEXT: 22ffe: bl 0x29008 <__CortexA8657417_22FFE> 76 77 .space 4088 78 .type target3, %function 79 .local target3 80target3: 81/// 32-bit conditional branch spans 2 4KiB regions, preceded by a 32-bit 82/// non branch instruction, expect a patch. 83 nop.w 84 beq.w target3 85 86// CALLSITE3: 00023ffa <target3>: 87// CALLSITE3-NEXT: 23ffa: nop.w 88// CALLSITE3-NEXT: 23ffe: beq.w 0x2900c <__CortexA8657417_23FFE> 89 90 .space 4082 91 .type target4, %function 92 .local target4 93 .arm 94target4: 95 bx lr 96 .space 2 97 .thumb 98/// 32-bit Branch link and exchange spans 2 4KiB regions, preceded by a 99/// 32-bit non branch instruction, blx always goes via relocation. Expect 100/// a patch. 101 nop.w 102 blx target4 103 104/// Target = 0x19010 __CortexA8657417_15FFE 105// CALLSITE4: 00024ff4 <target4>: 106// CALLSITE4-NEXT: 24ff4: bx lr 107// CALLSITE4: 24ff8: 00 00 .short 0x0000 108// CALLSITE4: 24ffa: nop.w 109// CALLSITE4-NEXT: 24ffe: blx 0x29010 <__CortexA8657417_24FFE> 110 111/// Separate sections for source and destination of branches to force 112/// a relocation. 113 .section .text.0, "ax", %progbits 114 .balign 2 115 .global target5 116 .type target5, %function 117target5: 118 nop.w 119 .section .text.1, "ax", %progbits 120 .space 4084 121/// 32-bit branch spans 2 4KiB regions, preceded by a 32-bit non branch 122/// instruction, expect a patch. Branch to global symbol so goes via a 123/// relocation. 124 nop.w 125 b.w target5 126 127/// Target = 0x19014 __CortexA8657417_16FFE 128// CALLSITE5: 25ffa: nop.w 129// CALLSITE5-NEXT: 25ffe: b.w 0x29014 <__CortexA8657417_25FFE> 130 131 .section .text.2, "ax", %progbits 132 .balign 2 133 .global target6 134 .type target6, %function 135target6: 136 nop.w 137 .section .text.3, "ax", %progbits 138 .space 4084 139/// 32-bit branch and link spans 2 4KiB regions, preceded by a 32-bit 140/// non branch instruction, expect a patch. Branch to global symbol so 141/// goes via a relocation. 142 nop.w 143 bl target6 144 145/// Target = 0x19018 __CortexA8657417_17FFE 146// CALLSITE6: 26ffa: nop.w 147// CALLSITE6-NEXT: 26ffe: bl 0x29018 <__CortexA8657417_26FFE> 148 149 .section .text.4, "ax", %progbits 150 .global target7 151 .type target7, %function 152target7: 153 nop.w 154 .section .text.5, "ax", %progbits 155 .space 4084 156/// 32-bit conditional branch spans 2 4KiB regions, preceded by a 32-bit 157/// non branch instruction, expect a patch. Branch to global symbol so 158/// goes via a relocation. 159 nop.w 160 bne.w target7 161 162// CALLSITE7: 27ffa: nop.w 163// CALLSITE7-NEXT: 27ffe: bne.w 0x2901c <__CortexA8657417_27FFE> 164 165 .section .text.6, "ax", %progbits 166 .space 4080 167 .arm 168 .global target8 169 .type target8, %function 170target8: 171 bx lr 172 173 .section .text.7, "ax", %progbits 174 .space 2 175 .thumb 176/// 32-bit Branch link spans 2 4KiB regions, preceded by a 32-bit non branch 177/// instruction, expect a patch. The target of the BL is in ARM state so we 178/// expect it to be turned into a BLX. The patch must be in ARM state to 179/// avoid a state change thunk. 180 nop.w 181 bl target8 182 183// CALLSITE8: 00028ff4 <target8>: 184// CALLSITE8-NEXT: 28ff4: bx lr 185// CALLSITE8: 28ff8: 00 00 .short 0x0000 186// CALLSITE8: 28ffa: nop.w 187// CALLSITE8-NEXT: 28ffe: blx 0x29020 <__CortexA8657417_28FFE> 188 189// CHECK-PATCHES: 00029004 <__CortexA8657417_21FFE>: 190// CHECK-PATCHES-NEXT: 29004: b.w 0x21ffa <target> 191 192// CHECK-PATCHES: 00029008 <__CortexA8657417_22FFE>: 193// CHECK-PATCHES-NEXT: 29008: b.w 0x22ffa <target2> 194 195// CHECK-PATCHES: 0002900c <__CortexA8657417_23FFE>: 196// CHECK-PATCHES-NEXT: 2900c: b.w 0x23ffa <target3> 197 198// CHECK-PATCHES: 00029010 <__CortexA8657417_24FFE>: 199// CHECK-PATCHES-NEXT: 29010: b 0x24ff4 <target4> 200 201// CHECK-PATCHES: 00029014 <__CortexA8657417_25FFE>: 202// CHECK-PATCHES-NEXT: 29014: b.w 0x25002 <target5> 203 204// CHECK-PATCHES: 00029018 <__CortexA8657417_26FFE>: 205// CHECK-PATCHES-NEXT: 29018: b.w 0x26002 <target6> 206 207// CHECK-PATCHES: 0002901c <__CortexA8657417_27FFE>: 208// CHECK-PATCHES-NEXT: 2901c: b.w 0x27002 <target7> 209 210// CHECK-PATCHES: 00029020 <__CortexA8657417_28FFE>: 211// CHECK-PATCHES-NEXT: 29020: b 0x28ff4 <target8> 212