1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Machine-specific things, such as applying relocations, creation of 10 // GOT or PLT entries, etc., are handled in this file. 11 // 12 // Refer the ELF spec for the single letter variables, S, A or P, used 13 // in this file. 14 // 15 // Some functions defined in this file has "relaxTls" as part of their names. 16 // They do peephole optimization for TLS variables by rewriting instructions. 17 // They are not part of the ABI but optional optimization, so you can skip 18 // them if you are not interested in how TLS variables are optimized. 19 // See the following paper for the details. 20 // 21 // Ulrich Drepper, ELF Handling For Thread-Local Storage 22 // http://www.akkadia.org/drepper/tls.pdf 23 // 24 //===----------------------------------------------------------------------===// 25 26 #include "Target.h" 27 #include "InputFiles.h" 28 #include "OutputSections.h" 29 #include "SymbolTable.h" 30 #include "Symbols.h" 31 #include "SyntheticSections.h" 32 #include "lld/Common/ErrorHandler.h" 33 #include "llvm/Object/ELF.h" 34 35 using namespace llvm; 36 using namespace llvm::object; 37 using namespace llvm::ELF; 38 using namespace lld; 39 using namespace lld::elf; 40 41 std::string elf::toStr(Ctx &ctx, RelType type) { 42 StringRef s = getELFRelocationTypeName(ctx.arg.emachine, type); 43 if (s == "Unknown") 44 return ("Unknown (" + Twine(type) + ")").str(); 45 return std::string(s); 46 } 47 48 const ELFSyncStream &elf::operator<<(const ELFSyncStream &s, RelType type) { 49 s << toStr(s.ctx, type); 50 return s; 51 } 52 53 void elf::setTarget(Ctx &ctx) { 54 switch (ctx.arg.emachine) { 55 case EM_386: 56 case EM_IAMCU: 57 return setX86TargetInfo(ctx); 58 case EM_AARCH64: 59 return setAArch64TargetInfo(ctx); 60 case EM_AMDGPU: 61 return setAMDGPUTargetInfo(ctx); 62 case EM_ARM: 63 return setARMTargetInfo(ctx); 64 case EM_AVR: 65 return setAVRTargetInfo(ctx); 66 case EM_HEXAGON: 67 return setHexagonTargetInfo(ctx); 68 case EM_LOONGARCH: 69 return setLoongArchTargetInfo(ctx); 70 case EM_MIPS: 71 return setMipsTargetInfo(ctx); 72 case EM_MSP430: 73 return setMSP430TargetInfo(ctx); 74 case EM_PPC: 75 return setPPCTargetInfo(ctx); 76 case EM_PPC64: 77 return setPPC64TargetInfo(ctx); 78 case EM_RISCV: 79 return setRISCVTargetInfo(ctx); 80 case EM_SPARCV9: 81 return setSPARCV9TargetInfo(ctx); 82 case EM_S390: 83 return setSystemZTargetInfo(ctx); 84 case EM_X86_64: 85 return setX86_64TargetInfo(ctx); 86 default: 87 Fatal(ctx) << "unsupported e_machine value: " << ctx.arg.emachine; 88 } 89 } 90 91 ErrorPlace elf::getErrorPlace(Ctx &ctx, const uint8_t *loc) { 92 assert(loc != nullptr); 93 for (InputSectionBase *d : ctx.inputSections) { 94 auto *isec = dyn_cast<InputSection>(d); 95 if (!isec || !isec->getParent() || (isec->type & SHT_NOBITS)) 96 continue; 97 98 const uint8_t *isecLoc = 99 ctx.bufferStart 100 ? (ctx.bufferStart + isec->getParent()->offset + isec->outSecOff) 101 : isec->contentMaybeDecompress().data(); 102 if (isecLoc == nullptr) { 103 assert(isa<SyntheticSection>(isec) && "No data but not synthetic?"); 104 continue; 105 } 106 if (isecLoc <= loc && loc < isecLoc + isec->getSize()) { 107 std::string objLoc = isec->getLocation(loc - isecLoc); 108 // Return object file location and source file location. 109 Undefined dummy(ctx.internalFile, "", STB_LOCAL, 0, 0); 110 ELFSyncStream msg(ctx, DiagLevel::None); 111 if (isec->file) 112 msg << isec->getSrcMsg(dummy, loc - isecLoc); 113 return {isec, objLoc + ": ", std::string(msg.str())}; 114 } 115 } 116 return {}; 117 } 118 119 TargetInfo::~TargetInfo() {} 120 121 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const { 122 InternalErr(ctx, buf) << "cannot read addend for relocation " << type; 123 return 0; 124 } 125 126 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; } 127 128 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file, 129 uint64_t branchAddr, const Symbol &s, 130 int64_t a) const { 131 return false; 132 } 133 134 bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 135 uint8_t stOther) const { 136 Err(ctx) << "target doesn't support split stacks"; 137 return false; 138 } 139 140 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { 141 return true; 142 } 143 144 RelExpr TargetInfo::adjustTlsExpr(RelType type, RelExpr expr) const { 145 return expr; 146 } 147 148 RelExpr TargetInfo::adjustGotPcExpr(RelType type, int64_t addend, 149 const uint8_t *data) const { 150 return R_GOT_PC; 151 } 152 153 void TargetInfo::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const { 154 const unsigned bits = ctx.arg.is64 ? 64 : 32; 155 uint64_t secAddr = sec.getOutputSection()->addr; 156 if (auto *s = dyn_cast<InputSection>(&sec)) 157 secAddr += s->outSecOff; 158 else if (auto *ehIn = dyn_cast<EhInputSection>(&sec)) 159 secAddr += ehIn->getParent()->outSecOff; 160 for (const Relocation &rel : sec.relocs()) { 161 uint8_t *loc = buf + rel.offset; 162 const uint64_t val = SignExtend64( 163 sec.getRelocTargetVA(ctx, rel, secAddr + rel.offset), bits); 164 if (rel.expr != R_RELAX_HINT) 165 relocate(loc, rel, val); 166 } 167 } 168 169 uint64_t TargetInfo::getImageBase() const { 170 // Use --image-base if set. Fall back to the target default if not. 171 if (ctx.arg.imageBase) 172 return *ctx.arg.imageBase; 173 return ctx.arg.isPic ? 0 : defaultImageBase; 174 } 175