1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 return a[0][0]; 39 } 40 }; 41 42 int teams_template_struct(void) { 43 SS<int, 123, 456> V; 44 return V.foo(); 45 46 } 47 #endif // CK1 48 49 // Test host codegen. 50 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 51 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 52 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 53 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 54 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 56 57 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 58 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 59 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 60 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 63 #ifdef CK2 64 65 template <typename T, int n, int m> 66 int tmain(T argc) { 67 T a[n][m]; 68 #pragma omp target 69 #pragma omp teams distribute collapse(2) 70 for(int i = 0; i < n; i++) { 71 for(int j = 0; j < m; j++) { 72 a[i][j] = (T)0; 73 } 74 } 75 return 0; 76 } 77 78 int main (int argc, char **argv) { 79 int n = 100; 80 int m = 2; 81 int a[n][m]; 82 #pragma omp target 83 #pragma omp teams distribute collapse(2) 84 for(int i = 0; i < n; i++) { 85 for(int j = 0; j < m; j++) { 86 a[i][j] = 0; 87 } 88 } 89 return tmain<int, 10, 2>(argc); 90 } 91 92 93 94 95 96 // discard loop variables not needed here 97 98 #endif // CK2 99 #endif // #ifndef HEADER 100 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 101 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 102 // CHECK1-NEXT: entry: 103 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 104 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]]) 105 // CHECK1-NEXT: ret i32 [[CALL]] 106 // 107 // 108 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 109 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat { 110 // CHECK1-NEXT: entry: 111 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 112 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 113 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 114 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 115 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 116 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 117 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 118 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 119 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 120 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 121 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 122 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8 123 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 124 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 125 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 126 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8 127 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 128 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 129 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 130 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4 131 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 132 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4 133 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 134 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 135 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 136 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 137 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 138 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8 139 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 140 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8 141 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 142 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8 143 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 144 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8 145 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 146 // CHECK1-NEXT: store i64 56088, ptr [[TMP13]], align 8 147 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 148 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8 149 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 150 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 151 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 152 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 153 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 154 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4 155 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 156 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 157 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 158 // CHECK1: omp_offload.failed: 159 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 160 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 161 // CHECK1: omp_offload.cont: 162 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 163 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0 164 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0 165 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4 166 // CHECK1-NEXT: ret i32 [[TMP20]] 167 // 168 // 169 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 170 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 171 // CHECK1-NEXT: entry: 172 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 173 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 174 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 175 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 176 // CHECK1-NEXT: ret void 177 // 178 // 179 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 180 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 181 // CHECK1-NEXT: entry: 182 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 183 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 184 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 185 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 186 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 187 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 188 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 192 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 193 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 194 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 195 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 196 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 197 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 198 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 199 // CHECK1-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4 200 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 201 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 202 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 203 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 204 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 205 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 206 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 207 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 208 // CHECK1: cond.true: 209 // CHECK1-NEXT: br label [[COND_END:%.*]] 210 // CHECK1: cond.false: 211 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 212 // CHECK1-NEXT: br label [[COND_END]] 213 // CHECK1: cond.end: 214 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 215 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 216 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 217 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 218 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 219 // CHECK1: omp.inner.for.cond: 220 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 221 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 222 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 223 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 224 // CHECK1: omp.inner.for.body: 225 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 226 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456 227 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 228 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 229 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4 230 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 231 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 232 // CHECK1-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456 233 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 234 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 235 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 236 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 237 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 238 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 239 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 240 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 241 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]] 242 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4 243 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 244 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]] 245 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX8]], align 4 246 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 247 // CHECK1: omp.body.continue: 248 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 249 // CHECK1: omp.inner.for.inc: 250 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 251 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1 252 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 253 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 254 // CHECK1: omp.inner.for.end: 255 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 256 // CHECK1: omp.loop.exit: 257 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 258 // CHECK1-NEXT: ret void 259 // 260 // 261 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 262 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 263 // CHECK3-NEXT: entry: 264 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 265 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]]) 266 // CHECK3-NEXT: ret i32 [[CALL]] 267 // 268 // 269 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 270 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 271 // CHECK3-NEXT: entry: 272 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 273 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 274 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 275 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 276 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 277 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 278 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 279 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 280 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 281 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0 282 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 283 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4 284 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 285 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 286 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 287 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4 288 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 289 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 290 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 291 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4 292 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 293 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4 294 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 295 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 296 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 297 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 298 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 299 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4 300 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 301 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4 302 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 303 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4 304 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 305 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4 306 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 307 // CHECK3-NEXT: store i64 56088, ptr [[TMP13]], align 8 308 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 309 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8 310 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 311 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 312 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 313 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 314 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 315 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4 316 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]]) 317 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 318 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 319 // CHECK3: omp_offload.failed: 320 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]] 321 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 322 // CHECK3: omp_offload.cont: 323 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0 324 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0 325 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0 326 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4 327 // CHECK3-NEXT: ret i32 [[TMP20]] 328 // 329 // 330 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 331 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 332 // CHECK3-NEXT: entry: 333 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 334 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 335 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 336 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]]) 337 // CHECK3-NEXT: ret void 338 // 339 // 340 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined 341 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] { 342 // CHECK3-NEXT: entry: 343 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 344 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 345 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 346 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 347 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 348 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 349 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 350 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 351 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 352 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 353 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 354 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 355 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 356 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 357 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 358 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 359 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 360 // CHECK3-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4 361 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 362 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 363 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 364 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 365 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 366 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 367 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 368 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 369 // CHECK3: cond.true: 370 // CHECK3-NEXT: br label [[COND_END:%.*]] 371 // CHECK3: cond.false: 372 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 373 // CHECK3-NEXT: br label [[COND_END]] 374 // CHECK3: cond.end: 375 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 376 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 377 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 378 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 379 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 380 // CHECK3: omp.inner.for.cond: 381 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 382 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 383 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 384 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 385 // CHECK3: omp.inner.for.body: 386 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 387 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456 388 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 389 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 390 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4 391 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 392 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 393 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456 394 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 395 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 396 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 397 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 398 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 399 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0 400 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 401 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP11]] 402 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4 403 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]] 404 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4 405 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 406 // CHECK3: omp.body.continue: 407 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 408 // CHECK3: omp.inner.for.inc: 409 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 410 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 411 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 412 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 413 // CHECK3: omp.inner.for.end: 414 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 415 // CHECK3: omp.loop.exit: 416 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 417 // CHECK3-NEXT: ret void 418 // 419 // 420 // CHECK9-LABEL: define {{[^@]+}}@main 421 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 422 // CHECK9-NEXT: entry: 423 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 424 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 425 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 426 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 427 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 428 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8 429 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 430 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 431 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 432 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 433 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8 434 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8 435 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8 436 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 437 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 438 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 439 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 440 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 441 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 442 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 443 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4 444 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 445 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 446 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4 447 // CHECK9-NEXT: store i32 2, ptr [[M]], align 4 448 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 449 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 450 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[M]], align 4 451 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 452 // CHECK9-NEXT: [[TMP4:%.*]] = call ptr @llvm.stacksave.p0() 453 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8 454 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 455 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 456 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8 457 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8 458 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[N]], align 4 459 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[N_CASTED]], align 4 460 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8 461 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[M]], align 4 462 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[M_CASTED]], align 4 463 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8 464 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 465 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 466 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false) 467 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 468 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP12]], align 8 469 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 470 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 8 471 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 472 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8 473 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 474 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP15]], align 8 475 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 476 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP16]], align 8 477 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 478 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8 479 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 480 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP18]], align 8 481 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 482 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP19]], align 8 483 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 484 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8 485 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 486 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP21]], align 8 487 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 488 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP22]], align 8 489 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 490 // CHECK9-NEXT: store ptr null, ptr [[TMP23]], align 8 491 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 492 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 8 493 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 494 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP25]], align 8 495 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4 496 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[TMP26]], align 8 497 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 498 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8 499 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 500 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 501 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 502 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[N]], align 4 503 // CHECK9-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4 504 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[M]], align 4 505 // CHECK9-NEXT: store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4 506 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 507 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0 508 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 509 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 510 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 511 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0 512 // CHECK9-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 513 // CHECK9-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 514 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 515 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 516 // CHECK9-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8 517 // CHECK9-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8 518 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP35]], 1 519 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 520 // CHECK9-NEXT: store i32 3, ptr [[TMP36]], align 4 521 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 522 // CHECK9-NEXT: store i32 5, ptr [[TMP37]], align 4 523 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 524 // CHECK9-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 8 525 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 526 // CHECK9-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 8 527 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 528 // CHECK9-NEXT: store ptr [[TMP30]], ptr [[TMP40]], align 8 529 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 530 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP41]], align 8 531 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 532 // CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 8 533 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 534 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8 535 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 536 // CHECK9-NEXT: store i64 [[ADD]], ptr [[TMP44]], align 8 537 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 538 // CHECK9-NEXT: store i64 0, ptr [[TMP45]], align 8 539 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 540 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4 541 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 542 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4 543 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 544 // CHECK9-NEXT: store i32 0, ptr [[TMP48]], align 4 545 // CHECK9-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, ptr [[KERNEL_ARGS]]) 546 // CHECK9-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0 547 // CHECK9-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 548 // CHECK9: omp_offload.failed: 549 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 550 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 551 // CHECK9: omp_offload.cont: 552 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 553 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]]) 554 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 555 // CHECK9-NEXT: [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8 556 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP52]]) 557 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4 558 // CHECK9-NEXT: ret i32 [[TMP53]] 559 // 560 // 561 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82 562 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 563 // CHECK9-NEXT: entry: 564 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 565 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 566 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 567 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 568 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 569 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8 570 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8 571 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 572 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 573 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 574 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 575 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 576 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8 577 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]]) 578 // CHECK9-NEXT: ret void 579 // 580 // 581 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined 582 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 583 // CHECK9-NEXT: entry: 584 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 585 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 586 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 8 587 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 8 588 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 589 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 590 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 591 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 592 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 593 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 594 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 595 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 596 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 597 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 598 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 599 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 600 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 601 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 602 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 603 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 604 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 605 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 606 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 607 // CHECK9-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 8 608 // CHECK9-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 8 609 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8 610 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8 611 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 612 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8 613 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8 614 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8 615 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8 616 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8 617 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 618 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 619 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 620 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 621 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 622 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 623 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 624 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 625 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 626 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 627 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 628 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 629 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 630 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 631 // CHECK9-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 632 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4 633 // CHECK9-NEXT: store i32 0, ptr [[J]], align 4 634 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 635 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 636 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 637 // CHECK9: land.lhs.true: 638 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 639 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 640 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 641 // CHECK9: omp.precond.then: 642 // CHECK9-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 643 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 644 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8 645 // CHECK9-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 646 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 647 // CHECK9-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 648 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 649 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 650 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 651 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 652 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 653 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 654 // CHECK9: cond.true: 655 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 656 // CHECK9-NEXT: br label [[COND_END:%.*]] 657 // CHECK9: cond.false: 658 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 659 // CHECK9-NEXT: br label [[COND_END]] 660 // CHECK9: cond.end: 661 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 662 // CHECK9-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 663 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 664 // CHECK9-NEXT: store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8 665 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 666 // CHECK9: omp.inner.for.cond: 667 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 668 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 669 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 670 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 671 // CHECK9: omp.inner.for.body: 672 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 673 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 674 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0 675 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 676 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 677 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 678 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]] 679 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 680 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 681 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 682 // CHECK9-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4 683 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 684 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 685 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 686 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0 687 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 688 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 689 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 690 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]] 691 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 692 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0 693 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 694 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 695 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 696 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 697 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]] 698 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 699 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 700 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 701 // CHECK9-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4 702 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[I11]], align 4 703 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64 704 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 705 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP28]] 706 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[J12]], align 4 707 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64 708 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]] 709 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX37]], align 4 710 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 711 // CHECK9: omp.body.continue: 712 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 713 // CHECK9: omp.inner.for.inc: 714 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 715 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1 716 // CHECK9-NEXT: store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8 717 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 718 // CHECK9: omp.inner.for.end: 719 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 720 // CHECK9: omp.loop.exit: 721 // CHECK9-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 722 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 723 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]]) 724 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 725 // CHECK9: omp.precond.end: 726 // CHECK9-NEXT: ret void 727 // 728 // 729 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 730 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 731 // CHECK9-NEXT: entry: 732 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 733 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 734 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8 735 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8 736 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8 737 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 738 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 739 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 740 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 741 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 742 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8 743 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 744 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8 745 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 746 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8 747 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 748 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 749 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 750 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4 751 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 752 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4 753 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 754 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8 755 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 756 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8 757 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 758 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 8 759 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 760 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8 761 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 762 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8 763 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 764 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8 765 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 766 // CHECK9-NEXT: store i64 20, ptr [[TMP13]], align 8 767 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 768 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8 769 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 770 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 771 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 772 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 773 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 774 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4 775 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]]) 776 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 777 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 778 // CHECK9: omp_offload.failed: 779 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR3]] 780 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 781 // CHECK9: omp_offload.cont: 782 // CHECK9-NEXT: ret i32 0 783 // 784 // 785 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68 786 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 787 // CHECK9-NEXT: entry: 788 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 789 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 790 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 791 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]]) 792 // CHECK9-NEXT: ret void 793 // 794 // 795 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined 796 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 797 // CHECK9-NEXT: entry: 798 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8 799 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8 800 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8 801 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 802 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 803 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 804 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 805 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 806 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 807 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 808 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 809 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 810 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8 811 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8 812 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8 813 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8 814 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 815 // CHECK9-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4 816 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 817 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 818 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8 819 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 820 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 821 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 822 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 823 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 824 // CHECK9: cond.true: 825 // CHECK9-NEXT: br label [[COND_END:%.*]] 826 // CHECK9: cond.false: 827 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 828 // CHECK9-NEXT: br label [[COND_END]] 829 // CHECK9: cond.end: 830 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 831 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 832 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 833 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 834 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 835 // CHECK9: omp.inner.for.cond: 836 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 837 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 838 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 839 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 840 // CHECK9: omp.inner.for.body: 841 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 842 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2 843 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 844 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 845 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4 846 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 847 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 848 // CHECK9-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2 849 // CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 850 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 851 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 852 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 853 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 854 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 855 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 856 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]] 857 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4 858 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 859 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]] 860 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX8]], align 4 861 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 862 // CHECK9: omp.body.continue: 863 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 864 // CHECK9: omp.inner.for.inc: 865 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 866 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1 867 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4 868 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 869 // CHECK9: omp.inner.for.end: 870 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 871 // CHECK9: omp.loop.exit: 872 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 873 // CHECK9-NEXT: ret void 874 // 875 // 876 // CHECK11-LABEL: define {{[^@]+}}@main 877 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 878 // CHECK11-NEXT: entry: 879 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 880 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 881 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4 882 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 883 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 884 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4 885 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 886 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 887 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 888 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 889 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4 890 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4 891 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4 892 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 893 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 894 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 895 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 896 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 897 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 898 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 899 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4 900 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 901 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4 902 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4 903 // CHECK11-NEXT: store i32 2, ptr [[M]], align 4 904 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4 905 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[M]], align 4 906 // CHECK11-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0() 907 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4 908 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 909 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 910 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4 911 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4 912 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 4 913 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4 914 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4 915 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[M]], align 4 916 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[M_CASTED]], align 4 917 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4 918 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 919 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 920 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 921 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false) 922 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 923 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP11]], align 4 924 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 925 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP12]], align 4 926 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 927 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4 928 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 929 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP14]], align 4 930 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1 931 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP15]], align 4 932 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 933 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4 934 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 935 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP17]], align 4 936 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2 937 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP18]], align 4 938 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 939 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4 940 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 941 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP20]], align 4 942 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3 943 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP21]], align 4 944 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 945 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4 946 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 947 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP23]], align 4 948 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4 949 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 4 950 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4 951 // CHECK11-NEXT: store i64 [[TMP10]], ptr [[TMP25]], align 4 952 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 953 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4 954 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 955 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 956 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0 957 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[N]], align 4 958 // CHECK11-NEXT: store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4 959 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[M]], align 4 960 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4 961 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 962 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0 963 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 964 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 965 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4 966 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0 967 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 968 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 969 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 970 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 971 // CHECK11-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8 972 // CHECK11-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8 973 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP34]], 1 974 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 975 // CHECK11-NEXT: store i32 3, ptr [[TMP35]], align 4 976 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 977 // CHECK11-NEXT: store i32 5, ptr [[TMP36]], align 4 978 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 979 // CHECK11-NEXT: store ptr [[TMP27]], ptr [[TMP37]], align 4 980 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 981 // CHECK11-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 4 982 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 983 // CHECK11-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 4 984 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 985 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP40]], align 4 986 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 987 // CHECK11-NEXT: store ptr null, ptr [[TMP41]], align 4 988 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 989 // CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 4 990 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 991 // CHECK11-NEXT: store i64 [[ADD]], ptr [[TMP43]], align 8 992 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 993 // CHECK11-NEXT: store i64 0, ptr [[TMP44]], align 8 994 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 995 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4 996 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 997 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4 998 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 999 // CHECK11-NEXT: store i32 0, ptr [[TMP47]], align 4 1000 // CHECK11-NEXT: [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, ptr [[KERNEL_ARGS]]) 1001 // CHECK11-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0 1002 // CHECK11-NEXT: br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1003 // CHECK11: omp_offload.failed: 1004 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]] 1005 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1006 // CHECK11: omp_offload.cont: 1007 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 1008 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]]) 1009 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4 1010 // CHECK11-NEXT: [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4 1011 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP51]]) 1012 // CHECK11-NEXT: [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 4 1013 // CHECK11-NEXT: ret i32 [[TMP52]] 1014 // 1015 // 1016 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82 1017 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1018 // CHECK11-NEXT: entry: 1019 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1020 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 1021 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1022 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1023 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1024 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4 1025 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4 1026 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1027 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1028 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1029 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1030 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1031 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1032 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]]) 1033 // CHECK11-NEXT: ret void 1034 // 1035 // 1036 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined 1037 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1038 // CHECK11-NEXT: entry: 1039 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1040 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1041 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca ptr, align 4 1042 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca ptr, align 4 1043 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1044 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 1045 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1046 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 1047 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1048 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1049 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1050 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1051 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 1052 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1053 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1054 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 1055 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 1056 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 1057 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1058 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 1059 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 1060 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1061 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1062 // CHECK11-NEXT: store ptr [[N]], ptr [[N_ADDR]], align 4 1063 // CHECK11-NEXT: store ptr [[M]], ptr [[M_ADDR]], align 4 1064 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4 1065 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4 1066 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1067 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4 1068 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4 1069 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4 1070 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4 1071 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1072 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4 1073 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4 1074 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4 1075 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4 1076 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1077 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1078 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1079 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1080 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1081 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1082 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1083 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1084 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1085 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1086 // CHECK11-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8 1087 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4 1088 // CHECK11-NEXT: store i32 0, ptr [[J]], align 4 1089 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4 1090 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1091 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1092 // CHECK11: land.lhs.true: 1093 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1094 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1095 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1096 // CHECK11: omp.precond.then: 1097 // CHECK11-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8 1098 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1099 // CHECK11-NEXT: store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8 1100 // CHECK11-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8 1101 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1102 // CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1103 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 1104 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1) 1105 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1106 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1107 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1108 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1109 // CHECK11: cond.true: 1110 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8 1111 // CHECK11-NEXT: br label [[COND_END:%.*]] 1112 // CHECK11: cond.false: 1113 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1114 // CHECK11-NEXT: br label [[COND_END]] 1115 // CHECK11: cond.end: 1116 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1117 // CHECK11-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8 1118 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8 1119 // CHECK11-NEXT: store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8 1120 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1121 // CHECK11: omp.inner.for.cond: 1122 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1123 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8 1124 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1125 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1126 // CHECK11: omp.inner.for.body: 1127 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1128 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1129 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0 1130 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1131 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 1132 // CHECK11-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 1133 // CHECK11-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]] 1134 // CHECK11-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 1135 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 1136 // CHECK11-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 1137 // CHECK11-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4 1138 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1139 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1140 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1141 // CHECK11-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0 1142 // CHECK11-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 1143 // CHECK11-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 1144 // CHECK11-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 1145 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]] 1146 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4 1147 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0 1148 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1149 // CHECK11-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 1150 // CHECK11-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 1151 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 1152 // CHECK11-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]] 1153 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 1154 // CHECK11-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 1155 // CHECK11-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 1156 // CHECK11-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4 1157 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[I11]], align 4 1158 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP3]] 1159 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 [[TMP28]] 1160 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[J12]], align 4 1161 // CHECK11-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP29]] 1162 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX36]], align 4 1163 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1164 // CHECK11: omp.body.continue: 1165 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1166 // CHECK11: omp.inner.for.inc: 1167 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8 1168 // CHECK11-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP30]], 1 1169 // CHECK11-NEXT: store i64 [[ADD37]], ptr [[DOTOMP_IV]], align 8 1170 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1171 // CHECK11: omp.inner.for.end: 1172 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1173 // CHECK11: omp.loop.exit: 1174 // CHECK11-NEXT: [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1175 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 1176 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]]) 1177 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1178 // CHECK11: omp.precond.end: 1179 // CHECK11-NEXT: ret void 1180 // 1181 // 1182 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1183 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1184 // CHECK11-NEXT: entry: 1185 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1186 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1187 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4 1188 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4 1189 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4 1190 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1191 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1192 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8 1193 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 1194 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1195 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4 1196 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1197 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4 1198 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1199 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4 1200 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1201 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1202 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0 1203 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4 1204 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1 1205 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4 1206 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2 1207 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4 1208 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3 1209 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4 1210 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4 1211 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 4 1212 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5 1213 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4 1214 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6 1215 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4 1216 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7 1217 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4 1218 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8 1219 // CHECK11-NEXT: store i64 20, ptr [[TMP13]], align 8 1220 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9 1221 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8 1222 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10 1223 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4 1224 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11 1225 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4 1226 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12 1227 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4 1228 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]]) 1229 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 1230 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1231 // CHECK11: omp_offload.failed: 1232 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR3]] 1233 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1234 // CHECK11: omp_offload.cont: 1235 // CHECK11-NEXT: ret i32 0 1236 // 1237 // 1238 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68 1239 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1240 // CHECK11-NEXT: entry: 1241 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1242 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1243 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1244 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]]) 1245 // CHECK11-NEXT: ret void 1246 // 1247 // 1248 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined 1249 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1250 // CHECK11-NEXT: entry: 1251 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4 1252 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4 1253 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 1254 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1255 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1256 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1257 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1258 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1259 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1260 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1261 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1262 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1263 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4 1264 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4 1265 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 1266 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4 1267 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4 1268 // CHECK11-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4 1269 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4 1270 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4 1271 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4 1272 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 1273 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1) 1274 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1275 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1276 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1277 // CHECK11: cond.true: 1278 // CHECK11-NEXT: br label [[COND_END:%.*]] 1279 // CHECK11: cond.false: 1280 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1281 // CHECK11-NEXT: br label [[COND_END]] 1282 // CHECK11: cond.end: 1283 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1284 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4 1285 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4 1286 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4 1287 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1288 // CHECK11: omp.inner.for.cond: 1289 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1290 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4 1291 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1292 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1293 // CHECK11: omp.inner.for.body: 1294 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1295 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2 1296 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1297 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1298 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4 1299 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1300 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1301 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2 1302 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1303 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 1304 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1305 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1306 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[J]], align 4 1307 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4 1308 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP11]] 1309 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4 1310 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]] 1311 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4 1312 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1313 // CHECK11: omp.body.continue: 1314 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1315 // CHECK11: omp.inner.for.inc: 1316 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4 1317 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 1318 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4 1319 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1320 // CHECK11: omp.inner.for.end: 1321 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1322 // CHECK11: omp.loop.exit: 1323 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]]) 1324 // CHECK11-NEXT: ret void 1325 // 1326