xref: /llvm-project/clang/test/Driver/print-enabled-extensions/riscv-rocket-rv64.c (revision d280a9c5e22662fd24708245add50b152ab10fc8) 
13f0d3fd3SAlex Bradbury // REQUIRES: riscv-registered-target
23f0d3fd3SAlex Bradbury // RUN: %clang --target=riscv64 --print-enabled-extensions -mcpu=rocket-rv64 | FileCheck --strict-whitespace %s
33f0d3fd3SAlex Bradbury 
43f0d3fd3SAlex Bradbury // Simple litmus test to check the frontend handling of this option is
53f0d3fd3SAlex Bradbury // enabled.
63f0d3fd3SAlex Bradbury 
73f0d3fd3SAlex Bradbury // CHECK: Extensions enabled for the given RISC-V target
83f0d3fd3SAlex Bradbury // CHECK-EMPTY:
93f0d3fd3SAlex Bradbury // CHECK-NEXT: Name                 Version   Description
103f0d3fd3SAlex Bradbury // CHECK-NEXT:     i                    2.1       'I' (Base Integer Instruction Set)
11*d280a9c5SShao-Ce SUN // CHECK-NEXT:     zicsr                2.0       'Zicsr' (CSRs)
123f0d3fd3SAlex Bradbury // CHECK-NEXT:     zifencei             2.0       'Zifencei' (fence.i)
133f0d3fd3SAlex Bradbury // CHECK-EMPTY:
14