xref: /llvm-project/clang/test/CodeGenOpenCLCXX/addrspace-operators.clcpp (revision 94473f4db6a6f5f12d7c4081455b5b596094eac5) 
1//RUN: %clang_cc1 %s -triple spir -emit-llvm -O0 -o - | FileCheck %s
2
3enum E {
4  a,
5  b,
6};
7
8class C {
9public:
10  void Assign(E e) { me = e; }
11  void OrAssign(E e) { mi |= e; }
12  E me;
13  int mi;
14};
15
16__global E globE;
17volatile __global int globVI;
18__global int globI;
19//CHECK-LABEL: define{{.*}} spir_func void @_Z3barv()
20void bar() {
21  C c;
22  //CHECK: [[A1:%[.a-z0-9]+]] ={{.*}} addrspacecast ptr [[C:%[a-z0-9]+]] to ptr addrspace(4)
23  //CHECK: call spir_func void @_ZNU3AS41C6AssignE1E(ptr addrspace(4) {{[^,]*}} [[A1]], i32 noundef 0)
24  c.Assign(a);
25  //CHECK: [[A2:%[.a-z0-9]+]] ={{.*}} addrspacecast ptr [[C]] to ptr addrspace(4)
26  //CHECK: call spir_func void @_ZNU3AS41C8OrAssignE1E(ptr addrspace(4) {{[^,]*}} [[A2]], i32 noundef 0)
27  c.OrAssign(a);
28
29  E e;
30  //CHECK: store i32 1, ptr %e
31  e = b;
32  //CHECK: store i32 0, ptr addrspace(1) @globE
33  globE = a;
34  //CHECK: store i32 %or, ptr addrspace(1) @globI
35  globI |= b;
36  //CHECK: store i32 %add, ptr addrspace(1) @globI
37  globI += a;
38  //CHECK: [[GVIV1:%[0-9]+]] = load volatile i32, ptr addrspace(1) @globVI
39  //CHECK: [[AND:%[a-z0-9]+]] = and i32 [[GVIV1]], 1
40  //CHECK: store volatile i32 [[AND]], ptr addrspace(1) @globVI
41  globVI &= b;
42  //CHECK: [[GVIV2:%[0-9]+]] = load volatile i32, ptr addrspace(1) @globVI
43  //CHECK: [[SUB:%[a-z0-9]+]] = sub nsw i32 [[GVIV2]], 0
44  //CHECK: store volatile i32 [[SUB]], ptr addrspace(1) @globVI
45  globVI -= a;
46}
47
48//CHECK: define linkonce_odr spir_func void @_ZNU3AS41C6AssignE1E(ptr addrspace(4) {{[^,]*}} {{[ %a-z0-9]*}}, i32{{[ %a-z0-9]*}})
49//CHECK: [[THIS_ADDR:%[.a-z0-9]+]] = alloca ptr addrspace(4)
50//CHECK: [[E_ADDR:%[.a-z0-9]+]] = alloca i32
51//CHECK: store ptr addrspace(4) {{%[a-z0-9]+}}, ptr [[THIS_ADDR]]
52//CHECK: store i32 {{%[a-z0-9]+}}, ptr [[E_ADDR]]
53//CHECK: [[THIS1:%[.a-z0-9]+]] = load ptr addrspace(4), ptr [[THIS_ADDR]]
54//CHECK: [[E:%[0-9]+]] = load i32, ptr [[E_ADDR]]
55//CHECK: [[ME:%[a-z0-9]+]] = getelementptr inbounds nuw %class.C, ptr addrspace(4) [[THIS1]], i32 0, i32 0
56//CHECK: store i32 [[E]], ptr addrspace(4) [[ME]]
57
58//CHECK: define linkonce_odr spir_func void @_ZNU3AS41C8OrAssignE1E(ptr addrspace(4) {{[^,]*}} {{[ %a-z0-9]*}}, i32{{[ %a-z0-9]*}})
59//CHECK: [[THIS_ADDR:%[.a-z0-9]+]] = alloca ptr addrspace(4)
60//CHECK: [[E_ADDR:%[.a-z0-9]+]] = alloca i32
61//CHECK: store ptr addrspace(4) {{%[a-z0-9]+}}, ptr [[THIS_ADDR]]
62//CHECK: store i32 {{%[a-z0-9]+}}, ptr [[E_ADDR]]
63//CHECK: [[THIS1:%[.a-z0-9]+]] = load ptr addrspace(4), ptr [[THIS_ADDR]]
64//CHECK: [[E:%[0-9]+]] = load i32, ptr [[E_ADDR]]
65//CHECK: [[MI_GEP:%[a-z0-9]+]] = getelementptr inbounds nuw %class.C, ptr addrspace(4) [[THIS1]], i32 0, i32 1
66//CHECK: [[MI:%[0-9]+]] = load i32, ptr addrspace(4) [[MI_GEP]]
67//CHECK: %or = or i32 [[MI]], [[E]]
68