xref: /llvm-project/clang/test/CodeGenHLSL/builtins/StructuredBuffers-methods-lib.hlsl (revision 762f1b17b2815ccdfb4e5cb5412cb6210db92f73) 
1// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
2// RUN-DISABLED: %clang_cc1 -triple spirv-vulkan-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
3
4// NOTE: SPIRV codegen for resource methods is not yet implemented
5
6StructuredBuffer<float> SB1 : register(t0);
7RWStructuredBuffer<float> RWSB1 : register(u0);
8RWStructuredBuffer<float> RWSB2 : register(u1);
9AppendStructuredBuffer<float> ASB : register(u2);
10ConsumeStructuredBuffer<float> CSB : register(u3);
11
12// CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", float, 0, 0) }
13// CHECK: %"class.hlsl::RWStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0) }
14// CHECK: %"class.hlsl::AppendStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0) }
15// CHECK: %"class.hlsl::ConsumeStructuredBuffer" = type { target("dx.RawBuffer", float, 1, 0) }
16
17export int TestIncrementCounter() {
18    return RWSB1.IncrementCounter();
19}
20
21// CHECK: define noundef i32 @_Z20TestIncrementCounterv()
22// CHECK-DXIL: %[[INDEX:.*]] = call i32 @llvm.dx.resource.updatecounter.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %{{[0-9]+}}, i8 1)
23// CHECK-DXIL: ret i32 %[[INDEX]]
24export int TestDecrementCounter() {
25    return RWSB2.DecrementCounter();
26}
27
28// CHECK: define noundef i32 @_Z20TestDecrementCounterv()
29// CHECK-DXIL: %[[INDEX:.*]] = call i32 @llvm.dx.resource.updatecounter.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %{{[0-9]+}}, i8 -1)
30// CHECK-DXIL: ret i32 %[[INDEX]]
31
32export void TestAppend(float value) {
33    ASB.Append(value);
34}
35
36// CHECK: define void @_Z10TestAppendf(float noundef nofpclass(nan inf) %value)
37// CHECK-DXIL: %[[VALUE:.*]] = load float, ptr %value.addr, align 4
38// CHECK-DXIL: %[[INDEX:.*]] = call i32 @llvm.dx.resource.updatecounter.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %{{[0-9]+}}, i8 1)
39// CHECK-DXIL: %[[RESPTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %{{[0-9]+}}, i32 %[[INDEX]])
40// CHECK-DXIL: store float %[[VALUE]], ptr %[[RESPTR]], align 4
41
42export float TestConsume() {
43    return CSB.Consume();
44}
45
46// CHECK: define noundef nofpclass(nan inf) float @_Z11TestConsumev()
47// CHECK-DXIL: %[[INDEX:.*]] = call i32 @llvm.dx.resource.updatecounter.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %1, i8 -1)
48// CHECK-DXIL: %[[RESPTR:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %0, i32 %[[INDEX]])
49// CHECK-DXIL: %[[VALUE:.*]] = load float, ptr %[[RESPTR]], align 4
50// CHECK-DXIL: ret float %[[VALUE]]
51
52export float TestLoad() {
53    return RWSB1.Load(1) + SB1.Load(2);
54}
55
56// CHECK: define noundef nofpclass(nan inf) float @_Z8TestLoadv()
57// CHECK: %[[PTR1:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0) %{{[0-9]+}}, i32 %{{[0-9]+}})
58// CHECK: %[[VALUE1:.*]] = load float, ptr %[[PTR1]]
59// CHECK: %[[PTR2:.*]] = call ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_0_0t(target("dx.RawBuffer", float, 0, 0) %{{[0-9]+}}, i32 %{{[0-9]+}})
60// CHECK: %[[VALUE2:.*]] = load float, ptr %[[PTR2]]
61
62// CHECK: declare i32 @llvm.dx.resource.updatecounter.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0), i8)
63// CHECK: declare ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_1_0t(target("dx.RawBuffer", float, 1, 0), i32)
64// CHECK: declare ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_f32_0_0t(target("dx.RawBuffer", float, 0, 0), i32)
65