xref: /llvm-project/clang/test/CodeGenCXX/finegrain-bitfield-type.cpp (revision 3dcfd482cb17fad2d641c976b822d1fe36dc1359)
1 // RUN: %clang_cc1 -triple x86_64-linux-gnu -ffine-grained-bitfield-accesses \
2 // RUN:   -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple riscv64-linux-gnu -ffine-grained-bitfield-accesses \
4 // RUN:   -emit-llvm -o - %s | FileCheck %s
5 
6 // Note: This test checks the X86-64 and RISC-V targets in order to explore
7 // behaviour when i8/i16 are native integer widths (X86-64) and when they're
8 // not (RISC-V).
9 
10 struct S4 {
11   unsigned long f1:28;
12   unsigned long f2:4;
13   unsigned long f3:12;
14 };
15 struct S4 a4;
16 
17 struct S5 {
18   unsigned long f1:28;
19   unsigned long f2:4;
20   unsigned long f3:28;
21   unsigned long f4:4;
22   unsigned long f5:12;
23 };
24 struct S5 a5;
25 
26 // CHECK: %struct.S4 = type { i32, i16 }
27 // CHECK-NOT: %struct.S4 = type { i48 }
28 // CHECK: %struct.S5 = type { i32, i32, i16, [6 x i8] }
29 // CHECK-NOT: %struct.S5 = type { i80 }
30