1 // RUN: %clang_cc1 %s -emit-llvm -o - -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 | FileCheck %s
2 // REQUIRES: x86-registered-target
3
4 // Also test serialization of atomic operations here, to avoid duplicating the
5 // test.
6 // RUN: %clang_cc1 %s -emit-pch -o %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9
7 // RUN: %clang_cc1 %s -include-pch %t -ffreestanding -ffake-address-space-map -triple=i686-apple-darwin9 -emit-llvm -o - | FileCheck %s
8 #ifndef ALREADY_INCLUDED
9 #define ALREADY_INCLUDED
10
11 #include <stdatomic.h>
12
13 // Basic IRGen tests for __c11_atomic_* and GNU __atomic_*
14
fi1(_Atomic (int)* i)15 int fi1(_Atomic(int) *i) {
16 // CHECK-LABEL: @fi1
17 // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4
18 return __c11_atomic_load(i, memory_order_seq_cst);
19 }
20
fi1a(int * i)21 int fi1a(int *i) {
22 // CHECK-LABEL: @fi1a
23 // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4
24 int v;
25 __atomic_load(i, &v, memory_order_seq_cst);
26 return v;
27 }
28
fi1b(int * i)29 int fi1b(int *i) {
30 // CHECK-LABEL: @fi1b
31 // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4
32 return __atomic_load_n(i, memory_order_seq_cst);
33 }
34
fi1c(atomic_int * i)35 int fi1c(atomic_int *i) {
36 // CHECK-LABEL: @fi1c
37 // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4
38 return atomic_load(i);
39 }
40
fi2(_Atomic (int)* i)41 void fi2(_Atomic(int) *i) {
42 // CHECK-LABEL: @fi2
43 // CHECK: store atomic i32 {{.*}} seq_cst, align 4
44 __c11_atomic_store(i, 1, memory_order_seq_cst);
45 }
46
fi2a(int * i)47 void fi2a(int *i) {
48 // CHECK-LABEL: @fi2a
49 // CHECK: store atomic i32 {{.*}} seq_cst, align 4
50 int v = 1;
51 __atomic_store(i, &v, memory_order_seq_cst);
52 }
53
fi2b(int * i)54 void fi2b(int *i) {
55 // CHECK-LABEL: @fi2b
56 // CHECK: store atomic i32 {{.*}} seq_cst, align 4
57 __atomic_store_n(i, 1, memory_order_seq_cst);
58 }
59
fi2c(atomic_int * i)60 void fi2c(atomic_int *i) {
61 // CHECK-LABEL: @fi2c
62 // CHECK: store atomic i32 {{.*}} seq_cst, align 4
63 atomic_store(i, 1);
64 }
65
fi3(_Atomic (int)* i)66 int fi3(_Atomic(int) *i) {
67 // CHECK-LABEL: @fi3
68 // CHECK: atomicrmw and {{.*}} seq_cst, align 4
69 // CHECK-NOT: and
70 return __c11_atomic_fetch_and(i, 1, memory_order_seq_cst);
71 }
72
fi3a(int * i)73 int fi3a(int *i) {
74 // CHECK-LABEL: @fi3a
75 // CHECK: atomicrmw xor {{.*}} seq_cst, align 4
76 // CHECK-NOT: xor
77 return __atomic_fetch_xor(i, 1, memory_order_seq_cst);
78 }
79
fi3b(int * i)80 int fi3b(int *i) {
81 // CHECK-LABEL: @fi3b
82 // CHECK: atomicrmw add {{.*}} seq_cst, align 4
83 // CHECK: add
84 return __atomic_add_fetch(i, 1, memory_order_seq_cst);
85 }
86
fi3c(int * i)87 int fi3c(int *i) {
88 // CHECK-LABEL: @fi3c
89 // CHECK: atomicrmw nand {{.*}} seq_cst, align 4
90 // CHECK-NOT: and
91 return __atomic_fetch_nand(i, 1, memory_order_seq_cst);
92 }
93
fi3d(int * i)94 int fi3d(int *i) {
95 // CHECK-LABEL: @fi3d
96 // CHECK: atomicrmw nand {{.*}} seq_cst, align 4
97 // CHECK: and
98 // CHECK: xor
99 return __atomic_nand_fetch(i, 1, memory_order_seq_cst);
100 }
101
fi3e(atomic_int * i)102 int fi3e(atomic_int *i) {
103 // CHECK-LABEL: @fi3e
104 // CHECK: atomicrmw or {{.*}} seq_cst, align 4
105 // CHECK-NOT: {{ or }}
106 return atomic_fetch_or(i, 1);
107 }
108
fi3f(int * i)109 int fi3f(int *i) {
110 // CHECK-LABEL: @fi3f
111 // CHECK-NOT: store volatile
112 // CHECK: atomicrmw or {{.*}} seq_cst, align 4
113 // CHECK-NOT: {{ or }}
114 return __atomic_fetch_or(i, (short)1, memory_order_seq_cst);
115 }
116
fi4(_Atomic (int)* i)117 _Bool fi4(_Atomic(int) *i) {
118 // CHECK-LABEL: @fi4(
119 // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg ptr [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] acquire acquire, align 4
120 // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
121 // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
122 // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
123 // CHECK: store i32 [[OLD]]
124 int cmp = 0;
125 return __c11_atomic_compare_exchange_strong(i, &cmp, 1, memory_order_acquire, memory_order_acquire);
126 }
127
fi4a(int * i)128 _Bool fi4a(int *i) {
129 // CHECK-LABEL: @fi4a
130 // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg ptr [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] acquire acquire, align 4
131 // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
132 // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
133 // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
134 // CHECK: store i32 [[OLD]]
135 int cmp = 0;
136 int desired = 1;
137 return __atomic_compare_exchange(i, &cmp, &desired, 0, memory_order_acquire, memory_order_acquire);
138 }
139
fi4b(int * i)140 _Bool fi4b(int *i) {
141 // CHECK-LABEL: @fi4b(
142 // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg weak ptr [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] acquire acquire, align 4
143 // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
144 // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
145 // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
146 // CHECK: store i32 [[OLD]]
147 int cmp = 0;
148 return __atomic_compare_exchange_n(i, &cmp, 1, 1, memory_order_acquire, memory_order_acquire);
149 }
150
fi4c(atomic_int * i)151 _Bool fi4c(atomic_int *i) {
152 // CHECK-LABEL: @fi4c
153 // CHECK: cmpxchg ptr {{.*}} seq_cst seq_cst, align 4
154 int cmp = 0;
155 return atomic_compare_exchange_strong(i, &cmp, 1);
156 }
157
158 #define _AS1 __attribute__((address_space(1)))
fi4d(_Atomic (int)* i,int _AS1 * ptr2)159 _Bool fi4d(_Atomic(int) *i, int _AS1 *ptr2) {
160 // CHECK-LABEL: @fi4d(
161 // CHECK: [[EXPECTED:%[.0-9A-Z_a-z]+]] = load i32, ptr addrspace(1) %{{[0-9]+}}
162 // CHECK: cmpxchg ptr %{{[0-9]+}}, i32 [[EXPECTED]], i32 %{{[0-9]+}} acquire acquire, align 4
163 return __c11_atomic_compare_exchange_strong(i, ptr2, 1, memory_order_acquire, memory_order_acquire);
164 }
165
ff1(_Atomic (float)* d)166 float ff1(_Atomic(float) *d) {
167 // CHECK-LABEL: @ff1
168 // CHECK: load atomic i32, ptr {{.*}} monotonic, align 4
169 return __c11_atomic_load(d, memory_order_relaxed);
170 }
171
ff2(_Atomic (float)* d)172 void ff2(_Atomic(float) *d) {
173 // CHECK-LABEL: @ff2
174 // CHECK: store atomic i32 {{.*}} release, align 4
175 __c11_atomic_store(d, 1, memory_order_release);
176 }
177
ff3(_Atomic (float)* d)178 float ff3(_Atomic(float) *d) {
179 return __c11_atomic_exchange(d, 2, memory_order_seq_cst);
180 }
181
182 struct S {
183 double x;
184 };
185
implicit_store(_Atomic (struct S)* a,struct S s)186 void implicit_store(_Atomic(struct S) *a, struct S s) {
187 // CHECK-LABEL: @implicit_store(
188 // CHECK: store atomic i64 %{{.*}}, ptr %{{.*}} seq_cst, align 8
189 *a = s;
190 }
191
implicit_load(_Atomic (struct S)* a)192 struct S implicit_load(_Atomic(struct S) *a) {
193 // CHECK-LABEL: @implicit_load(
194 // CHECK: load atomic i64, ptr %{{.*}} seq_cst, align 8
195 return *a;
196 }
197
fd1(struct S * a)198 struct S fd1(struct S *a) {
199 // CHECK-LABEL: @fd1
200 // CHECK: [[RETVAL:%.*]] = alloca %struct.S, align 4
201 // CHECK: [[TMP1:%.*]] = load atomic i64, ptr {{%.*}} seq_cst, align 4
202 // CHECK-NEXT: store i64 [[TMP1]], ptr [[RETVAL]], align 4
203 // CHECK: ret
204 struct S ret;
205 __atomic_load(a, &ret, memory_order_seq_cst);
206 return ret;
207 }
208
fd2(struct S * a,struct S * b)209 void fd2(struct S *a, struct S *b) {
210 // CHECK-LABEL: @fd2
211 // CHECK: [[A_ADDR:%.*]] = alloca ptr, align 4
212 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
213 // CHECK-NEXT: store ptr %a, ptr [[A_ADDR]], align 4
214 // CHECK-NEXT: store ptr %b, ptr [[B_ADDR]], align 4
215 // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load ptr, ptr [[A_ADDR]], align 4
216 // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load ptr, ptr [[B_ADDR]], align 4
217 // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, ptr [[LOAD_B_PTR]], align 4
218 // CHECK-NEXT: store atomic i64 [[LOAD_B]], ptr [[LOAD_A_PTR]] seq_cst, align 4
219 // CHECK-NEXT: ret void
220 __atomic_store(a, b, memory_order_seq_cst);
221 }
222
fd3(struct S * a,struct S * b,struct S * c)223 void fd3(struct S *a, struct S *b, struct S *c) {
224 // CHECK-LABEL: @fd3
225 // CHECK: [[A_ADDR:%.*]] = alloca ptr, align 4
226 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
227 // CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
228 // CHECK-NEXT: store ptr %a, ptr [[A_ADDR]], align 4
229 // CHECK-NEXT: store ptr %b, ptr [[B_ADDR]], align 4
230 // CHECK-NEXT: store ptr %c, ptr [[C_ADDR]], align 4
231 // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load ptr, ptr [[A_ADDR]], align 4
232 // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load ptr, ptr [[B_ADDR]], align 4
233 // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load ptr, ptr [[C_ADDR]], align 4
234 // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, ptr [[LOAD_B_PTR]], align 4
235 // CHECK-NEXT: [[RESULT:%.*]] = atomicrmw xchg ptr [[LOAD_A_PTR]], i64 [[LOAD_B]] seq_cst, align 4
236 // CHECK-NEXT: store i64 [[RESULT]], ptr [[LOAD_C_PTR]], align 4
237
238 __atomic_exchange(a, b, c, memory_order_seq_cst);
239 }
240
fd4(struct S * a,struct S * b,struct S * c)241 _Bool fd4(struct S *a, struct S *b, struct S *c) {
242 // CHECK-LABEL: @fd4
243 // CHECK: [[A_ADDR:%.*]] = alloca ptr, align 4
244 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
245 // CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
246 // CHECK: store ptr %a, ptr [[A_ADDR]], align 4
247 // CHECK-NEXT: store ptr %b, ptr [[B_ADDR]], align 4
248 // CHECK-NEXT: store ptr %c, ptr [[C_ADDR]], align 4
249 // CHECK-NEXT: [[LOAD_A_PTR:%.*]] = load ptr, ptr [[A_ADDR]], align 4
250 // CHECK-NEXT: [[LOAD_B_PTR:%.*]] = load ptr, ptr [[B_ADDR]], align 4
251 // CHECK-NEXT: [[LOAD_C_PTR:%.*]] = load ptr, ptr [[C_ADDR]], align 4
252 // CHECK-NEXT: [[LOAD_B:%.*]] = load i64, ptr [[LOAD_B_PTR]], align 4
253 // CHECK-NEXT: [[LOAD_C:%.*]] = load i64, ptr [[LOAD_C_PTR]], align 4
254 // CHECK-NEXT: {{.*}} = cmpxchg weak ptr [[LOAD_A_PTR]], i64 [[LOAD_B]], i64 [[LOAD_C]] seq_cst seq_cst, align 4
255 return __atomic_compare_exchange(a, b, c, 1, 5, 5);
256 }
257
fp1(_Atomic (int *)* p)258 int* fp1(_Atomic(int*) *p) {
259 // CHECK-LABEL: @fp1
260 // CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4
261 return __c11_atomic_load(p, memory_order_seq_cst);
262 }
263
fp2(_Atomic (int *)* p)264 int* fp2(_Atomic(int*) *p) {
265 // CHECK-LABEL: @fp2
266 // CHECK: store i32 4
267 // CHECK: atomicrmw add {{.*}} monotonic, align 4
268 return __c11_atomic_fetch_add(p, 1, memory_order_relaxed);
269 }
270
fp2a(int ** p)271 int *fp2a(int **p) {
272 // CHECK-LABEL: @fp2a
273 // CHECK: store i32 4
274 // CHECK: atomicrmw sub {{.*}} monotonic, align 4
275 // Note, the GNU builtins do not multiply by sizeof(T)!
276 return __atomic_fetch_sub(p, 4, memory_order_relaxed);
277 }
278
fc(_Atomic (_Complex float)* c)279 _Complex float fc(_Atomic(_Complex float) *c) {
280 // CHECK-LABEL: @fc
281 // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 8
282 return __c11_atomic_exchange(c, 2, memory_order_seq_cst);
283 }
284
285 typedef struct X { int x; } X;
fs(_Atomic (X)* c)286 X fs(_Atomic(X) *c) {
287 // CHECK-LABEL: @fs
288 // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 4
289 return __c11_atomic_exchange(c, (X){2}, memory_order_seq_cst);
290 }
291
fsa(X * c,X * d)292 X fsa(X *c, X *d) {
293 // CHECK-LABEL: @fsa
294 // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 4
295 X ret;
296 __atomic_exchange(c, d, &ret, memory_order_seq_cst);
297 return ret;
298 }
299
fsb(_Bool * c)300 _Bool fsb(_Bool *c) {
301 // CHECK-LABEL: @fsb
302 // CHECK: atomicrmw xchg ptr {{.*}} seq_cst, align 1
303 return __atomic_exchange_n(c, 1, memory_order_seq_cst);
304 }
305
306 char flag1;
307 volatile char flag2;
test_and_set(void)308 void test_and_set(void) {
309 // CHECK: atomicrmw xchg ptr @flag1, i8 1 seq_cst, align 1
310 __atomic_test_and_set(&flag1, memory_order_seq_cst);
311 // CHECK: atomicrmw volatile xchg ptr @flag2, i8 1 acquire, align 1
312 __atomic_test_and_set(&flag2, memory_order_acquire);
313 // CHECK: store atomic volatile i8 0, ptr @flag2 release, align 1
314 __atomic_clear(&flag2, memory_order_release);
315 // CHECK: store atomic i8 0, ptr @flag1 seq_cst, align 1
316 __atomic_clear(&flag1, memory_order_seq_cst);
317 }
318
319 struct Sixteen {
320 char c[16];
321 } sixteen;
322 struct Seventeen {
323 char c[17];
324 } seventeen;
325
326 struct Incomplete;
327
lock_free(struct Incomplete * incomplete)328 int lock_free(struct Incomplete *incomplete) {
329 // CHECK-LABEL: @lock_free
330
331 // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 3, ptr noundef null)
332 __c11_atomic_is_lock_free(3);
333
334 // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 16, ptr noundef {{.*}}@sixteen{{.*}})
335 __atomic_is_lock_free(16, &sixteen);
336
337 // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 17, ptr noundef {{.*}}@seventeen{{.*}})
338 __atomic_is_lock_free(17, &seventeen);
339
340 // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 4, {{.*}})
341 __atomic_is_lock_free(4, incomplete);
342
343 char cs[20];
344 // CHECK: call zeroext i1 @__atomic_is_lock_free(i32 noundef 4, {{.*}})
345 __atomic_is_lock_free(4, cs+1);
346
347 // CHECK-NOT: call
348 __atomic_always_lock_free(3, 0);
349 __atomic_always_lock_free(16, 0);
350 __atomic_always_lock_free(17, 0);
351 __atomic_always_lock_free(16, &sixteen);
352 __atomic_always_lock_free(17, &seventeen);
353
354 int n;
355 __atomic_is_lock_free(4, &n);
356
357 // CHECK: ret i32 1
358 return __c11_atomic_is_lock_free(sizeof(_Atomic(int)));
359 }
360
361 // Tests for atomic operations on big values. These should call the functions
362 // defined here:
363 // http://gcc.gnu.org/wiki/Atomic/GCCMM/LIbrary#The_Library_interface
364
365 struct foo {
366 int big[128];
367 };
368 struct bar {
369 char c[3];
370 };
371
372 struct bar smallThing, thing1, thing2;
373 struct foo bigThing;
374 _Atomic(struct foo) bigAtomic;
375
structAtomicStore(void)376 void structAtomicStore(void) {
377 // CHECK-LABEL: @structAtomicStore
378 struct foo f = {0};
379 struct bar b = {0};
380 __atomic_store(&smallThing, &b, 5);
381 // CHECK: call void @__atomic_store(i32 noundef 3, ptr noundef @smallThing
382
383 __atomic_store(&bigThing, &f, 5);
384 // CHECK: call void @__atomic_store(i32 noundef 512, ptr noundef @bigThing
385 }
structAtomicLoad(void)386 void structAtomicLoad(void) {
387 // CHECK-LABEL: @structAtomicLoad
388 struct bar b;
389 __atomic_load(&smallThing, &b, 5);
390 // CHECK: call void @__atomic_load(i32 noundef 3, ptr noundef @smallThing
391
392 struct foo f = {0};
393 __atomic_load(&bigThing, &f, 5);
394 // CHECK: call void @__atomic_load(i32 noundef 512, ptr noundef @bigThing
395 }
structAtomicExchange(void)396 struct foo structAtomicExchange(void) {
397 // CHECK-LABEL: @structAtomicExchange
398 struct foo f = {0};
399 struct foo old;
400 __atomic_exchange(&f, &bigThing, &old, 5);
401 // CHECK: call void @__atomic_exchange(i32 noundef 512, {{.*}}, ptr noundef @bigThing,
402
403 return __c11_atomic_exchange(&bigAtomic, f, 5);
404 // CHECK: call void @__atomic_exchange(i32 noundef 512, ptr noundef @bigAtomic,
405 }
structAtomicCmpExchange(void)406 int structAtomicCmpExchange(void) {
407 // CHECK-LABEL: @structAtomicCmpExchange
408 // CHECK: %[[x_mem:.*]] = alloca i8
409 _Bool x = __atomic_compare_exchange(&smallThing, &thing1, &thing2, 1, 5, 5);
410 // CHECK: %[[call1:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 noundef 3, {{.*}} @smallThing{{.*}} @thing1{{.*}} @thing2
411 // CHECK: %[[zext1:.*]] = zext i1 %[[call1]] to i8
412 // CHECK: store i8 %[[zext1]], ptr %[[x_mem]], align 1
413 // CHECK: %[[x:.*]] = load i8, ptr %[[x_mem]]
414 // CHECK: %[[x_bool:.*]] = trunc i8 %[[x]] to i1
415 // CHECK: %[[conv1:.*]] = zext i1 %[[x_bool]] to i32
416
417 struct foo f = {0};
418 struct foo g = {0};
419 g.big[12] = 12;
420 return x & __c11_atomic_compare_exchange_strong(&bigAtomic, &f, g, 5, 5);
421 // CHECK: %[[call2:.*]] = call zeroext i1 @__atomic_compare_exchange(i32 noundef 512, ptr noundef @bigAtomic,
422 // CHECK: %[[conv2:.*]] = zext i1 %[[call2]] to i32
423 // CHECK: %[[and:.*]] = and i32 %[[conv1]], %[[conv2]]
424 // CHECK: ret i32 %[[and]]
425 }
426
427 // Check that no atomic operations are used in any initialisation of _Atomic
428 // types.
429 _Atomic(int) atomic_init_i = 42;
430
431 // CHECK-LABEL: @atomic_init_foo
atomic_init_foo(void)432 void atomic_init_foo(void)
433 {
434 // CHECK-NOT: }
435 // CHECK-NOT: atomic
436 // CHECK: store
437 _Atomic(int) j = 12;
438
439 // CHECK-NOT: }
440 // CHECK-NOT: atomic
441 // CHECK: store
442 __c11_atomic_init(&j, 42);
443
444 // CHECK-NOT: atomic
445 // CHECK: }
446 }
447
448 // CHECK-LABEL: @failureOrder
failureOrder(_Atomic (int)* ptr,int * ptr2)449 void failureOrder(_Atomic(int) *ptr, int *ptr2) {
450 __c11_atomic_compare_exchange_strong(ptr, ptr2, 43, memory_order_acquire, memory_order_relaxed);
451 // CHECK: cmpxchg ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acquire monotonic, align 4
452
453 __c11_atomic_compare_exchange_weak(ptr, ptr2, 43, memory_order_seq_cst, memory_order_acquire);
454 // CHECK: cmpxchg weak ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst acquire, align 4
455
456 // Unknown ordering: conservatively pick strongest valid option (for now!).
457 __atomic_compare_exchange(ptr2, ptr2, ptr2, 0, memory_order_acq_rel, *ptr2);
458 // CHECK: cmpxchg ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} acq_rel acquire, align 4
459
460 // Undefined behaviour: don't really care what that last ordering is so leave
461 // it out:
462 __atomic_compare_exchange_n(ptr2, ptr2, 43, 1, memory_order_seq_cst, 42);
463 // CHECK: cmpxchg weak ptr {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} seq_cst {{.*}}, align 4
464 }
465
466 // CHECK-LABEL: @generalFailureOrder
generalFailureOrder(_Atomic (int)* ptr,int * ptr2,int success,int fail)467 void generalFailureOrder(_Atomic(int) *ptr, int *ptr2, int success, int fail) {
468 __c11_atomic_compare_exchange_strong(ptr, ptr2, 42, success, fail);
469 // CHECK: switch i32 {{.*}}, label %[[MONOTONIC:[0-9a-zA-Z._]+]] [
470 // CHECK-NEXT: i32 1, label %[[ACQUIRE:[0-9a-zA-Z._]+]]
471 // CHECK-NEXT: i32 2, label %[[ACQUIRE]]
472 // CHECK-NEXT: i32 3, label %[[RELEASE:[0-9a-zA-Z._]+]]
473 // CHECK-NEXT: i32 4, label %[[ACQREL:[0-9a-zA-Z._]+]]
474 // CHECK-NEXT: i32 5, label %[[SEQCST:[0-9a-zA-Z._]+]]
475
476 // CHECK: [[MONOTONIC]]
477 // CHECK: switch {{.*}}, label %[[MONOTONIC_MONOTONIC:[0-9a-zA-Z._]+]] [
478 // CHECK-NEXT: i32 1, label %[[MONOTONIC_ACQUIRE:[0-9a-zA-Z._]+]]
479 // CHECK-NEXT: i32 2, label %[[MONOTONIC_ACQUIRE:[0-9a-zA-Z._]+]]
480 // CHECK-NEXT: i32 5, label %[[MONOTONIC_SEQCST:[0-9a-zA-Z._]+]]
481 // CHECK-NEXT: ]
482
483 // CHECK: [[ACQUIRE]]
484 // CHECK: switch {{.*}}, label %[[ACQUIRE_MONOTONIC:[0-9a-zA-Z._]+]] [
485 // CHECK-NEXT: i32 1, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]
486 // CHECK-NEXT: i32 2, label %[[ACQUIRE_ACQUIRE:[0-9a-zA-Z._]+]]
487 // CHECK-NEXT: i32 5, label %[[ACQUIRE_SEQCST:[0-9a-zA-Z._]+]]
488 // CHECK-NEXT: ]
489
490 // CHECK: [[RELEASE]]
491 // CHECK: switch {{.*}}, label %[[RELEASE_MONOTONIC:[0-9a-zA-Z._]+]] [
492 // CHECK-NEXT: i32 1, label %[[RELEASE_ACQUIRE:[0-9a-zA-Z._]+]]
493 // CHECK-NEXT: i32 2, label %[[RELEASE_ACQUIRE:[0-9a-zA-Z._]+]]
494 // CHECK-NEXT: i32 5, label %[[RELEASE_SEQCST:[0-9a-zA-Z._]+]]
495 // CHECK-NEXT: ]
496
497 // CHECK: [[ACQREL]]
498 // CHECK: switch {{.*}}, label %[[ACQREL_MONOTONIC:[0-9a-zA-Z._]+]] [
499 // CHECK-NEXT: i32 1, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]
500 // CHECK-NEXT: i32 2, label %[[ACQREL_ACQUIRE:[0-9a-zA-Z._]+]]
501 // CHECK-NEXT: i32 5, label %[[ACQREL_SEQCST:[0-9a-zA-Z._]+]]
502 // CHECK-NEXT: ]
503
504 // CHECK: [[SEQCST]]
505 // CHECK: switch {{.*}}, label %[[SEQCST_MONOTONIC:[0-9a-zA-Z._]+]] [
506 // CHECK-NEXT: i32 1, label %[[SEQCST_ACQUIRE:[0-9a-zA-Z._]+]]
507 // CHECK-NEXT: i32 2, label %[[SEQCST_ACQUIRE]]
508 // CHECK-NEXT: i32 5, label %[[SEQCST_SEQCST:[0-9a-zA-Z._]+]]
509 // CHECK-NEXT: ]
510
511 // CHECK: [[MONOTONIC_MONOTONIC]]
512 // CHECK: cmpxchg {{.*}} monotonic monotonic, align
513 // CHECK: br
514
515 // CHECK: [[MONOTONIC_ACQUIRE]]
516 // CHECK: cmpxchg {{.*}} monotonic acquire, align
517 // CHECK: br
518
519 // CHECK: [[MONOTONIC_SEQCST]]
520 // CHECK: cmpxchg {{.*}} monotonic seq_cst, align
521 // CHECK: br
522
523 // CHECK: [[ACQUIRE_MONOTONIC]]
524 // CHECK: cmpxchg {{.*}} acquire monotonic, align
525 // CHECK: br
526
527 // CHECK: [[ACQUIRE_ACQUIRE]]
528 // CHECK: cmpxchg {{.*}} acquire acquire, align
529 // CHECK: br
530
531 // CHECK: [[ACQUIRE_SEQCST]]
532 // CHECK: cmpxchg {{.*}} acquire seq_cst, align
533 // CHECK: br
534
535 // CHECK: [[RELEASE_MONOTONIC]]
536 // CHECK: cmpxchg {{.*}} release monotonic, align
537 // CHECK: br
538
539 // CHECK: [[RELEASE_ACQUIRE]]
540 // CHECK: cmpxchg {{.*}} release acquire, align
541 // CHECK: br
542
543 // CHECK: [[RELEASE_SEQCST]]
544 // CHECK: cmpxchg {{.*}} release seq_cst, align
545 // CHECK: br
546
547 // CHECK: [[ACQREL_MONOTONIC]]
548 // CHECK: cmpxchg {{.*}} acq_rel monotonic, align
549 // CHECK: br
550
551 // CHECK: [[ACQREL_ACQUIRE]]
552 // CHECK: cmpxchg {{.*}} acq_rel acquire, align
553 // CHECK: br
554
555 // CHECK: [[ACQREL_SEQCST]]
556 // CHECK: cmpxchg {{.*}} acq_rel seq_cst, align
557 // CHECK: br
558
559 // CHECK: [[SEQCST_MONOTONIC]]
560 // CHECK: cmpxchg {{.*}} seq_cst monotonic, align
561 // CHECK: br
562
563 // CHECK: [[SEQCST_ACQUIRE]]
564 // CHECK: cmpxchg {{.*}} seq_cst acquire, align
565 // CHECK: br
566
567 // CHECK: [[SEQCST_SEQCST]]
568 // CHECK: cmpxchg {{.*}} seq_cst seq_cst, align
569 // CHECK: br
570 }
571
generalWeakness(int * ptr,int * ptr2,_Bool weak)572 void generalWeakness(int *ptr, int *ptr2, _Bool weak) {
573 __atomic_compare_exchange_n(ptr, ptr2, 42, weak, memory_order_seq_cst, memory_order_seq_cst);
574 // CHECK: switch i1 {{.*}}, label %[[WEAK:[0-9a-zA-Z._]+]] [
575 // CHECK-NEXT: i1 false, label %[[STRONG:[0-9a-zA-Z._]+]]
576
577 // CHECK: [[STRONG]]
578 // CHECK-NOT: br
579 // CHECK: cmpxchg {{.*}} seq_cst seq_cst, align
580 // CHECK: br
581
582 // CHECK: [[WEAK]]
583 // CHECK-NOT: br
584 // CHECK: cmpxchg weak {{.*}} seq_cst seq_cst, align
585 // CHECK: br
586
587 __atomic_compare_exchange_n(ptr, ptr2, 42, weak, memory_order_release, memory_order_acquire);
588 // CHECK: switch i1 {{.*}}, label %[[WEAK:[0-9a-zA-Z._]+]] [
589 // CHECK-NEXT: i1 false, label %[[STRONG:[0-9a-zA-Z._]+]]
590
591 // CHECK: [[STRONG]]
592 // CHECK-NOT: br
593 // CHECK: cmpxchg {{.*}} release acquire
594 // CHECK: br
595
596 // CHECK: [[WEAK]]
597 // CHECK-NOT: br
598 // CHECK: cmpxchg weak {{.*}} release acquire
599 // CHECK: br
600 }
601
602 // Having checked the flow in the previous two cases, we'll trust clang to
603 // combine them sanely.
EMIT_ALL_THE_THINGS(int * ptr,int * ptr2,int new,_Bool weak,int success,int fail)604 void EMIT_ALL_THE_THINGS(int *ptr, int *ptr2, int new, _Bool weak, int success, int fail) {
605 __atomic_compare_exchange(ptr, ptr2, &new, weak, success, fail);
606
607 // CHECK: = cmpxchg {{.*}} monotonic monotonic, align
608 // CHECK: = cmpxchg {{.*}} monotonic acquire, align
609 // CHECK: = cmpxchg {{.*}} monotonic seq_cst, align
610 // CHECK: = cmpxchg weak {{.*}} monotonic monotonic, align
611 // CHECK: = cmpxchg weak {{.*}} monotonic acquire, align
612 // CHECK: = cmpxchg weak {{.*}} monotonic seq_cst, align
613 // CHECK: = cmpxchg {{.*}} acquire monotonic, align
614 // CHECK: = cmpxchg {{.*}} acquire acquire, align
615 // CHECK: = cmpxchg {{.*}} acquire seq_cst, align
616 // CHECK: = cmpxchg weak {{.*}} acquire monotonic, align
617 // CHECK: = cmpxchg weak {{.*}} acquire acquire, align
618 // CHECK: = cmpxchg weak {{.*}} acquire seq_cst, align
619 // CHECK: = cmpxchg {{.*}} release monotonic, align
620 // CHECK: = cmpxchg {{.*}} release acquire, align
621 // CHECK: = cmpxchg {{.*}} release seq_cst, align
622 // CHECK: = cmpxchg weak {{.*}} release monotonic, align
623 // CHECK: = cmpxchg weak {{.*}} release acquire, align
624 // CHECK: = cmpxchg weak {{.*}} release seq_cst, align
625 // CHECK: = cmpxchg {{.*}} acq_rel monotonic, align
626 // CHECK: = cmpxchg {{.*}} acq_rel acquire, align
627 // CHECK: = cmpxchg {{.*}} acq_rel seq_cst, align
628 // CHECK: = cmpxchg weak {{.*}} acq_rel monotonic, align
629 // CHECK: = cmpxchg weak {{.*}} acq_rel acquire, align
630 // CHECK: = cmpxchg weak {{.*}} acq_rel seq_cst, align
631 // CHECK: = cmpxchg {{.*}} seq_cst monotonic, align
632 // CHECK: = cmpxchg {{.*}} seq_cst acquire, align
633 // CHECK: = cmpxchg {{.*}} seq_cst seq_cst, align
634 // CHECK: = cmpxchg weak {{.*}} seq_cst monotonic, align
635 // CHECK: = cmpxchg weak {{.*}} seq_cst acquire, align
636 // CHECK: = cmpxchg weak {{.*}} seq_cst seq_cst, align
637 }
638
PR21643(void)639 int PR21643(void) {
640 return __atomic_or_fetch((int __attribute__((address_space(257))) *)0x308, 1,
641 __ATOMIC_RELAXED);
642 // CHECK: %[[atomictmp:.*]] = alloca i32, align 4
643 // CHECK: %[[atomicdst:.*]] = alloca i32, align 4
644 // CHECK: store i32 1, ptr %[[atomictmp]]
645 // CHECK: %[[one:.*]] = load i32, ptr %[[atomictmp]], align 4
646 // CHECK: %[[old:.*]] = atomicrmw or ptr addrspace(257) inttoptr (i32 776 to ptr addrspace(257)), i32 %[[one]] monotonic, align 4
647 // CHECK: %[[new:.*]] = or i32 %[[old]], %[[one]]
648 // CHECK: store i32 %[[new]], ptr %[[atomicdst]], align 4
649 // CHECK: %[[ret:.*]] = load i32, ptr %[[atomicdst]], align 4
650 // CHECK: ret i32 %[[ret]]
651 }
652
PR17306_1(volatile _Atomic (int)* i)653 int PR17306_1(volatile _Atomic(int) *i) {
654 // CHECK-LABEL: @PR17306_1
655 // CHECK: %[[i_addr:.*]] = alloca ptr
656 // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32
657 // CHECK-NEXT: store ptr %i, ptr %[[i_addr]]
658 // CHECK-NEXT: %[[addr:.*]] = load ptr, ptr %[[i_addr]]
659 // CHECK-NEXT: %[[res:.*]] = load atomic volatile i32, ptr %[[addr]] seq_cst, align 4
660 // CHECK-NEXT: store i32 %[[res]], ptr %[[atomicdst]]
661 // CHECK-NEXT: %[[retval:.*]] = load i32, ptr %[[atomicdst]]
662 // CHECK-NEXT: ret i32 %[[retval]]
663 return __c11_atomic_load(i, memory_order_seq_cst);
664 }
665
PR17306_2(volatile int * i,int value)666 int PR17306_2(volatile int *i, int value) {
667 // CHECK-LABEL: @PR17306_2
668 // CHECK: %[[i_addr:.*]] = alloca ptr
669 // CHECK-NEXT: %[[value_addr:.*]] = alloca i32
670 // CHECK-NEXT: %[[atomictmp:.*]] = alloca i32
671 // CHECK-NEXT: %[[atomicdst:.*]] = alloca i32
672 // CHECK-NEXT: store ptr %i, ptr %[[i_addr]]
673 // CHECK-NEXT: store i32 %value, ptr %[[value_addr]]
674 // CHECK-NEXT: %[[i_lval:.*]] = load ptr, ptr %[[i_addr]]
675 // CHECK-NEXT: %[[value:.*]] = load i32, ptr %[[value_addr]]
676 // CHECK-NEXT: store i32 %[[value]], ptr %[[atomictmp]]
677 // CHECK-NEXT: %[[value_lval:.*]] = load i32, ptr %[[atomictmp]]
678 // CHECK-NEXT: %[[old_val:.*]] = atomicrmw volatile add ptr %[[i_lval]], i32 %[[value_lval]] seq_cst, align 4
679 // CHECK-NEXT: %[[new_val:.*]] = add i32 %[[old_val]], %[[value_lval]]
680 // CHECK-NEXT: store i32 %[[new_val]], ptr %[[atomicdst]]
681 // CHECK-NEXT: %[[retval:.*]] = load i32, ptr %[[atomicdst]]
682 // CHECK-NEXT: ret i32 %[[retval]]
683 return __atomic_add_fetch(i, value, memory_order_seq_cst);
684 }
685
test_underaligned(void)686 void test_underaligned(void) {
687 // CHECK-LABEL: @test_underaligned
688 struct Underaligned { char c[8]; } underaligned_a, underaligned_b, underaligned_c;
689
690 // CHECK: load atomic i64, {{.*}}, align 1
691 __atomic_load(&underaligned_a, &underaligned_b, memory_order_seq_cst);
692 // CHECK: store atomic i64 {{.*}}, align 1
693 __atomic_store(&underaligned_a, &underaligned_b, memory_order_seq_cst);
694 // CHECK: atomicrmw xchg ptr {{.*}}, align 1
695 __atomic_exchange(&underaligned_a, &underaligned_b, &underaligned_c, memory_order_seq_cst);
696 // CHECK: cmpxchg weak ptr {{.*}}, align 1
697 __atomic_compare_exchange(&underaligned_a, &underaligned_b, &underaligned_c, 1, memory_order_seq_cst, memory_order_seq_cst);
698
699 __attribute__((aligned)) struct Underaligned aligned_a, aligned_b, aligned_c;
700
701 // CHECK: load atomic i64, {{.*}}, align 16
702 __atomic_load(&aligned_a, &aligned_b, memory_order_seq_cst);
703 // CHECK: store atomic i64 {{.*}}, align 16
704 __atomic_store(&aligned_a, &aligned_b, memory_order_seq_cst);
705 // CHECK: atomicrmw xchg ptr {{.*}}, align 16
706 __atomic_exchange(&aligned_a, &aligned_b, &aligned_c, memory_order_seq_cst);
707 // CHECK: cmpxchg weak ptr {{.*}}, align 16
708 __atomic_compare_exchange(&aligned_a, &aligned_b, &aligned_c, 1, memory_order_seq_cst, memory_order_seq_cst);
709 }
710
test_c11_minmax(_Atomic (int)* si,_Atomic (unsigned)* ui,_Atomic (short)* ss,_Atomic (unsigned char)* uc,_Atomic (long long)* sll)711 void test_c11_minmax(_Atomic(int) * si, _Atomic(unsigned) * ui, _Atomic(short) * ss, _Atomic(unsigned char) * uc, _Atomic(long long) * sll) {
712 // CHECK-LABEL: @test_c11_minmax
713
714 // CHECK: atomicrmw max ptr {{.*}} acquire, align 4
715 *si = __c11_atomic_fetch_max(si, 42, memory_order_acquire);
716 // CHECK: atomicrmw min ptr {{.*}} acquire, align 4
717 *si = __c11_atomic_fetch_min(si, 42, memory_order_acquire);
718 // CHECK: atomicrmw umax ptr {{.*}} acquire, align 4
719 *ui = __c11_atomic_fetch_max(ui, 42, memory_order_acquire);
720 // CHECK: atomicrmw umin ptr {{.*}} acquire, align 4
721 *ui = __c11_atomic_fetch_min(ui, 42, memory_order_acquire);
722
723 // CHECK: atomicrmw max ptr {{.*}} acquire, align 2
724 *ss = __c11_atomic_fetch_max(ss, 42, memory_order_acquire);
725 // CHECK: atomicrmw min ptr {{.*}} acquire, align 2
726 *ss = __c11_atomic_fetch_min(ss, 42, memory_order_acquire);
727
728 // CHECK: atomicrmw umax ptr {{.*}} acquire, align 1
729 *uc = __c11_atomic_fetch_max(uc, 42, memory_order_acquire);
730 // CHECK: atomicrmw umin ptr {{.*}} acquire, align 1
731 *uc = __c11_atomic_fetch_min(uc, 42, memory_order_acquire);
732
733 // CHECK: atomicrmw max ptr {{.*}} acquire, align 8
734 *sll = __c11_atomic_fetch_max(sll, 42, memory_order_acquire);
735 // CHECK: atomicrmw min ptr {{.*}} acquire, align 8
736 *sll = __c11_atomic_fetch_min(sll, 42, memory_order_acquire);
737
738 }
739
test_minmax_postop(int * si,unsigned * ui,unsigned short * us,signed char * sc,unsigned long long * ull)740 void test_minmax_postop(int *si, unsigned *ui, unsigned short *us, signed char *sc, unsigned long long *ull) {
741 int val = 42;
742 // CHECK-LABEL: @test_minmax_postop
743
744 // CHECK: [[OLD:%.*]] = atomicrmw max ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4
745 // CHECK: [[TST:%.*]] = icmp sgt i32 [[OLD]], [[RHS]]
746 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]
747 // CHECK: store i32 [[NEW]], ptr
748 *si = __atomic_max_fetch(si, 42, memory_order_release);
749
750 // CHECK: [[OLD:%.*]] = atomicrmw min ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4
751 // CHECK: [[TST:%.*]] = icmp slt i32 [[OLD]], [[RHS]]
752 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]
753 // CHECK: store i32 [[NEW]], ptr
754 *si = __atomic_min_fetch(si, 42, memory_order_release);
755
756 // CHECK: [[OLD:%.*]] = atomicrmw umax ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4
757 // CHECK: [[TST:%.*]] = icmp ugt i32 [[OLD]], [[RHS]]
758 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]
759 // CHECK: store i32 [[NEW]], ptr
760 *ui = __atomic_max_fetch(ui, 42, memory_order_release);
761
762 // CHECK: [[OLD:%.*]] = atomicrmw umin ptr [[PTR:%.*]], i32 [[RHS:%.*]] release, align 4
763 // CHECK: [[TST:%.*]] = icmp ult i32 [[OLD]], [[RHS]]
764 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i32 [[OLD]], i32 [[RHS]]
765 // CHECK: store i32 [[NEW]], ptr
766 *ui = __atomic_min_fetch(ui, 42, memory_order_release);
767
768 // CHECK: [[OLD:%.*]] = atomicrmw umin ptr [[PTR:%.*]], i16 [[RHS:%.*]] release, align 2
769 // CHECK: [[TST:%.*]] = icmp ult i16 [[OLD]], [[RHS]]
770 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i16 [[OLD]], i16 [[RHS]]
771 // CHECK: store i16 [[NEW]], ptr
772 *us = __atomic_min_fetch(us, 42, memory_order_release);
773
774 // CHECK: [[OLD:%.*]] = atomicrmw min ptr [[PTR:%.*]], i8 [[RHS:%.*]] release, align 1
775 // CHECK: [[TST:%.*]] = icmp slt i8 [[OLD]], [[RHS]]
776 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i8 [[OLD]], i8 [[RHS]]
777 // CHECK: store i8 [[NEW]], ptr
778 *sc = __atomic_min_fetch(sc, 42, memory_order_release);
779
780 // CHECK: [[OLD:%.*]] = atomicrmw umin ptr {{%.*}}, i64 [[RHS:%.*]] release, align 4
781 // CHECK: [[TST:%.*]] = icmp ult i64 [[OLD]], [[RHS]]
782 // CHECK: [[NEW:%.*]] = select i1 [[TST]], i64 [[OLD]], i64 [[RHS]]
783 // CHECK: store i64 [[NEW]], ptr
784 *ull = __atomic_min_fetch(ull, 42, memory_order_release);
785
786 }
787
788 #endif
789