xref: /llvm-project/clang/test/CodeGen/WebAssembly/wasm-rotate.c (revision 9571a28ee4e801a7796569d62fe037fc22cd65a4)
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2 // RUN: %clang_cc1 -triple wasm32-unknown-unknown -o - -emit-llvm %s | FileCheck --check-prefix=WEBASSEMBLY32 %s
3 // RUN: %clang_cc1 -triple wasm64-unknown-unknown -o - -emit-llvm %s | FileCheck --check-prefix=WEBASSEMBLY64 %s
4 
5 // WEBASSEMBLY32-LABEL: define i32 @test32
6 // WEBASSEMBLY32-SAME: (i32 noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
7 // WEBASSEMBLY32-NEXT:  entry:
8 // WEBASSEMBLY32-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4
9 // WEBASSEMBLY32-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 4
10 // WEBASSEMBLY32-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
11 // WEBASSEMBLY32-NEXT:    [[AND:%.*]] = and i32 [[TMP0]], -16711936
12 // WEBASSEMBLY32-NEXT:    [[TMP1:%.*]] = call i32 @llvm.fshl.i32(i32 [[AND]], i32 [[AND]], i32 8)
13 // WEBASSEMBLY32-NEXT:    ret i32 [[TMP1]]
14 //
15 // WEBASSEMBLY64-LABEL: define i32 @test32
16 // WEBASSEMBLY64-SAME: (i32 noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
17 // WEBASSEMBLY64-NEXT:  entry:
18 // WEBASSEMBLY64-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4
19 // WEBASSEMBLY64-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 4
20 // WEBASSEMBLY64-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
21 // WEBASSEMBLY64-NEXT:    [[AND:%.*]] = and i32 [[TMP0]], -16711936
22 // WEBASSEMBLY64-NEXT:    [[TMP1:%.*]] = call i32 @llvm.fshl.i32(i32 [[AND]], i32 [[AND]], i32 8)
23 // WEBASSEMBLY64-NEXT:    ret i32 [[TMP1]]
24 //
test32(unsigned int x)25 unsigned int test32(unsigned int x) {
26   return __builtin_rotateleft32((x & 0xFF00FF00), 8);
27 }
28 
29 // WEBASSEMBLY32-LABEL: define i32 @test64
30 // WEBASSEMBLY32-SAME: (i32 noundef [[X:%.*]]) #[[ATTR0]] {
31 // WEBASSEMBLY32-NEXT:  entry:
32 // WEBASSEMBLY32-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4
33 // WEBASSEMBLY32-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 4
34 // WEBASSEMBLY32-NEXT:    [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
35 // WEBASSEMBLY32-NEXT:    [[CONV:%.*]] = zext i32 [[TMP0]] to i64
36 // WEBASSEMBLY32-NEXT:    [[AND:%.*]] = and i64 [[CONV]], -71777214294589696
37 // WEBASSEMBLY32-NEXT:    [[TMP1:%.*]] = call i64 @llvm.fshl.i64(i64 [[AND]], i64 [[AND]], i64 8)
38 // WEBASSEMBLY32-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
39 // WEBASSEMBLY32-NEXT:    ret i32 [[CONV1]]
40 //
41 // WEBASSEMBLY64-LABEL: define i64 @test64
42 // WEBASSEMBLY64-SAME: (i64 noundef [[X:%.*]]) #[[ATTR0]] {
43 // WEBASSEMBLY64-NEXT:  entry:
44 // WEBASSEMBLY64-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8
45 // WEBASSEMBLY64-NEXT:    store i64 [[X]], ptr [[X_ADDR]], align 8
46 // WEBASSEMBLY64-NEXT:    [[TMP0:%.*]] = load i64, ptr [[X_ADDR]], align 8
47 // WEBASSEMBLY64-NEXT:    [[AND:%.*]] = and i64 [[TMP0]], -71777214294589696
48 // WEBASSEMBLY64-NEXT:    [[TMP1:%.*]] = call i64 @llvm.fshl.i64(i64 [[AND]], i64 [[AND]], i64 8)
49 // WEBASSEMBLY64-NEXT:    ret i64 [[TMP1]]
50 //
test64(unsigned long x)51 unsigned long test64(unsigned long x) {
52   return __builtin_rotateleft64((x & 0xFF00FF00FF00FF00L), 8);
53 }
54