1 // RUN: %clang_cc1 -triple s390x-linux-gnu -O2 -emit-llvm -o - %s | FileCheck %s 2 3 unsigned int gi; 4 unsigned long gl; 5 6 void test_store_m(unsigned int i) { 7 asm("st %1, %0" : "=m" (gi) : "r" (i)); 8 // CHECK-LABEL: define{{.*}} void @test_store_m(i32 noundef zeroext %i) 9 // CHECK: call void asm "st $1, $0", "=*m,r"(ptr nonnull elementtype(i32) @gi, i32 %i) 10 } 11 12 void test_store_Q(unsigned int i) { 13 asm("st %1, %0" : "=Q" (gi) : "r" (i)); 14 // CHECK-LABEL: define{{.*}} void @test_store_Q(i32 noundef zeroext %i) 15 // CHECK: call void asm "st $1, $0", "=*Q,r"(ptr nonnull elementtype(i32) @gi, i32 %i) 16 } 17 18 void test_store_R(unsigned int i) { 19 asm("st %1, %0" : "=R" (gi) : "r" (i)); 20 // CHECK-LABEL: define{{.*}} void @test_store_R(i32 noundef zeroext %i) 21 // CHECK: call void asm "st $1, $0", "=*R,r"(ptr nonnull elementtype(i32) @gi, i32 %i) 22 } 23 24 void test_store_S(unsigned int i) { 25 asm("st %1, %0" : "=S" (gi) : "r" (i)); 26 // CHECK-LABEL: define{{.*}} void @test_store_S(i32 noundef zeroext %i) 27 // CHECK: call void asm "st $1, $0", "=*S,r"(ptr nonnull elementtype(i32) @gi, i32 %i) 28 } 29 30 void test_store_T(unsigned int i) { 31 asm("st %1, %0" : "=T" (gi) : "r" (i)); 32 // CHECK-LABEL: define{{.*}} void @test_store_T(i32 noundef zeroext %i) 33 // CHECK: call void asm "st $1, $0", "=*T,r"(ptr nonnull elementtype(i32) @gi, i32 %i) 34 } 35 36 int test_load_m(void) { 37 unsigned int i; 38 asm("l %0, %1" : "=r" (i) : "m" (gi)); 39 return i; 40 // CHECK-LABEL: define{{.*}} signext i32 @test_load_m() 41 // CHECK: call i32 asm "l $0, $1", "=r,*m"(ptr nonnull elementtype(i32) @gi) 42 } 43 44 int test_load_Q(void) { 45 unsigned int i; 46 asm("l %0, %1" : "=r" (i) : "Q" (gi)); 47 return i; 48 // CHECK-LABEL: define{{.*}} signext i32 @test_load_Q() 49 // CHECK: call i32 asm "l $0, $1", "=r,*Q"(ptr nonnull elementtype(i32) @gi) 50 } 51 52 int test_load_R(void) { 53 unsigned int i; 54 asm("l %0, %1" : "=r" (i) : "R" (gi)); 55 return i; 56 // CHECK-LABEL: define{{.*}} signext i32 @test_load_R() 57 // CHECK: call i32 asm "l $0, $1", "=r,*R"(ptr nonnull elementtype(i32) @gi) 58 } 59 60 int test_load_S(void) { 61 unsigned int i; 62 asm("l %0, %1" : "=r" (i) : "S" (gi)); 63 return i; 64 // CHECK-LABEL: define{{.*}} signext i32 @test_load_S() 65 // CHECK: call i32 asm "l $0, $1", "=r,*S"(ptr nonnull elementtype(i32) @gi) 66 } 67 68 int test_load_T(void) { 69 unsigned int i; 70 asm("l %0, %1" : "=r" (i) : "T" (gi)); 71 return i; 72 // CHECK-LABEL: define{{.*}} signext i32 @test_load_T() 73 // CHECK: call i32 asm "l $0, $1", "=r,*T"(ptr nonnull elementtype(i32) @gi) 74 } 75 76 void test_mI(unsigned char *c) { 77 asm volatile("cli %0, %1" :: "Q" (*c), "I" (100)); 78 // CHECK-LABEL: define{{.*}} void @test_mI(ptr noundef %c) 79 // CHECK: call void asm sideeffect "cli $0, $1", "*Q,I"(ptr elementtype(i8) %c, i32 100) 80 } 81 82 unsigned int test_dJa(unsigned int i, unsigned int j) { 83 asm("sll %0, %2(%3)" : "=d" (i) : "0" (i), "J" (1000), "a" (j)); 84 return i; 85 // CHECK-LABEL: define{{.*}} zeroext i32 @test_dJa(i32 noundef zeroext %i, i32 noundef zeroext %j) 86 // CHECK: call i32 asm "sll $0, $2($3)", "=d,0,J,a"(i32 %i, i32 1000, i32 %j) 87 } 88 89 unsigned long test_rK(unsigned long i) { 90 asm("aghi %0, %2" : "=r" (i) : "0" (i), "K" (-30000)); 91 return i; 92 // CHECK-LABEL: define{{.*}} i64 @test_rK(i64 noundef %i) 93 // CHECK: call i64 asm "aghi $0, $2", "=r,0,K"(i64 %i, i32 -30000) 94 } 95 96 unsigned long test_rL(unsigned long i) { 97 asm("sllg %0, %1, %2" : "=r" (i) : "r" (i), "L" (500000)); 98 return i; 99 // CHECK-LABEL: define{{.*}} i64 @test_rL(i64 noundef %i) 100 // CHECK: call i64 asm "sllg $0, $1, $2", "=r,r,L"(i64 %i, i32 500000) 101 } 102 103 void test_M(void) { 104 asm volatile("#FOO %0" :: "M"(0x7fffffff)); 105 // CHECK-LABEL: define{{.*}} void @test_M() 106 // CHECK: call void asm sideeffect "#FOO $0", "M"(i32 2147483647) 107 } 108 109 float test_f32(float f, float g) { 110 asm("aebr %0, %2" : "=f" (f) : "0" (f), "f" (g)); 111 return f; 112 // CHECK-LABEL: define{{.*}} float @test_f32(float noundef %f, float noundef %g) 113 // CHECK: call float asm "aebr $0, $2", "=f,0,f"(float %f, float %g) 114 } 115 116 double test_f64(double f, double g) { 117 asm("adbr %0, %2" : "=f" (f) : "0" (f), "f" (g)); 118 return f; 119 // CHECK-LABEL: define{{.*}} double @test_f64(double noundef %f, double noundef %g) 120 // CHECK: call double asm "adbr $0, $2", "=f,0,f"(double %f, double %g) 121 } 122 123 long double test_f128(long double f, long double g) { 124 asm("axbr %0, %2" : "=f" (f) : "0" (f), "f" (g)); 125 return f; 126 // CHECK: define{{.*}} void @test_f128(ptr dead_on_unwind noalias writable writeonly sret(fp128) align 8 captures(none) initializes((0, 16)) [[DEST:%.*]], ptr noundef readonly captures(none) %0, ptr noundef readonly captures(none) %1) 127 // CHECK: %f = load fp128, ptr %0 128 // CHECK: %g = load fp128, ptr %1 129 // CHECK: [[RESULT:%.*]] = tail call fp128 asm "axbr $0, $2", "=f,0,f"(fp128 %f, fp128 %g) 130 // CHECK: store fp128 [[RESULT]], ptr [[DEST]] 131 } 132 133 // Test that there are no tied physreg uses. TwoAddress pass cannot deal with them. 134 int test_physregs(void) { 135 // CHECK-LABEL: define{{.*}} signext i32 @test_physregs() 136 register int l __asm__("r7") = 0; 137 138 // CHECK: call i32 asm "lr $0, $1", "={r7},{r7}" 139 __asm__("lr %0, %1" : "+r"(l)); 140 141 // CHECK: call i32 asm "$0 $1 $2", "={r7},{r7},{r7}" 142 __asm__("%0 %1 %2" : "+r"(l) : "r"(l)); 143 144 return l; 145 } 146