1 // RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
2 // RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \
4 // RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
5 // RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \
6 // RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
7 // RUN: %clang -mcpu=pwr8 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s
8 // RUN: %clang -mcpu=pwr9 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s
9
10 // CHECK-LABEL: @bi8(
11 // CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16
12 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16
13 // CHECK-NEXT: store <16 x i8> [[A:%.*]], ptr [[A_ADDR]], align 16
14 // CHECK-NEXT: store <16 x i8> [[B:%.*]], ptr [[B_ADDR]], align 16
15 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[A_ADDR]], align 16
16 // CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr [[B_ADDR]], align 16
17 // CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]
18 // CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8>
19 // CHECK-NEXT: ret <16 x i8> [[SEXT]]
20 //
21 // ERROR: returning 'int' from a function with incompatible result type
bi8(vector bool char a,vector bool char b)22 vector unsigned char bi8(vector bool char a, vector bool char b) {
23 return a == b;
24 }
25
26 // CHECK-LABEL: @bi16(
27 // CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16
28 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16
29 // CHECK-NEXT: store <8 x i16> [[A:%.*]], ptr [[A_ADDR]], align 16
30 // CHECK-NEXT: store <8 x i16> [[B:%.*]], ptr [[B_ADDR]], align 16
31 // CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR]], align 16
32 // CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr [[B_ADDR]], align 16
33 // CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]
34 // CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16>
35 // CHECK-NEXT: ret <8 x i16> [[SEXT]]
36 //
37 // ERROR: returning 'int' from a function with incompatible result type
bi16(vector bool short a,vector bool short b)38 vector bool short bi16(vector bool short a, vector bool short b) {
39 return a == b;
40 }
41
42 // CHECK-LABEL: @bi32(
43 // CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16
44 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16
45 // CHECK-NEXT: store <4 x i32> [[A:%.*]], ptr [[A_ADDR]], align 16
46 // CHECK-NEXT: store <4 x i32> [[B:%.*]], ptr [[B_ADDR]], align 16
47 // CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[A_ADDR]], align 16
48 // CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[B_ADDR]], align 16
49 // CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]]
50 // CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
51 // CHECK-NEXT: ret <4 x i32> [[SEXT]]
52 //
53 // ERROR: returning 'int' from a function with incompatible result type
bi32(vector bool int a,vector bool int b)54 vector bool int bi32(vector bool int a, vector bool int b) {
55 return a == b;
56 }
57
58 // CHECK-LABEL: @bi64(
59 // CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16
60 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16
61 // CHECK-NEXT: store <2 x i64> [[A:%.*]], ptr [[A_ADDR]], align 16
62 // CHECK-NEXT: store <2 x i64> [[B:%.*]], ptr [[B_ADDR]], align 16
63 // CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, ptr [[A_ADDR]], align 16
64 // CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr [[B_ADDR]], align 16
65 // CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[TMP0]], [[TMP1]]
66 // CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
67 // CHECK-NEXT: ret <2 x i64> [[SEXT]]
68 //
69 // ERROR: returning 'int' from a function with incompatible result type
bi64(vector bool long long a,vector bool long long b)70 vector long long bi64(vector bool long long a, vector bool long long b) {
71 return a == b;
72 }
73
74 // CHECK-LABEL: @VecPixel(
75 // CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16
76 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16
77 // CHECK-NEXT: store <8 x i16> [[A:%.*]], ptr [[A_ADDR]], align 16
78 // CHECK-NEXT: store <8 x i16> [[B:%.*]], ptr [[B_ADDR]], align 16
79 // CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, ptr [[A_ADDR]], align 16
80 // CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, ptr [[B_ADDR]], align 16
81 // CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]]
82 // CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16>
83 // CHECK-NEXT: ret <8 x i16> [[SEXT]]
84 //
85 // ERROR: returning 'int' from a function with incompatible result type
VecPixel(vector pixel a,vector pixel b)86 vector pixel VecPixel(vector pixel a, vector pixel b) {
87 return a == b;
88 }
89