1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 2 // REQUIRES: aarch64-registered-target 3 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 4 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 7 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s 8 // RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -o /dev/null %s 9 10 #include <arm_sve.h> 11 12 #if defined __ARM_FEATURE_SME 13 #define MODE_ATTR __arm_streaming 14 #else 15 #define MODE_ATTR 16 #endif 17 18 #ifdef SVE_OVERLOADED_FORMS 19 // A simple used,unused... macro, long enough to represent any SVE builtin. 20 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 21 #else 22 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 23 #endif 24 25 // CHECK-LABEL: @test_svwhilelt_b8_s32( 26 // CHECK-NEXT: entry: 27 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 28 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 29 // 30 // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_s32ii( 31 // CPP-CHECK-NEXT: entry: 32 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 33 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 34 // 35 svbool_t test_svwhilelt_b8_s32(int32_t op1, int32_t op2) MODE_ATTR 36 { 37 return SVE_ACLE_FUNC(svwhilelt_b8,_s32,,)(op1, op2); 38 } 39 40 // CHECK-LABEL: @test_svwhilelt_b16_s32( 41 // CHECK-NEXT: entry: 42 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 43 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 44 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 45 // 46 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_s32ii( 47 // CPP-CHECK-NEXT: entry: 48 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 49 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 50 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 51 // 52 svbool_t test_svwhilelt_b16_s32(int32_t op1, int32_t op2) MODE_ATTR 53 { 54 return SVE_ACLE_FUNC(svwhilelt_b16,_s32,,)(op1, op2); 55 } 56 57 // CHECK-LABEL: @test_svwhilelt_b32_s32( 58 // CHECK-NEXT: entry: 59 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 60 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 61 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 62 // 63 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_s32ii( 64 // CPP-CHECK-NEXT: entry: 65 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 66 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 67 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 68 // 69 svbool_t test_svwhilelt_b32_s32(int32_t op1, int32_t op2) MODE_ATTR 70 { 71 return SVE_ACLE_FUNC(svwhilelt_b32,_s32,,)(op1, op2); 72 } 73 74 // CHECK-LABEL: @test_svwhilelt_b64_s32( 75 // CHECK-NEXT: entry: 76 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 77 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 78 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 79 // 80 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_s32ii( 81 // CPP-CHECK-NEXT: entry: 82 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 83 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 84 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 85 // 86 svbool_t test_svwhilelt_b64_s32(int32_t op1, int32_t op2) MODE_ATTR 87 { 88 return SVE_ACLE_FUNC(svwhilelt_b64,_s32,,)(op1, op2); 89 } 90 91 // CHECK-LABEL: @test_svwhilelt_b8_u32( 92 // CHECK-NEXT: entry: 93 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 94 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 95 // 96 // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_u32jj( 97 // CPP-CHECK-NEXT: entry: 98 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 99 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 100 // 101 svbool_t test_svwhilelt_b8_u32(uint32_t op1, uint32_t op2) MODE_ATTR 102 { 103 return SVE_ACLE_FUNC(svwhilelt_b8,_u32,,)(op1, op2); 104 } 105 106 // CHECK-LABEL: @test_svwhilelt_b16_u32( 107 // CHECK-NEXT: entry: 108 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 109 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 110 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 111 // 112 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_u32jj( 113 // CPP-CHECK-NEXT: entry: 114 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 115 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 116 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 117 // 118 svbool_t test_svwhilelt_b16_u32(uint32_t op1, uint32_t op2) MODE_ATTR 119 { 120 return SVE_ACLE_FUNC(svwhilelt_b16,_u32,,)(op1, op2); 121 } 122 123 // CHECK-LABEL: @test_svwhilelt_b32_u32( 124 // CHECK-NEXT: entry: 125 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 126 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 127 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 128 // 129 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_u32jj( 130 // CPP-CHECK-NEXT: entry: 131 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 132 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 133 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 134 // 135 svbool_t test_svwhilelt_b32_u32(uint32_t op1, uint32_t op2) MODE_ATTR 136 { 137 return SVE_ACLE_FUNC(svwhilelt_b32,_u32,,)(op1, op2); 138 } 139 140 // CHECK-LABEL: @test_svwhilelt_b64_u32( 141 // CHECK-NEXT: entry: 142 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 143 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 144 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 145 // 146 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_u32jj( 147 // CPP-CHECK-NEXT: entry: 148 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) 149 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 150 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 151 // 152 svbool_t test_svwhilelt_b64_u32(uint32_t op1, uint32_t op2) MODE_ATTR 153 { 154 return SVE_ACLE_FUNC(svwhilelt_b64,_u32,,)(op1, op2); 155 } 156 157 // CHECK-LABEL: @test_svwhilelt_b8_s64( 158 // CHECK-NEXT: entry: 159 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 160 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 161 // 162 // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_s64ll( 163 // CPP-CHECK-NEXT: entry: 164 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 165 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 166 // 167 svbool_t test_svwhilelt_b8_s64(int64_t op1, int64_t op2) MODE_ATTR 168 { 169 return SVE_ACLE_FUNC(svwhilelt_b8,_s64,,)(op1, op2); 170 } 171 172 // CHECK-LABEL: @test_svwhilelt_b16_s64( 173 // CHECK-NEXT: entry: 174 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 175 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 176 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 177 // 178 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_s64ll( 179 // CPP-CHECK-NEXT: entry: 180 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 181 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 182 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 183 // 184 svbool_t test_svwhilelt_b16_s64(int64_t op1, int64_t op2) MODE_ATTR 185 { 186 return SVE_ACLE_FUNC(svwhilelt_b16,_s64,,)(op1, op2); 187 } 188 189 // CHECK-LABEL: @test_svwhilelt_b32_s64( 190 // CHECK-NEXT: entry: 191 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 192 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 193 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 194 // 195 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_s64ll( 196 // CPP-CHECK-NEXT: entry: 197 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 198 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 199 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 200 // 201 svbool_t test_svwhilelt_b32_s64(int64_t op1, int64_t op2) MODE_ATTR 202 { 203 return SVE_ACLE_FUNC(svwhilelt_b32,_s64,,)(op1, op2); 204 } 205 206 // CHECK-LABEL: @test_svwhilelt_b64_s64( 207 // CHECK-NEXT: entry: 208 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 209 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 210 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 211 // 212 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_s64ll( 213 // CPP-CHECK-NEXT: entry: 214 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 215 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 216 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 217 // 218 svbool_t test_svwhilelt_b64_s64(int64_t op1, int64_t op2) MODE_ATTR 219 { 220 return SVE_ACLE_FUNC(svwhilelt_b64,_s64,,)(op1, op2); 221 } 222 223 // CHECK-LABEL: @test_svwhilelt_b8_u64( 224 // CHECK-NEXT: entry: 225 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 226 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 227 // 228 // CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_u64mm( 229 // CPP-CHECK-NEXT: entry: 230 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 231 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]] 232 // 233 svbool_t test_svwhilelt_b8_u64(uint64_t op1, uint64_t op2) MODE_ATTR 234 { 235 return SVE_ACLE_FUNC(svwhilelt_b8,_u64,,)(op1, op2); 236 } 237 238 // CHECK-LABEL: @test_svwhilelt_b16_u64( 239 // CHECK-NEXT: entry: 240 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 241 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 242 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 243 // 244 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_u64mm( 245 // CPP-CHECK-NEXT: entry: 246 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 247 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]]) 248 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 249 // 250 svbool_t test_svwhilelt_b16_u64(uint64_t op1, uint64_t op2) MODE_ATTR 251 { 252 return SVE_ACLE_FUNC(svwhilelt_b16,_u64,,)(op1, op2); 253 } 254 255 // CHECK-LABEL: @test_svwhilelt_b32_u64( 256 // CHECK-NEXT: entry: 257 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 258 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 259 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 260 // 261 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_u64mm( 262 // CPP-CHECK-NEXT: entry: 263 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 264 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]]) 265 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 266 // 267 svbool_t test_svwhilelt_b32_u64(uint64_t op1, uint64_t op2) MODE_ATTR 268 { 269 return SVE_ACLE_FUNC(svwhilelt_b32,_u64,,)(op1, op2); 270 } 271 272 // CHECK-LABEL: @test_svwhilelt_b64_u64( 273 // CHECK-NEXT: entry: 274 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 275 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 276 // CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 277 // 278 // CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_u64mm( 279 // CPP-CHECK-NEXT: entry: 280 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) 281 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]]) 282 // CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]] 283 // 284 svbool_t test_svwhilelt_b64_u64(uint64_t op1, uint64_t op2) MODE_ATTR 285 { 286 return SVE_ACLE_FUNC(svwhilelt_b64,_u64,,)(op1, op2); 287 } 288