1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 2 // REQUIRES: aarch64-registered-target 3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 4 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 6 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 7 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 8 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 9 10 #include <arm_sve.h> 11 12 #if defined __ARM_FEATURE_SME 13 #define MODE_ATTR __arm_streaming 14 #else 15 #define MODE_ATTR 16 #endif 17 18 #ifdef SVE_OVERLOADED_FORMS 19 // A simple used,unused... macro, long enough to represent any SVE builtin. 20 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 21 #else 22 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 23 #endif 24 25 // CHECK-LABEL: @test_svrbit_s8_z( 26 // CHECK-NEXT: entry: 27 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 28 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 29 // 30 // CPP-CHECK-LABEL: @_Z16test_svrbit_s8_zu10__SVBool_tu10__SVInt8_t( 31 // CPP-CHECK-NEXT: entry: 32 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 33 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 34 // 35 svint8_t test_svrbit_s8_z(svbool_t pg, svint8_t op) MODE_ATTR 36 { 37 return SVE_ACLE_FUNC(svrbit,_s8,_z,)(pg, op); 38 } 39 40 // CHECK-LABEL: @test_svrbit_s16_z( 41 // CHECK-NEXT: entry: 42 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 43 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 44 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 45 // 46 // CPP-CHECK-LABEL: @_Z17test_svrbit_s16_zu10__SVBool_tu11__SVInt16_t( 47 // CPP-CHECK-NEXT: entry: 48 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 49 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 50 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 51 // 52 svint16_t test_svrbit_s16_z(svbool_t pg, svint16_t op) MODE_ATTR 53 { 54 return SVE_ACLE_FUNC(svrbit,_s16,_z,)(pg, op); 55 } 56 57 // CHECK-LABEL: @test_svrbit_s32_z( 58 // CHECK-NEXT: entry: 59 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 60 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 61 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 62 // 63 // CPP-CHECK-LABEL: @_Z17test_svrbit_s32_zu10__SVBool_tu11__SVInt32_t( 64 // CPP-CHECK-NEXT: entry: 65 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 66 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 67 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 68 // 69 svint32_t test_svrbit_s32_z(svbool_t pg, svint32_t op) MODE_ATTR 70 { 71 return SVE_ACLE_FUNC(svrbit,_s32,_z,)(pg, op); 72 } 73 74 // CHECK-LABEL: @test_svrbit_s64_z( 75 // CHECK-NEXT: entry: 76 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 77 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 78 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 79 // 80 // CPP-CHECK-LABEL: @_Z17test_svrbit_s64_zu10__SVBool_tu11__SVInt64_t( 81 // CPP-CHECK-NEXT: entry: 82 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 83 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 84 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 85 // 86 svint64_t test_svrbit_s64_z(svbool_t pg, svint64_t op) MODE_ATTR 87 { 88 return SVE_ACLE_FUNC(svrbit,_s64,_z,)(pg, op); 89 } 90 91 // CHECK-LABEL: @test_svrbit_u8_z( 92 // CHECK-NEXT: entry: 93 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 94 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 95 // 96 // CPP-CHECK-LABEL: @_Z16test_svrbit_u8_zu10__SVBool_tu11__SVUint8_t( 97 // CPP-CHECK-NEXT: entry: 98 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 99 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 100 // 101 svuint8_t test_svrbit_u8_z(svbool_t pg, svuint8_t op) MODE_ATTR 102 { 103 return SVE_ACLE_FUNC(svrbit,_u8,_z,)(pg, op); 104 } 105 106 // CHECK-LABEL: @test_svrbit_u16_z( 107 // CHECK-NEXT: entry: 108 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 109 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 110 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 111 // 112 // CPP-CHECK-LABEL: @_Z17test_svrbit_u16_zu10__SVBool_tu12__SVUint16_t( 113 // CPP-CHECK-NEXT: entry: 114 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 115 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 116 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 117 // 118 svuint16_t test_svrbit_u16_z(svbool_t pg, svuint16_t op) MODE_ATTR 119 { 120 return SVE_ACLE_FUNC(svrbit,_u16,_z,)(pg, op); 121 } 122 123 // CHECK-LABEL: @test_svrbit_u32_z( 124 // CHECK-NEXT: entry: 125 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 126 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 127 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 128 // 129 // CPP-CHECK-LABEL: @_Z17test_svrbit_u32_zu10__SVBool_tu12__SVUint32_t( 130 // CPP-CHECK-NEXT: entry: 131 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 132 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 133 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 134 // 135 svuint32_t test_svrbit_u32_z(svbool_t pg, svuint32_t op) MODE_ATTR 136 { 137 return SVE_ACLE_FUNC(svrbit,_u32,_z,)(pg, op); 138 } 139 140 // CHECK-LABEL: @test_svrbit_u64_z( 141 // CHECK-NEXT: entry: 142 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 143 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 144 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 145 // 146 // CPP-CHECK-LABEL: @_Z17test_svrbit_u64_zu10__SVBool_tu12__SVUint64_t( 147 // CPP-CHECK-NEXT: entry: 148 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 149 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 150 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 151 // 152 svuint64_t test_svrbit_u64_z(svbool_t pg, svuint64_t op) MODE_ATTR 153 { 154 return SVE_ACLE_FUNC(svrbit,_u64,_z,)(pg, op); 155 } 156 157 // CHECK-LABEL: @test_svrbit_s8_m( 158 // CHECK-NEXT: entry: 159 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 160 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 161 // 162 // CPP-CHECK-LABEL: @_Z16test_svrbit_s8_mu10__SVInt8_tu10__SVBool_tS_( 163 // CPP-CHECK-NEXT: entry: 164 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 165 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 166 // 167 svint8_t test_svrbit_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) MODE_ATTR 168 { 169 return SVE_ACLE_FUNC(svrbit,_s8,_m,)(inactive, pg, op); 170 } 171 172 // CHECK-LABEL: @test_svrbit_s16_m( 173 // CHECK-NEXT: entry: 174 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 175 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 176 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 177 // 178 // CPP-CHECK-LABEL: @_Z17test_svrbit_s16_mu11__SVInt16_tu10__SVBool_tS_( 179 // CPP-CHECK-NEXT: entry: 180 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 181 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 182 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 183 // 184 svint16_t test_svrbit_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) MODE_ATTR 185 { 186 return SVE_ACLE_FUNC(svrbit,_s16,_m,)(inactive, pg, op); 187 } 188 189 // CHECK-LABEL: @test_svrbit_s32_m( 190 // CHECK-NEXT: entry: 191 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 192 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 193 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 194 // 195 // CPP-CHECK-LABEL: @_Z17test_svrbit_s32_mu11__SVInt32_tu10__SVBool_tS_( 196 // CPP-CHECK-NEXT: entry: 197 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 198 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 199 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 200 // 201 svint32_t test_svrbit_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) MODE_ATTR 202 { 203 return SVE_ACLE_FUNC(svrbit,_s32,_m,)(inactive, pg, op); 204 } 205 206 // CHECK-LABEL: @test_svrbit_s64_m( 207 // CHECK-NEXT: entry: 208 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 209 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 210 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 211 // 212 // CPP-CHECK-LABEL: @_Z17test_svrbit_s64_mu11__SVInt64_tu10__SVBool_tS_( 213 // CPP-CHECK-NEXT: entry: 214 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 215 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 216 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 217 // 218 svint64_t test_svrbit_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) MODE_ATTR 219 { 220 return SVE_ACLE_FUNC(svrbit,_s64,_m,)(inactive, pg, op); 221 } 222 223 // CHECK-LABEL: @test_svrbit_u8_m( 224 // CHECK-NEXT: entry: 225 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 226 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 227 // 228 // CPP-CHECK-LABEL: @_Z16test_svrbit_u8_mu11__SVUint8_tu10__SVBool_tS_( 229 // CPP-CHECK-NEXT: entry: 230 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 231 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 232 // 233 svuint8_t test_svrbit_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) MODE_ATTR 234 { 235 return SVE_ACLE_FUNC(svrbit,_u8,_m,)(inactive, pg, op); 236 } 237 238 // CHECK-LABEL: @test_svrbit_u16_m( 239 // CHECK-NEXT: entry: 240 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 241 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 242 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 243 // 244 // CPP-CHECK-LABEL: @_Z17test_svrbit_u16_mu12__SVUint16_tu10__SVBool_tS_( 245 // CPP-CHECK-NEXT: entry: 246 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 247 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 248 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 249 // 250 svuint16_t test_svrbit_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) MODE_ATTR 251 { 252 return SVE_ACLE_FUNC(svrbit,_u16,_m,)(inactive, pg, op); 253 } 254 255 // CHECK-LABEL: @test_svrbit_u32_m( 256 // CHECK-NEXT: entry: 257 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 258 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 259 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 260 // 261 // CPP-CHECK-LABEL: @_Z17test_svrbit_u32_mu12__SVUint32_tu10__SVBool_tS_( 262 // CPP-CHECK-NEXT: entry: 263 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 264 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 265 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 266 // 267 svuint32_t test_svrbit_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) MODE_ATTR 268 { 269 return SVE_ACLE_FUNC(svrbit,_u32,_m,)(inactive, pg, op); 270 } 271 272 // CHECK-LABEL: @test_svrbit_u64_m( 273 // CHECK-NEXT: entry: 274 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 275 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 276 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 277 // 278 // CPP-CHECK-LABEL: @_Z17test_svrbit_u64_mu12__SVUint64_tu10__SVBool_tS_( 279 // CPP-CHECK-NEXT: entry: 280 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 281 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 282 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 283 // 284 svuint64_t test_svrbit_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) MODE_ATTR 285 { 286 return SVE_ACLE_FUNC(svrbit,_u64,_m,)(inactive, pg, op); 287 } 288 289 // CHECK-LABEL: @test_svrbit_s8_x( 290 // CHECK-NEXT: entry: 291 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 292 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 293 // 294 // CPP-CHECK-LABEL: @_Z16test_svrbit_s8_xu10__SVBool_tu10__SVInt8_t( 295 // CPP-CHECK-NEXT: entry: 296 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 297 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 298 // 299 svint8_t test_svrbit_s8_x(svbool_t pg, svint8_t op) MODE_ATTR 300 { 301 return SVE_ACLE_FUNC(svrbit,_s8,_x,)(pg, op); 302 } 303 304 // CHECK-LABEL: @test_svrbit_s16_x( 305 // CHECK-NEXT: entry: 306 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 307 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 308 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 309 // 310 // CPP-CHECK-LABEL: @_Z17test_svrbit_s16_xu10__SVBool_tu11__SVInt16_t( 311 // CPP-CHECK-NEXT: entry: 312 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 313 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 314 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 315 // 316 svint16_t test_svrbit_s16_x(svbool_t pg, svint16_t op) MODE_ATTR 317 { 318 return SVE_ACLE_FUNC(svrbit,_s16,_x,)(pg, op); 319 } 320 321 // CHECK-LABEL: @test_svrbit_s32_x( 322 // CHECK-NEXT: entry: 323 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 324 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 325 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 326 // 327 // CPP-CHECK-LABEL: @_Z17test_svrbit_s32_xu10__SVBool_tu11__SVInt32_t( 328 // CPP-CHECK-NEXT: entry: 329 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 330 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 331 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 332 // 333 svint32_t test_svrbit_s32_x(svbool_t pg, svint32_t op) MODE_ATTR 334 { 335 return SVE_ACLE_FUNC(svrbit,_s32,_x,)(pg, op); 336 } 337 338 // CHECK-LABEL: @test_svrbit_s64_x( 339 // CHECK-NEXT: entry: 340 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 341 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 342 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 343 // 344 // CPP-CHECK-LABEL: @_Z17test_svrbit_s64_xu10__SVBool_tu11__SVInt64_t( 345 // CPP-CHECK-NEXT: entry: 346 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 347 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 348 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 349 // 350 svint64_t test_svrbit_s64_x(svbool_t pg, svint64_t op) MODE_ATTR 351 { 352 return SVE_ACLE_FUNC(svrbit,_s64,_x,)(pg, op); 353 } 354 355 // CHECK-LABEL: @test_svrbit_u8_x( 356 // CHECK-NEXT: entry: 357 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 358 // CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 359 // 360 // CPP-CHECK-LABEL: @_Z16test_svrbit_u8_xu10__SVBool_tu11__SVUint8_t( 361 // CPP-CHECK-NEXT: entry: 362 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.rbit.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]]) 363 // CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] 364 // 365 svuint8_t test_svrbit_u8_x(svbool_t pg, svuint8_t op) MODE_ATTR 366 { 367 return SVE_ACLE_FUNC(svrbit,_u8,_x,)(pg, op); 368 } 369 370 // CHECK-LABEL: @test_svrbit_u16_x( 371 // CHECK-NEXT: entry: 372 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 373 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 374 // CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 375 // 376 // CPP-CHECK-LABEL: @_Z17test_svrbit_u16_xu10__SVBool_tu12__SVUint16_t( 377 // CPP-CHECK-NEXT: entry: 378 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 379 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.rbit.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]]) 380 // CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP1]] 381 // 382 svuint16_t test_svrbit_u16_x(svbool_t pg, svuint16_t op) MODE_ATTR 383 { 384 return SVE_ACLE_FUNC(svrbit,_u16,_x,)(pg, op); 385 } 386 387 // CHECK-LABEL: @test_svrbit_u32_x( 388 // CHECK-NEXT: entry: 389 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 390 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 391 // CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 392 // 393 // CPP-CHECK-LABEL: @_Z17test_svrbit_u32_xu10__SVBool_tu12__SVUint32_t( 394 // CPP-CHECK-NEXT: entry: 395 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]]) 396 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.rbit.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]]) 397 // CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP1]] 398 // 399 svuint32_t test_svrbit_u32_x(svbool_t pg, svuint32_t op) MODE_ATTR 400 { 401 return SVE_ACLE_FUNC(svrbit,_u32,_x,)(pg, op); 402 } 403 404 // CHECK-LABEL: @test_svrbit_u64_x( 405 // CHECK-NEXT: entry: 406 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 407 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 408 // CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 409 // 410 // CPP-CHECK-LABEL: @_Z17test_svrbit_u64_xu10__SVBool_tu12__SVUint64_t( 411 // CPP-CHECK-NEXT: entry: 412 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) 413 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.rbit.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]]) 414 // CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP1]] 415 // 416 svuint64_t test_svrbit_u64_x(svbool_t pg, svuint64_t op) MODE_ATTR 417 { 418 return SVE_ACLE_FUNC(svrbit,_u64,_x,)(pg, op); 419 } 420