1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 2 // REQUIRES: aarch64-registered-target 3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 4 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 5 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 6 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 7 8 #include <arm_sve.h> 9 10 #if defined __ARM_FEATURE_SME 11 #define MODE_ATTR __arm_streaming 12 #else 13 #define MODE_ATTR 14 #endif 15 16 // CHECK-LABEL: @test_svptest_any( 17 // CHECK-NEXT: entry: 18 // CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.any.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]]) 19 // CHECK-NEXT: ret i1 [[TMP0]] 20 // 21 // CPP-CHECK-LABEL: @_Z16test_svptest_anyu10__SVBool_tS_( 22 // CPP-CHECK-NEXT: entry: 23 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.any.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]]) 24 // CPP-CHECK-NEXT: ret i1 [[TMP0]] 25 // 26 bool test_svptest_any(svbool_t pg, svbool_t op) MODE_ATTR 27 { 28 return svptest_any(pg, op); 29 } 30 31 // CHECK-LABEL: @test_svptest_first( 32 // CHECK-NEXT: entry: 33 // CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.first.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]]) 34 // CHECK-NEXT: ret i1 [[TMP0]] 35 // 36 // CPP-CHECK-LABEL: @_Z18test_svptest_firstu10__SVBool_tS_( 37 // CPP-CHECK-NEXT: entry: 38 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.first.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]]) 39 // CPP-CHECK-NEXT: ret i1 [[TMP0]] 40 // 41 bool test_svptest_first(svbool_t pg, svbool_t op) MODE_ATTR 42 { 43 return svptest_first(pg, op); 44 } 45 46 // CHECK-LABEL: @test_svptest_last( 47 // CHECK-NEXT: entry: 48 // CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.last.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]]) 49 // CHECK-NEXT: ret i1 [[TMP0]] 50 // 51 // CPP-CHECK-LABEL: @_Z17test_svptest_lastu10__SVBool_tS_( 52 // CPP-CHECK-NEXT: entry: 53 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.aarch64.sve.ptest.last.nxv16i1(<vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i1> [[OP:%.*]]) 54 // CPP-CHECK-NEXT: ret i1 [[TMP0]] 55 // 56 bool test_svptest_last(svbool_t pg, svbool_t op) MODE_ATTR 57 { 58 return svptest_last(pg, op); 59 } 60