1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 2 // REQUIRES: aarch64-registered-target 3 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 4 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s 6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 7 // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sve -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 8 // RUN: %clang_cc1 -triple aarch64 -target-feature +bf16 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 9 10 #include <arm_sve.h> 11 12 #ifdef SVE_OVERLOADED_FORMS 13 // A simple used,unused... macro, long enough to represent any SVE builtin. 14 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 15 #else 16 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 17 #endif 18 19 #ifdef __ARM_FEATURE_SME 20 #define ATTR __arm_streaming 21 #else 22 #define ATTR 23 #endif 24 25 // CHECK-LABEL: @test_svget2_bf16_0( 26 // CHECK-NEXT: entry: 27 // CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } poison, <vscale x 8 x bfloat> [[TUPLE_COERCE0:%.*]], 0 28 // CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]], <vscale x 8 x bfloat> [[TUPLE_COERCE1:%.*]], 1 29 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP1]], 0 30 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP2]] 31 // 32 // CPP-CHECK-LABEL: @_Z18test_svget2_bf16_014svbfloat16x2_t( 33 // CPP-CHECK-NEXT: entry: 34 // CPP-CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } poison, <vscale x 8 x bfloat> [[TUPLE_COERCE0:%.*]], 0 35 // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]], <vscale x 8 x bfloat> [[TUPLE_COERCE1:%.*]], 1 36 // CPP-CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP1]], 0 37 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP2]] 38 // 39 svbfloat16_t test_svget2_bf16_0(svbfloat16x2_t tuple) ATTR 40 { 41 return SVE_ACLE_FUNC(svget2,_bf16,,)(tuple, 0); 42 } 43 44 // CHECK-LABEL: @test_svget2_bf16_1( 45 // CHECK-NEXT: entry: 46 // CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } poison, <vscale x 8 x bfloat> [[TUPLE_COERCE0:%.*]], 0 47 // CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]], <vscale x 8 x bfloat> [[TUPLE_COERCE1:%.*]], 1 48 // CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP1]], 1 49 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP2]] 50 // 51 // CPP-CHECK-LABEL: @_Z18test_svget2_bf16_114svbfloat16x2_t( 52 // CPP-CHECK-NEXT: entry: 53 // CPP-CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } poison, <vscale x 8 x bfloat> [[TUPLE_COERCE0:%.*]], 0 54 // CPP-CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP0]], <vscale x 8 x bfloat> [[TUPLE_COERCE1:%.*]], 1 55 // CPP-CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <vscale x 8 x bfloat>, <vscale x 8 x bfloat> } [[TMP1]], 1 56 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP2]] 57 // 58 svbfloat16_t test_svget2_bf16_1(svbfloat16x2_t tuple) ATTR 59 { 60 return SVE_ACLE_FUNC(svget2,_bf16,,)(tuple, 1); 61 } 62