1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 2 // REQUIRES: aarch64-registered-target 3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s 4 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s 6 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK 7 8 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 9 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s 10 11 #include <arm_sve.h> 12 13 #if defined __ARM_FEATURE_SME 14 #define MODE_ATTR __arm_streaming 15 #else 16 #define MODE_ATTR 17 #endif 18 19 #ifdef SVE_OVERLOADED_FORMS 20 // A simple used,unused... macro, long enough to represent any SVE builtin. 21 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3 22 #else 23 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 24 #endif 25 26 // CHECK-LABEL: @test_svdup_n_bf16( 27 // CHECK-NEXT: entry: 28 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x bfloat> poison, bfloat [[OP:%.*]], i64 0 29 // CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x bfloat> [[DOTSPLATINSERT]], <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer 30 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]] 31 // 32 // CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16( 33 // CPP-CHECK-NEXT: entry: 34 // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x bfloat> poison, bfloat [[OP:%.*]], i64 0 35 // CPP-CHECK-NEXT: [[TMP0:%.*]] = shufflevector <vscale x 8 x bfloat> [[DOTSPLATINSERT]], <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer 36 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]] 37 // 38 svbfloat16_t test_svdup_n_bf16(bfloat16_t op) MODE_ATTR { 39 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16'}} 40 return SVE_ACLE_FUNC(svdup, _n, _bf16, )(op); 41 } 42 43 // CHECK-LABEL: @test_svdup_n_bf16_z( 44 // CHECK-NEXT: entry: 45 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 46 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]]) 47 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]] 48 // 49 // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16( 50 // CPP-CHECK-NEXT: entry: 51 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 52 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]]) 53 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]] 54 // 55 svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) MODE_ATTR { 56 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_z'}} 57 return SVE_ACLE_FUNC(svdup, _n, _bf16_z, )(pg, op); 58 } 59 60 // CHECK-LABEL: @test_svdup_n_bf16_m( 61 // CHECK-NEXT: entry: 62 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 63 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]]) 64 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]] 65 // 66 // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBfloat16_tu10__SVBool_tu6__bf16( 67 // CPP-CHECK-NEXT: entry: 68 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 69 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]]) 70 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]] 71 // 72 svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) MODE_ATTR { 73 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_m'}} 74 return SVE_ACLE_FUNC(svdup, _n, _bf16_m, )(inactive, pg, op); 75 } 76 77 // CHECK-LABEL: @test_svdup_n_bf16_x( 78 // CHECK-NEXT: entry: 79 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 80 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]]) 81 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]] 82 // 83 // CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16( 84 // CPP-CHECK-NEXT: entry: 85 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]]) 86 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], bfloat [[OP:%.*]]) 87 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]] 88 // 89 svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) MODE_ATTR { 90 // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}} 91 return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op); 92 } 93 94 // CHECK-LABEL: @test_svdup_lane_bf16( 95 // CHECK-NEXT: entry: 96 // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0 97 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer 98 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]]) 99 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]] 100 // 101 // CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBfloat16_tt( 102 // CPP-CHECK-NEXT: entry: 103 // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[INDEX:%.*]], i64 0 104 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[DOTSPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer 105 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> [[DATA:%.*]], <vscale x 8 x i16> [[DOTSPLAT]]) 106 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]] 107 // 108 svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index) MODE_ATTR 109 { 110 // expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}} 111 return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index); 112 } 113