xref: /llvm-project/clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_abs.c (revision 207e5ccceec8d3cc3f32723e78f2a142bc61b07d)
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
4 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
6 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
7 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
8 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
9 
10 #include <arm_sve.h>
11 
12 #if defined __ARM_FEATURE_SME
13 #define MODE_ATTR __arm_streaming
14 #else
15 #define MODE_ATTR
16 #endif
17 
18 #ifdef SVE_OVERLOADED_FORMS
19 // A simple used,unused... macro, long enough to represent any SVE builtin.
20 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
21 #else
22 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
23 #endif
24 
25 // CHECK-LABEL: @test_svabs_s8_z(
26 // CHECK-NEXT:  entry:
27 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
28 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
29 //
30 // CPP-CHECK-LABEL: @_Z15test_svabs_s8_zu10__SVBool_tu10__SVInt8_t(
31 // CPP-CHECK-NEXT:  entry:
32 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
33 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
34 //
35 svint8_t test_svabs_s8_z(svbool_t pg, svint8_t op) MODE_ATTR
36 {
37   return SVE_ACLE_FUNC(svabs,_s8,_z,)(pg, op);
38 }
39 
40 // CHECK-LABEL: @test_svabs_s16_z(
41 // CHECK-NEXT:  entry:
42 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
43 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.abs.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
44 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
45 //
46 // CPP-CHECK-LABEL: @_Z16test_svabs_s16_zu10__SVBool_tu11__SVInt16_t(
47 // CPP-CHECK-NEXT:  entry:
48 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
49 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.abs.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
50 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
51 //
52 svint16_t test_svabs_s16_z(svbool_t pg, svint16_t op) MODE_ATTR
53 {
54   return SVE_ACLE_FUNC(svabs,_s16,_z,)(pg, op);
55 }
56 
57 // CHECK-LABEL: @test_svabs_s32_z(
58 // CHECK-NEXT:  entry:
59 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
60 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.abs.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
61 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
62 //
63 // CPP-CHECK-LABEL: @_Z16test_svabs_s32_zu10__SVBool_tu11__SVInt32_t(
64 // CPP-CHECK-NEXT:  entry:
65 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
66 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.abs.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
67 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
68 //
69 svint32_t test_svabs_s32_z(svbool_t pg, svint32_t op) MODE_ATTR
70 {
71   return SVE_ACLE_FUNC(svabs,_s32,_z,)(pg, op);
72 }
73 
74 // CHECK-LABEL: @test_svabs_s64_z(
75 // CHECK-NEXT:  entry:
76 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
77 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.abs.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
78 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
79 //
80 // CPP-CHECK-LABEL: @_Z16test_svabs_s64_zu10__SVBool_tu11__SVInt64_t(
81 // CPP-CHECK-NEXT:  entry:
82 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
83 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.abs.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
84 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
85 //
86 svint64_t test_svabs_s64_z(svbool_t pg, svint64_t op) MODE_ATTR
87 {
88   return SVE_ACLE_FUNC(svabs,_s64,_z,)(pg, op);
89 }
90 
91 // CHECK-LABEL: @test_svabs_s8_m(
92 // CHECK-NEXT:  entry:
93 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
94 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
95 //
96 // CPP-CHECK-LABEL: @_Z15test_svabs_s8_mu10__SVInt8_tu10__SVBool_tS_(
97 // CPP-CHECK-NEXT:  entry:
98 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
99 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
100 //
101 svint8_t test_svabs_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) MODE_ATTR
102 {
103   return SVE_ACLE_FUNC(svabs,_s8,_m,)(inactive, pg, op);
104 }
105 
106 // CHECK-LABEL: @test_svabs_s16_m(
107 // CHECK-NEXT:  entry:
108 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
109 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.abs.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
110 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
111 //
112 // CPP-CHECK-LABEL: @_Z16test_svabs_s16_mu11__SVInt16_tu10__SVBool_tS_(
113 // CPP-CHECK-NEXT:  entry:
114 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
115 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.abs.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
116 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
117 //
118 svint16_t test_svabs_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) MODE_ATTR
119 {
120   return SVE_ACLE_FUNC(svabs,_s16,_m,)(inactive, pg, op);
121 }
122 
123 // CHECK-LABEL: @test_svabs_s32_m(
124 // CHECK-NEXT:  entry:
125 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
126 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.abs.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
127 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
128 //
129 // CPP-CHECK-LABEL: @_Z16test_svabs_s32_mu11__SVInt32_tu10__SVBool_tS_(
130 // CPP-CHECK-NEXT:  entry:
131 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
132 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.abs.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
133 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
134 //
135 svint32_t test_svabs_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) MODE_ATTR
136 {
137   return SVE_ACLE_FUNC(svabs,_s32,_m,)(inactive, pg, op);
138 }
139 
140 // CHECK-LABEL: @test_svabs_s64_m(
141 // CHECK-NEXT:  entry:
142 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
143 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.abs.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
144 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
145 //
146 // CPP-CHECK-LABEL: @_Z16test_svabs_s64_mu11__SVInt64_tu10__SVBool_tS_(
147 // CPP-CHECK-NEXT:  entry:
148 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
149 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.abs.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
150 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
151 //
152 svint64_t test_svabs_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) MODE_ATTR
153 {
154   return SVE_ACLE_FUNC(svabs,_s64,_m,)(inactive, pg, op);
155 }
156 
157 // CHECK-LABEL: @test_svabs_s8_x(
158 // CHECK-NEXT:  entry:
159 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
160 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
161 //
162 // CPP-CHECK-LABEL: @_Z15test_svabs_s8_xu10__SVBool_tu10__SVInt8_t(
163 // CPP-CHECK-NEXT:  entry:
164 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.abs.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
165 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
166 //
167 svint8_t test_svabs_s8_x(svbool_t pg, svint8_t op) MODE_ATTR
168 {
169   return SVE_ACLE_FUNC(svabs,_s8,_x,)(pg, op);
170 }
171 
172 // CHECK-LABEL: @test_svabs_s16_x(
173 // CHECK-NEXT:  entry:
174 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
175 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.abs.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
176 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
177 //
178 // CPP-CHECK-LABEL: @_Z16test_svabs_s16_xu10__SVBool_tu11__SVInt16_t(
179 // CPP-CHECK-NEXT:  entry:
180 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
181 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.abs.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
182 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
183 //
184 svint16_t test_svabs_s16_x(svbool_t pg, svint16_t op) MODE_ATTR
185 {
186   return SVE_ACLE_FUNC(svabs,_s16,_x,)(pg, op);
187 }
188 
189 // CHECK-LABEL: @test_svabs_s32_x(
190 // CHECK-NEXT:  entry:
191 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
192 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.abs.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
193 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
194 //
195 // CPP-CHECK-LABEL: @_Z16test_svabs_s32_xu10__SVBool_tu11__SVInt32_t(
196 // CPP-CHECK-NEXT:  entry:
197 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
198 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.abs.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
199 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
200 //
201 svint32_t test_svabs_s32_x(svbool_t pg, svint32_t op) MODE_ATTR
202 {
203   return SVE_ACLE_FUNC(svabs,_s32,_x,)(pg, op);
204 }
205 
206 // CHECK-LABEL: @test_svabs_s64_x(
207 // CHECK-NEXT:  entry:
208 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
209 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.abs.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
210 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
211 //
212 // CPP-CHECK-LABEL: @_Z16test_svabs_s64_xu10__SVBool_tu11__SVInt64_t(
213 // CPP-CHECK-NEXT:  entry:
214 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
215 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.abs.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
216 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
217 //
218 svint64_t test_svabs_s64_x(svbool_t pg, svint64_t op) MODE_ATTR
219 {
220   return SVE_ACLE_FUNC(svabs,_s64,_x,)(pg, op);
221 }
222 
223 // CHECK-LABEL: @test_svabs_f16_z(
224 // CHECK-NEXT:  entry:
225 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
226 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
227 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
228 //
229 // CPP-CHECK-LABEL: @_Z16test_svabs_f16_zu10__SVBool_tu13__SVFloat16_t(
230 // CPP-CHECK-NEXT:  entry:
231 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
232 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
233 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
234 //
235 svfloat16_t test_svabs_f16_z(svbool_t pg, svfloat16_t op) MODE_ATTR
236 {
237   return SVE_ACLE_FUNC(svabs,_f16,_z,)(pg, op);
238 }
239 
240 // CHECK-LABEL: @test_svabs_f32_z(
241 // CHECK-NEXT:  entry:
242 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
243 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
244 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
245 //
246 // CPP-CHECK-LABEL: @_Z16test_svabs_f32_zu10__SVBool_tu13__SVFloat32_t(
247 // CPP-CHECK-NEXT:  entry:
248 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
249 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
250 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
251 //
252 svfloat32_t test_svabs_f32_z(svbool_t pg, svfloat32_t op) MODE_ATTR
253 {
254   return SVE_ACLE_FUNC(svabs,_f32,_z,)(pg, op);
255 }
256 
257 // CHECK-LABEL: @test_svabs_f64_z(
258 // CHECK-NEXT:  entry:
259 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
260 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
261 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
262 //
263 // CPP-CHECK-LABEL: @_Z16test_svabs_f64_zu10__SVBool_tu13__SVFloat64_t(
264 // CPP-CHECK-NEXT:  entry:
265 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
266 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
267 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
268 //
269 svfloat64_t test_svabs_f64_z(svbool_t pg, svfloat64_t op) MODE_ATTR
270 {
271   return SVE_ACLE_FUNC(svabs,_f64,_z,)(pg, op);
272 }
273 
274 // CHECK-LABEL: @test_svabs_f16_m(
275 // CHECK-NEXT:  entry:
276 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
277 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
278 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
279 //
280 // CPP-CHECK-LABEL: @_Z16test_svabs_f16_mu13__SVFloat16_tu10__SVBool_tS_(
281 // CPP-CHECK-NEXT:  entry:
282 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
283 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
284 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
285 //
286 svfloat16_t test_svabs_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) MODE_ATTR
287 {
288   return SVE_ACLE_FUNC(svabs,_f16,_m,)(inactive, pg, op);
289 }
290 
291 // CHECK-LABEL: @test_svabs_f32_m(
292 // CHECK-NEXT:  entry:
293 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
294 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
295 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
296 //
297 // CPP-CHECK-LABEL: @_Z16test_svabs_f32_mu13__SVFloat32_tu10__SVBool_tS_(
298 // CPP-CHECK-NEXT:  entry:
299 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
300 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
301 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
302 //
303 svfloat32_t test_svabs_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) MODE_ATTR
304 {
305   return SVE_ACLE_FUNC(svabs,_f32,_m,)(inactive, pg, op);
306 }
307 
308 // CHECK-LABEL: @test_svabs_f64_m(
309 // CHECK-NEXT:  entry:
310 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
311 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
312 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
313 //
314 // CPP-CHECK-LABEL: @_Z16test_svabs_f64_mu13__SVFloat64_tu10__SVBool_tS_(
315 // CPP-CHECK-NEXT:  entry:
316 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
317 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
318 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
319 //
320 svfloat64_t test_svabs_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) MODE_ATTR
321 {
322   return SVE_ACLE_FUNC(svabs,_f64,_m,)(inactive, pg, op);
323 }
324 
325 // CHECK-LABEL: @test_svabs_f16_x(
326 // CHECK-NEXT:  entry:
327 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
328 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
329 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
330 //
331 // CPP-CHECK-LABEL: @_Z16test_svabs_f16_xu10__SVBool_tu13__SVFloat16_t(
332 // CPP-CHECK-NEXT:  entry:
333 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
334 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
335 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
336 //
337 svfloat16_t test_svabs_f16_x(svbool_t pg, svfloat16_t op) MODE_ATTR
338 {
339   return SVE_ACLE_FUNC(svabs,_f16,_x,)(pg, op);
340 }
341 
342 // CHECK-LABEL: @test_svabs_f32_x(
343 // CHECK-NEXT:  entry:
344 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
345 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
346 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
347 //
348 // CPP-CHECK-LABEL: @_Z16test_svabs_f32_xu10__SVBool_tu13__SVFloat32_t(
349 // CPP-CHECK-NEXT:  entry:
350 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
351 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
352 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
353 //
354 svfloat32_t test_svabs_f32_x(svbool_t pg, svfloat32_t op) MODE_ATTR
355 {
356   return SVE_ACLE_FUNC(svabs,_f32,_x,)(pg, op);
357 }
358 
359 // CHECK-LABEL: @test_svabs_f64_x(
360 // CHECK-NEXT:  entry:
361 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
362 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
363 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
364 //
365 // CPP-CHECK-LABEL: @_Z16test_svabs_f64_xu10__SVBool_tu13__SVFloat64_t(
366 // CPP-CHECK-NEXT:  entry:
367 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
368 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
369 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
370 //
371 svfloat64_t test_svabs_f64_x(svbool_t pg, svfloat64_t op) MODE_ATTR
372 {
373   return SVE_ACLE_FUNC(svabs,_f64,_x,)(pg, op);
374 }
375