1 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \ 2 // RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg,dce \ 3 // RUN: | FileCheck %s 4 5 // REQUIRES: aarch64-registered-target || arm-registered-target 6 7 #include <arm_neon.h> 8 9 // Check float conversion is accepted for int argument 10 uint8_t test_vsqaddb_u8(){ 11 return vsqaddb_u8(1, -1.0f); 12 } 13 14 uint16_t test_vsqaddh_u16() { 15 return vsqaddh_u16(1, -1.0f); 16 } 17 18 uint32_t test_vsqadds_u32() { 19 return vsqadds_u32(1, -1.0f); 20 } 21 22 uint64_t test_vsqaddd_u64() { 23 return vsqaddd_u64(1, -1.0f); 24 } 25 26 // CHECK-LABEL: @test_vsqaddb_u8() 27 // CHECK: entry: 28 // CHECK-NEXT: [[T0:%.*]] = insertelement <8 x i8> poison, i8 1, i64 0 29 // CHECK-NEXT: [[T1:%.*]] = insertelement <8 x i8> poison, i8 -1, i64 0 30 // CHECK-NEXT: [[V:%.*]] = call <8 x i8> @llvm.aarch64.neon.usqadd.v8i8(<8 x i8> [[T0]], <8 x i8> [[T1]]) 31 // CHECK-NEXT: [[R:%.*]] = extractelement <8 x i8> [[V]], i64 0 32 // CHECK-NEXT: ret i8 [[R]] 33 34 // CHECK-LABEL: @test_vsqaddh_u16() 35 // CHECK: entry: 36 // CHECK-NEXT: [[T0:%.*]] = insertelement <4 x i16> poison, i16 1, i64 0 37 // CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i16> poison, i16 -1, i64 0 38 // CHECK-NEXT: [[V:%.*]] = call <4 x i16> @llvm.aarch64.neon.usqadd.v4i16(<4 x i16> [[T0]], <4 x i16> [[T1]]) 39 // CHECK-NEXT: [[R:%.*]] = extractelement <4 x i16> [[V]], i64 0 40 // CHECK-NEXT: ret i16 [[R]] 41 42 // CHECK-LABEL: @test_vsqadds_u32() 43 // CHECK: entry: 44 // CHECK-NEXT: [[V:%.*]] = call i32 @llvm.aarch64.neon.usqadd.i32(i32 1, i32 -1) 45 // CHECK-NEXT: ret i32 [[V]] 46 47 // CHECK-LABEL: @test_vsqaddd_u64() 48 // CHECK: entry: 49 // CHECK-NEXT: [[V:%.*]] = call i64 @llvm.aarch64.neon.usqadd.i64(i64 1, i64 -1) 50 // CHECK-NEXT: ret i64 [[V]] 51 52