1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2016 The FreeBSD Foundation 5 * Copyright (c) 2019 Colin Percival 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 34 #include <machine/bus.h> 35 36 #include <dev/pci/pcireg.h> 37 38 #include <dev/uart/uart.h> 39 #include <dev/uart/uart_bus.h> 40 #include <dev/uart/uart_cpu.h> 41 #include <dev/uart/uart_cpu_acpi.h> 42 43 #include <contrib/dev/acpica/include/acpi.h> 44 #include <contrib/dev/acpica/include/accommon.h> 45 #include <contrib/dev/acpica/include/actables.h> 46 47 static struct acpi_uart_compat_data * 48 uart_cpu_acpi_scan(uint8_t interface_type) 49 { 50 struct acpi_uart_compat_data **cd, *curcd; 51 int i; 52 53 SET_FOREACH(cd, uart_acpi_class_and_device_set) { 54 curcd = *cd; 55 for (i = 0; curcd[i].cd_hid != NULL; i++) { 56 if (curcd[i].cd_port_subtype == interface_type) 57 return (&curcd[i]); 58 } 59 } 60 61 SET_FOREACH(cd, uart_acpi_class_set) { 62 curcd = *cd; 63 for (i = 0; curcd[i].cd_hid != NULL; i++) { 64 if (curcd[i].cd_port_subtype == interface_type) 65 return (&curcd[i]); 66 } 67 } 68 69 return (NULL); 70 } 71 72 static int 73 uart_cpu_acpi_init_devinfo(struct uart_devinfo *di, struct uart_class *class, 74 ACPI_GENERIC_ADDRESS *addr) 75 { 76 /* Fill in some fixed details. */ 77 di->bas.chan = 0; 78 di->bas.rclk = 0; 79 di->databits = 8; 80 di->stopbits = 1; 81 di->parity = UART_PARITY_NONE; 82 di->ops = uart_getops(class); 83 84 /* Fill in details from SPCR table. */ 85 switch (addr->SpaceId) { 86 case 0: 87 di->bas.bst = uart_bus_space_mem; 88 break; 89 case 1: 90 di->bas.bst = uart_bus_space_io; 91 break; 92 default: 93 printf("UART in unrecognized address space: %d!\n", 94 (int)addr->SpaceId); 95 return (ENXIO); 96 } 97 switch (addr->AccessWidth) { 98 case 0: /* EFI_ACPI_6_0_UNDEFINED */ 99 /* FALLTHROUGH */ 100 case 1: /* EFI_ACPI_6_0_BYTE */ 101 di->bas.regiowidth = 1; 102 break; 103 case 2: /* EFI_ACPI_6_0_WORD */ 104 di->bas.regiowidth = 2; 105 break; 106 case 3: /* EFI_ACPI_6_0_DWORD */ 107 di->bas.regiowidth = 4; 108 break; 109 case 4: /* EFI_ACPI_6_0_QWORD */ 110 di->bas.regiowidth = 8; 111 break; 112 default: 113 printf("UART unsupported access width: %d!\n", 114 (int)addr->AccessWidth); 115 return (ENXIO); 116 } 117 switch (addr->BitWidth) { 118 case 0: 119 /* FALLTHROUGH */ 120 case 8: 121 di->bas.regshft = 0; 122 break; 123 case 16: 124 di->bas.regshft = 1; 125 break; 126 case 32: 127 di->bas.regshft = 2; 128 break; 129 case 64: 130 di->bas.regshft = 3; 131 break; 132 default: 133 printf("UART unsupported bit width: %d!\n", 134 (int)addr->BitWidth); 135 return (ENXIO); 136 } 137 138 return (0); 139 } 140 141 static int 142 uart_cpu_acpi_spcr(int devtype, struct uart_devinfo *di) 143 { 144 vm_paddr_t spcr_physaddr; 145 ACPI_TABLE_SPCR *spcr; 146 struct acpi_uart_compat_data *cd; 147 struct uart_class *class; 148 int error = ENXIO; 149 150 /* Look for the SPCR table. */ 151 spcr_physaddr = acpi_find_table(ACPI_SIG_SPCR); 152 if (spcr_physaddr == 0) 153 return (error); 154 spcr = acpi_map_table(spcr_physaddr, ACPI_SIG_SPCR); 155 if (spcr == NULL) { 156 printf("Unable to map the SPCR table!\n"); 157 return (error); 158 } 159 160 /* Search for information about this SPCR interface type. */ 161 cd = uart_cpu_acpi_scan(spcr->InterfaceType); 162 if (cd == NULL) 163 goto out; 164 class = cd->cd_class; 165 166 error = uart_cpu_acpi_init_devinfo(di, class, &spcr->SerialPort); 167 if (error != 0) 168 goto out; 169 170 /* 171 * SPCR Rev 4 and newer allow a precise baudrate to be passed in for 172 * things like 1.5M or 2.0M. If we have that, then use that value, 173 * otherwise try to decode the older enumeration. 174 */ 175 if (spcr->Header.Revision >= 4 && spcr->PreciseBaudrate != 0) { 176 di->baudrate = spcr->PreciseBaudrate; 177 } else { 178 switch (spcr->BaudRate) { 179 case 0: 180 /* Special value; means "keep current value unchanged". */ 181 di->baudrate = 0; 182 break; 183 case 3: 184 di->baudrate = 9600; 185 break; 186 case 4: 187 di->baudrate = 19200; 188 break; 189 case 6: 190 di->baudrate = 57600; 191 break; 192 case 7: 193 di->baudrate = 115200; 194 break; 195 default: 196 printf("SPCR has reserved BaudRate value: %d!\n", 197 (int)spcr->BaudRate); 198 goto out; 199 } 200 } 201 202 /* 203 * Rev 3 and newer can specify a rclk, use it if it's there. It's 204 * defined to be 0 when it's not known, and we've initialized rclk to 0 205 * in uart_cpu_acpi_init_devinfo, so we don't have to test for it. 206 */ 207 if (spcr->Header.Revision >= 3) 208 di->bas.rclk = spcr->UartClkFreq; 209 210 /* 211 * If no rclk is set, then we will assume the BIOS has configured the 212 * hardware at the stated baudrate, so we can use it to guess the rclk 213 * relatively accurately, so make a note for later. 214 */ 215 if (di->bas.rclk == 0) 216 di->bas.rclk_guess = 1; 217 218 if (spcr->PciVendorId != PCIV_INVALID && 219 spcr->PciDeviceId != PCIV_INVALID) { 220 di->pci_info.vendor = spcr->PciVendorId; 221 di->pci_info.device = spcr->PciDeviceId; 222 } 223 224 /* Create a bus space handle. */ 225 error = bus_space_map(di->bas.bst, spcr->SerialPort.Address, 226 uart_getrange(class), 0, &di->bas.bsh); 227 228 out: 229 acpi_unmap_table(spcr); 230 return (error); 231 } 232 233 static int 234 uart_cpu_acpi_dbg2(struct uart_devinfo *di) 235 { 236 vm_paddr_t dbg2_physaddr; 237 ACPI_TABLE_DBG2 *dbg2; 238 ACPI_DBG2_DEVICE *dbg2_dev; 239 ACPI_GENERIC_ADDRESS *base_address; 240 struct acpi_uart_compat_data *cd; 241 struct uart_class *class; 242 int error; 243 bool found; 244 245 /* Look for the DBG2 table. */ 246 dbg2_physaddr = acpi_find_table(ACPI_SIG_DBG2); 247 if (dbg2_physaddr == 0) 248 return (ENXIO); 249 250 dbg2 = acpi_map_table(dbg2_physaddr, ACPI_SIG_DBG2); 251 if (dbg2 == NULL) { 252 printf("Unable to map the DBG2 table!\n"); 253 return (ENXIO); 254 } 255 256 error = ENXIO; 257 258 dbg2_dev = (ACPI_DBG2_DEVICE *)((uintptr_t)dbg2 + dbg2->InfoOffset); 259 found = false; 260 while ((uintptr_t)dbg2_dev + dbg2_dev->Length <= 261 (uintptr_t)dbg2 + dbg2->Header.Length) { 262 if (dbg2_dev->PortType != ACPI_DBG2_SERIAL_PORT) 263 goto next; 264 265 /* XXX: Too restrictive? */ 266 if (dbg2_dev->RegisterCount != 1) 267 goto next; 268 269 cd = uart_cpu_acpi_scan(dbg2_dev->PortSubtype); 270 if (cd == NULL) 271 goto next; 272 273 class = cd->cd_class; 274 base_address = (ACPI_GENERIC_ADDRESS *) 275 ((uintptr_t)dbg2_dev + dbg2_dev->BaseAddressOffset); 276 277 error = uart_cpu_acpi_init_devinfo(di, class, base_address); 278 if (error == 0) { 279 found = true; 280 break; 281 } 282 283 next: 284 dbg2_dev = (ACPI_DBG2_DEVICE *) 285 ((uintptr_t)dbg2_dev + dbg2_dev->Length); 286 } 287 if (!found) 288 goto out; 289 290 /* XXX: Find the correct value */ 291 di->baudrate = 115200; 292 293 /* Create a bus space handle. */ 294 error = bus_space_map(di->bas.bst, base_address->Address, 295 uart_getrange(class), 0, &di->bas.bsh); 296 297 out: 298 acpi_unmap_table(dbg2); 299 return (error); 300 } 301 302 int 303 uart_cpu_acpi_setup(int devtype, struct uart_devinfo *di) 304 { 305 char *cp; 306 307 switch(devtype) { 308 case UART_DEV_CONSOLE: 309 return (uart_cpu_acpi_spcr(devtype, di)); 310 case UART_DEV_DBGPORT: 311 /* Use the Debug Port Table 2 (DBG2) to find a debug uart */ 312 cp = kern_getenv("hw.acpi.enable_dbg2"); 313 if (cp != NULL && strcasecmp(cp, "yes") == 0) 314 return (uart_cpu_acpi_dbg2(di)); 315 break; 316 } 317 return (ENXIO); 318 } 319