xref: /dpdk/lib/eal/ppc/rte_cpuflags.c (revision 48c33e8ceeaf323976b0d26ee976f43829acfb43)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  * Copyright (C) IBM Corporation 2014.
4  */
5 
6 #include "rte_cpuflags.h"
7 
8 #include <elf.h>
9 #include <fcntl.h>
10 #include <assert.h>
11 #include <string.h>
12 #include <unistd.h>
13 
14 /* Symbolic values for the entries in the auxiliary table */
15 #define AT_HWCAP  16
16 #define AT_HWCAP2 26
17 
18 /* software based registers */
19 enum cpu_register_t {
20 	REG_NONE = 0,
21 	REG_HWCAP,
22 	REG_HWCAP2,
23 	REG_MAX
24 };
25 
26 typedef uint32_t hwcap_registers_t[REG_MAX];
27 
28 struct feature_entry {
29 	uint32_t reg;
30 	uint32_t bit;
31 #define CPU_FLAG_NAME_MAX_LEN 64
32 	char name[CPU_FLAG_NAME_MAX_LEN];
33 };
34 
35 #define FEAT_DEF(name, reg, bit) \
36 	[RTE_CPUFLAG_##name] = {reg, bit, #name},
37 
38 const struct feature_entry rte_cpu_feature_table[] = {
39 	FEAT_DEF(PPC_LE,                 REG_HWCAP,   0)
40 	FEAT_DEF(TRUE_LE,                REG_HWCAP,   1)
41 	FEAT_DEF(PSERIES_PERFMON_COMPAT, REG_HWCAP,   6)
42 	FEAT_DEF(VSX,                    REG_HWCAP,   7)
43 	FEAT_DEF(ARCH_2_06,              REG_HWCAP,   8)
44 	FEAT_DEF(POWER6_EXT,             REG_HWCAP,   9)
45 	FEAT_DEF(DFP,                    REG_HWCAP,  10)
46 	FEAT_DEF(PA6T,                   REG_HWCAP,  11)
47 	FEAT_DEF(ARCH_2_05,              REG_HWCAP,  12)
48 	FEAT_DEF(ICACHE_SNOOP,           REG_HWCAP,  13)
49 	FEAT_DEF(SMT,                    REG_HWCAP,  14)
50 	FEAT_DEF(BOOKE,                  REG_HWCAP,  15)
51 	FEAT_DEF(CELLBE,                 REG_HWCAP,  16)
52 	FEAT_DEF(POWER5_PLUS,            REG_HWCAP,  17)
53 	FEAT_DEF(POWER5,                 REG_HWCAP,  18)
54 	FEAT_DEF(POWER4,                 REG_HWCAP,  19)
55 	FEAT_DEF(NOTB,                   REG_HWCAP,  20)
56 	FEAT_DEF(EFP_DOUBLE,             REG_HWCAP,  21)
57 	FEAT_DEF(EFP_SINGLE,             REG_HWCAP,  22)
58 	FEAT_DEF(SPE,                    REG_HWCAP,  23)
59 	FEAT_DEF(UNIFIED_CACHE,          REG_HWCAP,  24)
60 	FEAT_DEF(4xxMAC,                 REG_HWCAP,  25)
61 	FEAT_DEF(MMU,                    REG_HWCAP,  26)
62 	FEAT_DEF(FPU,                    REG_HWCAP,  27)
63 	FEAT_DEF(ALTIVEC,                REG_HWCAP,  28)
64 	FEAT_DEF(PPC601,                 REG_HWCAP,  29)
65 	FEAT_DEF(PPC64,                  REG_HWCAP,  30)
66 	FEAT_DEF(PPC32,                  REG_HWCAP,  31)
67 	FEAT_DEF(TAR,                    REG_HWCAP2, 26)
68 	FEAT_DEF(LSEL,                   REG_HWCAP2, 27)
69 	FEAT_DEF(EBB,                    REG_HWCAP2, 28)
70 	FEAT_DEF(DSCR,                   REG_HWCAP2, 29)
71 	FEAT_DEF(HTM,                    REG_HWCAP2, 30)
72 	FEAT_DEF(ARCH_2_07,              REG_HWCAP2, 31)
73 };
74 
75 /*
76  * Read AUXV software register and get cpu features for Power
77  */
78 static void
rte_cpu_get_features(hwcap_registers_t out)79 rte_cpu_get_features(hwcap_registers_t out)
80 {
81 	out[REG_HWCAP] = rte_cpu_getauxval(AT_HWCAP);
82 	out[REG_HWCAP2] = rte_cpu_getauxval(AT_HWCAP2);
83 }
84 
85 /*
86  * Checks if a particular flag is available on current machine.
87  */
88 int
rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)89 rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)
90 {
91 	const struct feature_entry *feat;
92 	hwcap_registers_t regs = {0};
93 
94 	if ((unsigned int)feature >= RTE_DIM(rte_cpu_feature_table))
95 		return -ENOENT;
96 
97 	feat = &rte_cpu_feature_table[feature];
98 	if (feat->reg == REG_NONE)
99 		return -EFAULT;
100 
101 	rte_cpu_get_features(regs);
102 	return (regs[feat->reg] >> feat->bit) & 1;
103 }
104 
105 const char *
rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)106 rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)
107 {
108 	if ((unsigned int)feature >= RTE_DIM(rte_cpu_feature_table))
109 		return NULL;
110 	return rte_cpu_feature_table[feature].name;
111 }
112 
113 void
rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics * intrinsics)114 rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)
115 {
116 	memset(intrinsics, 0, sizeof(*intrinsics));
117 }
118