1; SPDX-License-Identifier: BSD-3-Clause 2; Copyright(c) 2010-2018 Intel Corporation 3 4; _______________ ______________________ 5; | | TAP0 | | 6; LINK0 RXQ0 --->|...............|------->|--+ | 7; | | TAP1 | | br0 | 8; LINK1 TXQ0 <---|...............|<-------|<-+ | 9; | | | Linux Kernel | 10; | PIPELINE0 | | Network Stack | 11; | | TAP1 | | 12; LINK1 RXQ0 --->|...............|------->|--+ | 13; | | TAP0 | | br0 | 14; LINK0 TXQ0 <---|...............|<-------|<-+ | 15; |_______________| |______________________| 16; 17; Configure Linux kernel bridge between TAP0 and TAP1 interfaces: 18; [Linux]$ brctl addbr br0 19; [Linux]$ brctl addif br0 TAP0 20; [Linux]$ brctl addif br0 TAP1 21; [Linux]$ ifconfig TAP0 up 22; [Linux]$ ifconfig TAP1 up 23; [Linux]$ ifconfig br0 up 24; 25; Monitor packet forwarding performed by Linux kernel between TAP0 and TAP1: 26; [Linux]$ tcpdump -i TAP0 27; [Linux]$ tcpdump -i TAP1 28 29mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0 30 31link LINK0 dev 0000:02:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on 32link LINK1 dev 0000:02:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on 33 34tap TAP0 35tap TAP1 36 37table action profile AP0 ipv4 offset 270 fwd 38 39pipeline PIPELINE0 period 10 offset_port_id 0 cpu 0 40 41pipeline PIPELINE0 port in bsz 32 link LINK0 rxq 0 42pipeline PIPELINE0 port in bsz 32 tap TAP1 mempool MEMPOOL0 mtu 1500 43pipeline PIPELINE0 port in bsz 32 link LINK1 rxq 0 44pipeline PIPELINE0 port in bsz 32 tap TAP0 mempool MEMPOOL0 mtu 1500 45 46pipeline PIPELINE0 port out bsz 32 tap TAP0 47pipeline PIPELINE0 port out bsz 32 link LINK1 txq 0 48pipeline PIPELINE0 port out bsz 32 tap TAP1 49pipeline PIPELINE0 port out bsz 32 link LINK0 txq 0 50 51pipeline PIPELINE0 table match stub action AP0 52pipeline PIPELINE0 table match stub action AP0 53pipeline PIPELINE0 table match stub action AP0 54pipeline PIPELINE0 table match stub action AP0 55 56pipeline PIPELINE0 port in 0 table 0 57pipeline PIPELINE0 port in 1 table 1 58pipeline PIPELINE0 port in 2 table 2 59pipeline PIPELINE0 port in 3 table 3 60 61thread 1 pipeline PIPELINE0 enable 62 63pipeline PIPELINE0 table 0 rule add match default action fwd port 0 64pipeline PIPELINE0 table 1 rule add match default action fwd port 1 65pipeline PIPELINE0 table 2 rule add match default action fwd port 2 66pipeline PIPELINE0 table 3 rule add match default action fwd port 3 67