1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2023 Napatech A/S 4 */ 5 6 #ifndef _QSFP_REGISTERS_H 7 #define _QSFP_REGISTERS_H 8 9 /* 10 * QSFP Registers 11 */ 12 #define QSFP_INT_STATUS_RX_LOS_ADDR 3 13 #define QSFP_TEMP_LIN_ADDR 22 14 #define QSFP_VOLT_LIN_ADDR 26 15 #define QSFP_RX_PWR_LIN_ADDR 34 /* uint16_t [0..3] */ 16 #define QSFP_TX_BIAS_LIN_ADDR 42/* uint16_t [0..3] */ 17 #define QSFP_TX_PWR_LIN_ADDR 50 /* uint16_t [0..3] */ 18 19 #define QSFP_CONTROL_STATUS_LIN_ADDR 86 20 #define QSFP_SOFT_TX_ALL_DISABLE_BITS 0x0F 21 22 #define QSFP_POWER_CLASS_BITS_1_4 0xC0 23 #define QSFP_POWER_CLASS_BITS_5_7 0x03 24 25 #define QSFP_SUP_LEN_INFO_LIN_ADDR 142 /* 5bytes */ 26 #define QSFP_TRANSMITTER_TYPE_LIN_ADDR 147 /* 1byte */ 27 #define QSFP_VENDOR_NAME_LIN_ADDR 148 /* 16bytes */ 28 #define QSFP_VENDOR_PN_LIN_ADDR 168 /* 16bytes */ 29 #define QSFP_VENDOR_SN_LIN_ADDR 196 /* 16bytes */ 30 #define QSFP_VENDOR_DATE_LIN_ADDR 212 /* 8bytes */ 31 #define QSFP_VENDOR_REV_LIN_ADDR 184 /* 2bytes */ 32 33 #define QSFP_SPEC_COMPLIANCE_CODES_ADDR 131 /* 8 bytes */ 34 #define QSFP_EXT_SPEC_COMPLIANCE_CODES_ADDR 192 /* 1 byte */ 35 36 #define QSFP_OPTION3_LIN_ADDR 195 37 #define QSFP_OPTION3_TX_DISABLE_BIT (1 << 4) 38 39 #define QSFP_DMI_OPTION_LIN_ADDR 220 40 #define QSFP_DMI_AVG_PWR_BIT (1 << 3) 41 42 43 #endif /* _QSFP_REGISTERS_H */ 44