1 /* SPDX-License-Identifier: MIT 2 * Google Virtual Ethernet (gve) driver 3 * Copyright (C) 2015-2023 Google, Inc. 4 */ 5 6 #ifndef _GVE_ADMINQ_H 7 #define _GVE_ADMINQ_H 8 9 #include "gve_osdep.h" 10 11 /* Admin queue opcodes */ 12 enum gve_adminq_opcodes { 13 GVE_ADMINQ_DESCRIBE_DEVICE = 0x1, 14 GVE_ADMINQ_CONFIGURE_DEVICE_RESOURCES = 0x2, 15 GVE_ADMINQ_REGISTER_PAGE_LIST = 0x3, 16 GVE_ADMINQ_UNREGISTER_PAGE_LIST = 0x4, 17 GVE_ADMINQ_CREATE_TX_QUEUE = 0x5, 18 GVE_ADMINQ_CREATE_RX_QUEUE = 0x6, 19 GVE_ADMINQ_DESTROY_TX_QUEUE = 0x7, 20 GVE_ADMINQ_DESTROY_RX_QUEUE = 0x8, 21 GVE_ADMINQ_DECONFIGURE_DEVICE_RESOURCES = 0x9, 22 GVE_ADMINQ_CONFIGURE_RSS = 0xA, 23 GVE_ADMINQ_SET_DRIVER_PARAMETER = 0xB, 24 GVE_ADMINQ_REPORT_STATS = 0xC, 25 GVE_ADMINQ_REPORT_LINK_SPEED = 0xD, 26 GVE_ADMINQ_GET_PTYPE_MAP = 0xE, 27 GVE_ADMINQ_VERIFY_DRIVER_COMPATIBILITY = 0xF, 28 }; 29 30 /* Admin queue status codes */ 31 enum gve_adminq_statuses { 32 GVE_ADMINQ_COMMAND_UNSET = 0x0, 33 GVE_ADMINQ_COMMAND_PASSED = 0x1, 34 GVE_ADMINQ_COMMAND_ERROR_ABORTED = 0xFFFFFFF0, 35 GVE_ADMINQ_COMMAND_ERROR_ALREADY_EXISTS = 0xFFFFFFF1, 36 GVE_ADMINQ_COMMAND_ERROR_CANCELLED = 0xFFFFFFF2, 37 GVE_ADMINQ_COMMAND_ERROR_DATALOSS = 0xFFFFFFF3, 38 GVE_ADMINQ_COMMAND_ERROR_DEADLINE_EXCEEDED = 0xFFFFFFF4, 39 GVE_ADMINQ_COMMAND_ERROR_FAILED_PRECONDITION = 0xFFFFFFF5, 40 GVE_ADMINQ_COMMAND_ERROR_INTERNAL_ERROR = 0xFFFFFFF6, 41 GVE_ADMINQ_COMMAND_ERROR_INVALID_ARGUMENT = 0xFFFFFFF7, 42 GVE_ADMINQ_COMMAND_ERROR_NOT_FOUND = 0xFFFFFFF8, 43 GVE_ADMINQ_COMMAND_ERROR_OUT_OF_RANGE = 0xFFFFFFF9, 44 GVE_ADMINQ_COMMAND_ERROR_PERMISSION_DENIED = 0xFFFFFFFA, 45 GVE_ADMINQ_COMMAND_ERROR_UNAUTHENTICATED = 0xFFFFFFFB, 46 GVE_ADMINQ_COMMAND_ERROR_RESOURCE_EXHAUSTED = 0xFFFFFFFC, 47 GVE_ADMINQ_COMMAND_ERROR_UNAVAILABLE = 0xFFFFFFFD, 48 GVE_ADMINQ_COMMAND_ERROR_UNIMPLEMENTED = 0xFFFFFFFE, 49 GVE_ADMINQ_COMMAND_ERROR_UNKNOWN_ERROR = 0xFFFFFFFF, 50 }; 51 52 #define GVE_ADMINQ_DEVICE_DESCRIPTOR_VERSION 1 53 54 /* All AdminQ command structs should be naturally packed. 55 * GVE_CHECK_STRUCT/UNION_LEN will check struct/union length and throw 56 * error at compile time when the size is not correct. 57 */ 58 59 struct gve_adminq_describe_device { 60 __be64 device_descriptor_addr; 61 __be32 device_descriptor_version; 62 __be32 available_length; 63 }; 64 65 GVE_CHECK_STRUCT_LEN(16, gve_adminq_describe_device); 66 67 struct gve_device_descriptor { 68 __be64 max_registered_pages; 69 __be16 reserved1; 70 __be16 tx_queue_entries; 71 __be16 rx_queue_entries; 72 __be16 default_num_queues; 73 __be16 mtu; 74 __be16 counters; 75 __be16 tx_pages_per_qpl; 76 __be16 rx_pages_per_qpl; 77 u8 mac[ETH_ALEN]; 78 __be16 num_device_options; 79 __be16 total_length; 80 u8 reserved2[6]; 81 }; 82 83 GVE_CHECK_STRUCT_LEN(40, gve_device_descriptor); 84 85 struct gve_device_option { 86 __be16 option_id; 87 __be16 option_length; 88 __be32 required_features_mask; 89 }; 90 91 GVE_CHECK_STRUCT_LEN(8, gve_device_option); 92 93 struct gve_device_option_gqi_rda { 94 __be32 supported_features_mask; 95 }; 96 97 GVE_CHECK_STRUCT_LEN(4, gve_device_option_gqi_rda); 98 99 struct gve_device_option_gqi_qpl { 100 __be32 supported_features_mask; 101 }; 102 103 GVE_CHECK_STRUCT_LEN(4, gve_device_option_gqi_qpl); 104 105 struct gve_device_option_dqo_rda { 106 __be32 supported_features_mask; 107 __be16 tx_comp_ring_entries; 108 __be16 rx_buff_ring_entries; 109 }; 110 111 GVE_CHECK_STRUCT_LEN(8, gve_device_option_dqo_rda); 112 113 struct gve_ring_size_bound { 114 __be16 rx; 115 __be16 tx; 116 }; 117 118 GVE_CHECK_STRUCT_LEN(4, gve_ring_size_bound); 119 120 struct gve_device_option_modify_ring { 121 __be32 supported_features_mask; 122 struct gve_ring_size_bound max_ring_size; 123 struct gve_ring_size_bound min_ring_size; 124 }; 125 126 GVE_CHECK_STRUCT_LEN(12, gve_device_option_modify_ring); 127 128 struct gve_device_option_jumbo_frames { 129 __be32 supported_features_mask; 130 __be16 max_mtu; 131 u8 padding[2]; 132 }; 133 134 GVE_CHECK_STRUCT_LEN(8, gve_device_option_jumbo_frames); 135 136 /* Terminology: 137 * 138 * RDA - Raw DMA Addressing - Buffers associated with SKBs are directly DMA 139 * mapped and read/updated by the device. 140 * 141 * QPL - Queue Page Lists - Driver uses bounce buffers which are DMA mapped with 142 * the device for read/write and data is copied from/to SKBs. 143 */ 144 enum gve_dev_opt_id { 145 GVE_DEV_OPT_ID_GQI_RAW_ADDRESSING = 0x1, 146 GVE_DEV_OPT_ID_GQI_RDA = 0x2, 147 GVE_DEV_OPT_ID_GQI_QPL = 0x3, 148 GVE_DEV_OPT_ID_DQO_RDA = 0x4, 149 GVE_DEV_OPT_ID_MODIFY_RING = 0x6, 150 GVE_DEV_OPT_ID_JUMBO_FRAMES = 0x8, 151 }; 152 153 enum gve_dev_opt_req_feat_mask { 154 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_RAW_ADDRESSING = 0x0, 155 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_RDA = 0x0, 156 GVE_DEV_OPT_REQ_FEAT_MASK_GQI_QPL = 0x0, 157 GVE_DEV_OPT_REQ_FEAT_MASK_DQO_RDA = 0x0, 158 GVE_DEV_OPT_REQ_FEAT_MASK_MODIFY_RING = 0x0, 159 GVE_DEV_OPT_REQ_FEAT_MASK_JUMBO_FRAMES = 0x0, 160 }; 161 162 enum gve_sup_feature_mask { 163 GVE_SUP_MODIFY_RING_MASK = 1 << 0, 164 GVE_SUP_JUMBO_FRAMES_MASK = 1 << 2, 165 }; 166 167 #define GVE_DEV_OPT_LEN_GQI_RAW_ADDRESSING 0x0 168 enum gve_driver_capbility { 169 gve_driver_capability_gqi_qpl = 0, 170 gve_driver_capability_gqi_rda = 1, 171 gve_driver_capability_dqo_qpl = 2, /* reserved for future use */ 172 gve_driver_capability_dqo_rda = 3, 173 }; 174 175 #define GVE_CAP1(a) BIT((int)a) 176 177 #define GVE_DRIVER_CAPABILITY_FLAGS1 \ 178 (GVE_CAP1(gve_driver_capability_gqi_qpl) | \ 179 GVE_CAP1(gve_driver_capability_gqi_rda) | \ 180 GVE_CAP1(gve_driver_capability_dqo_rda)) 181 182 #define GVE_DRIVER_CAPABILITY_FLAGS2 0x0 183 #define GVE_DRIVER_CAPABILITY_FLAGS3 0x0 184 #define GVE_DRIVER_CAPABILITY_FLAGS4 0x0 185 186 struct gve_driver_info { 187 u8 os_type; /* 0x05 = DPDK */ 188 u8 driver_major; 189 u8 driver_minor; 190 u8 driver_sub; 191 __be32 os_version_major; 192 __be32 os_version_minor; 193 __be32 os_version_sub; 194 __be64 driver_capability_flags[4]; 195 u8 os_version_str1[OS_VERSION_STRLEN]; 196 u8 os_version_str2[OS_VERSION_STRLEN]; 197 }; 198 199 struct gve_adminq_verify_driver_compatibility { 200 __be64 driver_info_len; 201 __be64 driver_info_addr; 202 }; 203 204 GVE_CHECK_STRUCT_LEN(16, gve_adminq_verify_driver_compatibility); 205 206 207 struct gve_adminq_configure_device_resources { 208 __be64 counter_array; 209 __be64 irq_db_addr; 210 __be32 num_counters; 211 __be32 num_irq_dbs; 212 __be32 irq_db_stride; 213 __be32 ntfy_blk_msix_base_idx; 214 u8 queue_format; 215 u8 padding[7]; 216 }; 217 218 GVE_CHECK_STRUCT_LEN(40, gve_adminq_configure_device_resources); 219 220 struct gve_adminq_register_page_list { 221 __be32 page_list_id; 222 __be32 num_pages; 223 __be64 page_address_list_addr; 224 }; 225 226 GVE_CHECK_STRUCT_LEN(16, gve_adminq_register_page_list); 227 228 struct gve_adminq_unregister_page_list { 229 __be32 page_list_id; 230 }; 231 232 GVE_CHECK_STRUCT_LEN(4, gve_adminq_unregister_page_list); 233 234 #define GVE_RAW_ADDRESSING_QPL_ID 0xFFFFFFFF 235 236 struct gve_adminq_create_tx_queue { 237 __be32 queue_id; 238 __be32 reserved; 239 __be64 queue_resources_addr; 240 __be64 tx_ring_addr; 241 __be32 queue_page_list_id; 242 __be32 ntfy_id; 243 __be64 tx_comp_ring_addr; 244 __be16 tx_ring_size; 245 __be16 tx_comp_ring_size; 246 u8 padding[4]; 247 }; 248 249 GVE_CHECK_STRUCT_LEN(48, gve_adminq_create_tx_queue); 250 251 struct gve_adminq_create_rx_queue { 252 __be32 queue_id; 253 __be32 index; 254 __be32 reserved; 255 __be32 ntfy_id; 256 __be64 queue_resources_addr; 257 __be64 rx_desc_ring_addr; 258 __be64 rx_data_ring_addr; 259 __be32 queue_page_list_id; 260 __be16 rx_ring_size; 261 __be16 packet_buffer_size; 262 __be16 rx_buff_ring_size; 263 u8 enable_rsc; 264 u8 padding[5]; 265 }; 266 267 GVE_CHECK_STRUCT_LEN(56, gve_adminq_create_rx_queue); 268 269 /* Queue resources that are shared with the device */ 270 struct gve_queue_resources { 271 union { 272 struct { 273 __be32 db_index; /* Device -> Guest */ 274 __be32 counter_index; /* Device -> Guest */ 275 }; 276 u8 reserved[64]; 277 }; 278 }; 279 280 GVE_CHECK_STRUCT_LEN(64, gve_queue_resources); 281 282 struct gve_adminq_destroy_tx_queue { 283 __be32 queue_id; 284 }; 285 286 GVE_CHECK_STRUCT_LEN(4, gve_adminq_destroy_tx_queue); 287 288 struct gve_adminq_destroy_rx_queue { 289 __be32 queue_id; 290 }; 291 292 GVE_CHECK_STRUCT_LEN(4, gve_adminq_destroy_rx_queue); 293 294 /* GVE Set Driver Parameter Types */ 295 enum gve_set_driver_param_types { 296 GVE_SET_PARAM_MTU = 0x1, 297 }; 298 299 struct gve_adminq_set_driver_parameter { 300 __be32 parameter_type; 301 u8 reserved[4]; 302 __be64 parameter_value; 303 }; 304 305 GVE_CHECK_STRUCT_LEN(16, gve_adminq_set_driver_parameter); 306 307 struct gve_adminq_report_stats { 308 __be64 stats_report_len; 309 __be64 stats_report_addr; 310 __be64 interval; 311 }; 312 313 GVE_CHECK_STRUCT_LEN(24, gve_adminq_report_stats); 314 315 struct gve_adminq_report_link_speed { 316 __be64 link_speed_address; 317 }; 318 319 GVE_CHECK_STRUCT_LEN(8, gve_adminq_report_link_speed); 320 321 struct stats { 322 __be32 stat_name; 323 __be32 queue_id; 324 __be64 value; 325 }; 326 327 GVE_CHECK_STRUCT_LEN(16, stats); 328 329 struct gve_stats_report { 330 __be64 written_count; 331 struct stats stats[]; 332 }; 333 334 GVE_CHECK_STRUCT_LEN(8, gve_stats_report); 335 336 /* Numbers of gve tx/rx stats in stats report. */ 337 #define GVE_TX_STATS_REPORT_NUM 6 338 #define GVE_RX_STATS_REPORT_NUM 2 339 340 /* Interval to schedule a stats report update, 20000ms. */ 341 #define GVE_STATS_REPORT_TIMER_PERIOD 20000 342 343 /* Numbers of NIC tx/rx stats in stats report. */ 344 #define NIC_TX_STATS_REPORT_NUM 0 345 #define NIC_RX_STATS_REPORT_NUM 4 346 347 enum gve_stat_names { 348 /* stats from gve */ 349 TX_WAKE_CNT = 1, 350 TX_STOP_CNT = 2, 351 TX_FRAMES_SENT = 3, 352 TX_BYTES_SENT = 4, 353 TX_LAST_COMPLETION_PROCESSED = 5, 354 RX_NEXT_EXPECTED_SEQUENCE = 6, 355 RX_BUFFERS_POSTED = 7, 356 TX_TIMEOUT_CNT = 8, 357 /* stats from NIC */ 358 RX_QUEUE_DROP_CNT = 65, 359 RX_NO_BUFFERS_POSTED = 66, 360 RX_DROPS_PACKET_OVER_MRU = 67, 361 RX_DROPS_INVALID_CHECKSUM = 68, 362 }; 363 364 enum gve_l3_type { 365 /* Must be zero so zero initialized LUT is unknown. */ 366 GVE_L3_TYPE_UNKNOWN = 0, 367 GVE_L3_TYPE_OTHER, 368 GVE_L3_TYPE_IPV4, 369 GVE_L3_TYPE_IPV6, 370 }; 371 372 enum gve_l4_type { 373 /* Must be zero so zero initialized LUT is unknown. */ 374 GVE_L4_TYPE_UNKNOWN = 0, 375 GVE_L4_TYPE_OTHER, 376 GVE_L4_TYPE_TCP, 377 GVE_L4_TYPE_UDP, 378 GVE_L4_TYPE_ICMP, 379 GVE_L4_TYPE_SCTP, 380 }; 381 382 /* These are control path types for PTYPE which are the same as the data path 383 * types. 384 */ 385 struct gve_ptype_entry { 386 u8 l3_type; 387 u8 l4_type; 388 }; 389 390 struct gve_ptype_map { 391 struct gve_ptype_entry ptypes[1 << 10]; /* PTYPES are always 10 bits. */ 392 }; 393 394 struct gve_adminq_get_ptype_map { 395 __be64 ptype_map_len; 396 __be64 ptype_map_addr; 397 }; 398 399 400 /* RSS configuration command */ 401 struct gve_adminq_configure_rss { 402 __be16 hash_types; 403 u8 halg; /* hash algorithm */ 404 u8 reserved; 405 __be16 hkey_len; 406 __be16 indir_len; 407 __be64 hkey_addr; 408 __be64 indir_addr; 409 }; 410 411 union gve_adminq_command { 412 struct { 413 __be32 opcode; 414 __be32 status; 415 union { 416 struct gve_adminq_configure_device_resources 417 configure_device_resources; 418 struct gve_adminq_create_tx_queue create_tx_queue; 419 struct gve_adminq_create_rx_queue create_rx_queue; 420 struct gve_adminq_destroy_tx_queue destroy_tx_queue; 421 struct gve_adminq_destroy_rx_queue destroy_rx_queue; 422 struct gve_adminq_describe_device describe_device; 423 struct gve_adminq_register_page_list reg_page_list; 424 struct gve_adminq_unregister_page_list unreg_page_list; 425 struct gve_adminq_configure_rss configure_rss; 426 struct gve_adminq_set_driver_parameter set_driver_param; 427 struct gve_adminq_report_stats report_stats; 428 struct gve_adminq_report_link_speed report_link_speed; 429 struct gve_adminq_get_ptype_map get_ptype_map; 430 struct gve_adminq_verify_driver_compatibility 431 verify_driver_compatibility; 432 }; 433 }; 434 u8 reserved[64]; 435 }; 436 437 GVE_CHECK_UNION_LEN(64, gve_adminq_command); 438 439 struct gve_priv; 440 struct gve_rss_config; 441 struct gve_queue_page_list; 442 int gve_adminq_alloc(struct gve_priv *priv); 443 void gve_adminq_free(struct gve_priv *priv); 444 void gve_adminq_release(struct gve_priv *priv); 445 int gve_adminq_describe_device(struct gve_priv *priv); 446 int gve_adminq_configure_device_resources(struct gve_priv *priv, 447 dma_addr_t counter_array_bus_addr, 448 u32 num_counters, 449 dma_addr_t db_array_bus_addr, 450 u32 num_ntfy_blks); 451 int gve_adminq_deconfigure_device_resources(struct gve_priv *priv); 452 int gve_adminq_create_tx_queues(struct gve_priv *priv, u32 num_queues); 453 int gve_adminq_destroy_tx_queues(struct gve_priv *priv, u32 queue_id); 454 int gve_adminq_create_rx_queues(struct gve_priv *priv, u32 num_queues); 455 int gve_adminq_destroy_rx_queues(struct gve_priv *priv, u32 queue_id); 456 int gve_adminq_register_page_list(struct gve_priv *priv, 457 struct gve_queue_page_list *qpl); 458 int gve_adminq_unregister_page_list(struct gve_priv *priv, u32 page_list_id); 459 int gve_adminq_set_mtu(struct gve_priv *priv, u64 mtu); 460 int gve_adminq_report_stats(struct gve_priv *priv, u64 stats_report_len, 461 dma_addr_t stats_report_addr, u64 interval); 462 int gve_adminq_report_link_speed(struct gve_priv *priv); 463 464 struct gve_ptype_lut; 465 int gve_adminq_get_ptype_map_dqo(struct gve_priv *priv, 466 struct gve_ptype_lut *ptype_lut); 467 468 int gve_adminq_verify_driver_compatibility(struct gve_priv *priv, 469 u64 driver_info_len, 470 dma_addr_t driver_info_addr); 471 472 int gve_adminq_configure_rss(struct gve_priv *priv, 473 struct gve_rss_config *rss_config); 474 475 #endif /* _GVE_ADMINQ_H */ 476