1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 */ 5 6 #include "vnic_dev.h" 7 #include "vnic_cq.h" 8 #include <rte_memzone.h> 9 10 void vnic_cq_free(struct vnic_cq *cq) 11 { 12 vnic_dev_free_desc_ring(cq->vdev, &cq->ring); 13 14 cq->ctrl = NULL; 15 } 16 17 int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index, 18 unsigned int socket_id, 19 unsigned int desc_count, unsigned int desc_size) 20 { 21 int err; 22 char res_name[RTE_MEMZONE_NAMESIZE]; 23 static int instance; 24 25 cq->index = index; 26 cq->vdev = vdev; 27 cq->admin_chan = false; 28 29 cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index); 30 if (!cq->ctrl) { 31 pr_err("Failed to hook CQ[%u] resource\n", index); 32 return -EINVAL; 33 } 34 35 snprintf(res_name, sizeof(res_name), "%d-cq-%u", instance++, index); 36 err = vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size, 37 socket_id, res_name); 38 if (err) 39 return err; 40 41 return 0; 42 } 43 44 int vnic_admin_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index, 45 unsigned int socket_id, unsigned int desc_count, unsigned int desc_size) 46 { 47 int err; 48 char res_name[RTE_MEMZONE_NAMESIZE]; 49 static int instance; 50 51 cq->index = index; 52 cq->vdev = vdev; 53 cq->admin_chan = true; 54 55 cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_ADMIN_CQ, index); 56 if (!cq->ctrl) { 57 pr_err("Failed to get admin CQ[%u] resource\n", index); 58 return -EINVAL; 59 } 60 61 snprintf(res_name, sizeof(res_name), "%d-admin-cq-%u", instance++, index); 62 err = vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size, 63 socket_id, res_name); 64 if (err) 65 return err; 66 67 return 0; 68 } 69 70 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable, 71 unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail, 72 unsigned int cq_tail_color, unsigned int interrupt_enable, 73 unsigned int cq_entry_enable, unsigned int cq_message_enable, 74 unsigned int interrupt_offset, uint64_t cq_message_addr) 75 { 76 uint64_t paddr; 77 78 paddr = (uint64_t)cq->ring.base_addr | VNIC_PADDR_TARGET; 79 writeq(paddr, &cq->ctrl->ring_base); 80 iowrite32(cq->ring.desc_count, &cq->ctrl->ring_size); 81 iowrite32(flow_control_enable, &cq->ctrl->flow_control_enable); 82 iowrite32(color_enable, &cq->ctrl->color_enable); 83 iowrite32(cq_head, &cq->ctrl->cq_head); 84 iowrite32(cq_tail, &cq->ctrl->cq_tail); 85 iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color); 86 iowrite32(interrupt_enable, &cq->ctrl->interrupt_enable); 87 iowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable); 88 iowrite32(cq_message_enable, &cq->ctrl->cq_message_enable); 89 iowrite32(interrupt_offset, &cq->ctrl->interrupt_offset); 90 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); 91 92 cq->interrupt_offset = interrupt_offset; 93 } 94 95 void vnic_cq_clean(struct vnic_cq *cq) 96 { 97 cq->to_clean = 0; 98 cq->last_color = 0; 99 100 iowrite32(0, &cq->ctrl->cq_head); 101 iowrite32(0, &cq->ctrl->cq_tail); 102 iowrite32(1, &cq->ctrl->cq_tail_color); 103 104 vnic_dev_clear_desc_ring(&cq->ring); 105 } 106