xref: /dpdk/drivers/dma/skeleton/skeleton_dmadev.h (revision e12a0166c80f65e35408f4715b2f3a60763c3741)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2021-2024 HiSilicon Limited
3  */
4 
5 #ifndef SKELETON_DMADEV_H
6 #define SKELETON_DMADEV_H
7 
8 #include <rte_dmadev.h>
9 #include <rte_ring.h>
10 #include <rte_thread.h>
11 
12 #define SKELDMA_ARG_LCORE	"lcore"
13 
14 #define SKELDMA_MAX_SGES	4
15 
16 enum skeldma_op {
17 	SKELDMA_OP_COPY,
18 	SKELDMA_OP_COPY_SG,
19 	SKELDMA_OP_FILL,
20 };
21 
22 struct skeldma_desc {
23 	enum skeldma_op op;
24 	uint16_t ridx; /* ring idx */
25 
26 	union {
27 		struct {
28 			void *src;
29 			void *dst;
30 			uint32_t len;
31 		} copy;
32 		struct {
33 			struct rte_dma_sge src[SKELDMA_MAX_SGES];
34 			struct rte_dma_sge dst[SKELDMA_MAX_SGES];
35 			uint16_t nb_src;
36 			uint16_t nb_dst;
37 		} copy_sg;
38 		struct {
39 			void *dst;
40 			uint32_t len;
41 			uint64_t pattern;
42 		} fill;
43 	};
44 };
45 
46 struct skeldma_hw {
47 	int lcore_id; /* cpuwork task affinity core */
48 	int socket_id;
49 	rte_thread_t thread; /* cpuwork task thread */
50 	volatile int exit_flag; /* cpuwork task exit flag */
51 
52 	struct skeldma_desc *desc_mem;
53 
54 	/* Descriptor ring state machine:
55 	 *
56 	 *  -----------     enqueue without submit     -----------
57 	 *  |  empty  |------------------------------->| pending |
58 	 *  -----------\                               -----------
59 	 *       ^      \------------                       |
60 	 *       |                  |                       |submit doorbell
61 	 *       |                  |                       |
62 	 *       |                  |enqueue with submit    |
63 	 *       |get completed     |------------------|    |
64 	 *       |                                     |    |
65 	 *       |                                     v    v
66 	 *  -----------     cpuwork thread working     -----------
67 	 *  |completed|<-------------------------------| running |
68 	 *  -----------                                -----------
69 	 */
70 	struct rte_ring *desc_empty;
71 	struct rte_ring *desc_pending;
72 	struct rte_ring *desc_running;
73 	struct rte_ring *desc_completed;
74 
75 	/* Cache delimiter for dataplane API's operation data */
76 	alignas(RTE_CACHE_LINE_SIZE) char cache1;
77 	uint16_t ridx;  /* ring idx */
78 	uint16_t last_ridx;
79 	uint64_t submitted_count;
80 
81 	/* Cache delimiter for cpuwork thread's operation data */
82 	alignas(RTE_CACHE_LINE_SIZE) char cache2;
83 	volatile uint32_t zero_req_count;
84 	RTE_ATOMIC(uint64_t) completed_count;
85 };
86 
87 #endif /* SKELETON_DMADEV_H */
88