xref: /dpdk/drivers/common/cnxk/hw/cpt.h (revision a8ebe94f8cc11cda874cd0353a47e78279699d10)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4 
5 #ifndef __CPT_HW_H__
6 #define __CPT_HW_H__
7 
8 #include "roc_platform.h"
9 
10 /* Register offsets */
11 
12 #define CPT_COMP_NOT_DONE (0x0ull)
13 #define CPT_COMP_GOOD	  (0x1ull)
14 #define CPT_COMP_FAULT	  (0x2ull)
15 #define CPT_COMP_SWERR	  (0x3ull)
16 #define CPT_COMP_HWERR	  (0x4ull)
17 #define CPT_COMP_INSTERR  (0x5ull)
18 #define CPT_COMP_WARN	  (0x6ull) /* [CN10K, .) */
19 
20 #define CPT_COMP_HWGOOD_MASK ((1U << CPT_COMP_WARN) | (1U << CPT_COMP_GOOD))
21 
22 #define CPT_LF_INT_VEC_MISC	(0x0ull)
23 #define CPT_LF_INT_VEC_DONE	(0x1ull)
24 #define CPT_LF_CTL		(0x10ull)
25 #define CPT_LF_DONE_WAIT	(0x30ull)
26 #define CPT_LF_INPROG		(0x40ull)
27 #define CPT_LF_DONE		(0x50ull)
28 #define CPT_LF_DONE_ACK		(0x60ull)
29 #define CPT_LF_DONE_INT_ENA_W1S (0x90ull)
30 #define CPT_LF_DONE_INT_ENA_W1C (0xa0ull)
31 #define CPT_LF_MISC_INT		(0xb0ull)
32 #define CPT_LF_MISC_INT_W1S	(0xc0ull)
33 #define CPT_LF_MISC_INT_ENA_W1S (0xd0ull)
34 #define CPT_LF_MISC_INT_ENA_W1C (0xe0ull)
35 #define CPT_LF_Q_BASE		(0xf0ull)
36 #define CPT_LF_Q_SIZE		(0x100ull)
37 #define CPT_LF_Q_INST_PTR	(0x110ull)
38 #define CPT_LF_Q_GRP_PTR	(0x120ull)
39 #define CPT_LF_NQX(a)		(0x400ull | (uint64_t)(a) << 3)
40 #define CPT_LF_CTX_CTL		(0x500ull)
41 #define CPT_LF_CTX_FLUSH	(0x510ull)
42 #define CPT_LF_CTX_ERR		(0x520ull)
43 #define CPT_LF_CTX_ENC_BYTE_CNT (0x530ull)
44 #define CPT_LF_CTX_ENC_PKT_CNT	(0x540ull)
45 #define CPT_LF_CTX_DEC_BYTE_CNT (0x550ull)
46 #define CPT_LF_CTX_DEC_PKT_CNT	(0x560ull)
47 #define CPT_LF_CTX_RELOAD	(0x570ull)
48 
49 #define CPT_AF_LFX_CTL(a)  (0x27000ull | (uint64_t)(a) << 3)
50 #define CPT_AF_LFX_CTL2(a) (0x29000ull | (uint64_t)(a) << 3)
51 
52 enum cpt_eng_type {
53 	CPT_ENG_TYPE_AE = 1,
54 	CPT_ENG_TYPE_SE = 2,
55 	CPT_ENG_TYPE_IE = 3,
56 	CPT_MAX_ENG_TYPES,
57 };
58 
59 /* Structures definitions */
60 
61 /* CPT HW capabilities */
62 union cpt_eng_caps {
63 	uint64_t __io u;
64 	struct {
65 		uint64_t __io reserved_0_4 : 5;
66 		uint64_t __io mul : 1;
67 		uint64_t __io sha1_sha2 : 1;
68 		uint64_t __io chacha20 : 1;
69 		uint64_t __io zuc_snow3g : 1;
70 		uint64_t __io sha3 : 1;
71 		uint64_t __io aes : 1;
72 		uint64_t __io kasumi : 1;
73 		uint64_t __io des : 1;
74 		uint64_t __io crc : 1;
75 		uint64_t __io mmul : 1;
76 		uint64_t __io reserved_15_20 : 6;
77 		uint64_t __io sm3 : 1;
78 		uint64_t __io sm4 : 1;
79 		uint64_t __io reserved_23_34 : 12;
80 		uint64_t __io sg_ver2 : 1;
81 		uint64_t __io sm2 : 1;
82 		uint64_t __io pdcp_chain_zuc256 : 1;
83 		uint64_t __io tls : 1;
84 		uint64_t __io eddsa : 1;
85 		uint64_t __io reserved_40_63 : 24;
86 	};
87 };
88 
89 union cpt_lf_ctl {
90 	uint64_t u;
91 	struct cpt_lf_ctl_s {
92 		uint64_t ena : 1;
93 		uint64_t fc_ena : 1;
94 		uint64_t fc_up_crossing : 1;
95 		uint64_t reserved_3_3 : 1;
96 		uint64_t fc_hyst_bits : 4;
97 		uint64_t reserved_8_63 : 56;
98 	} s;
99 };
100 
101 union cpt_lf_ctx_flush {
102 	uint64_t u;
103 	struct {
104 		uint64_t cptr : 46;
105 		uint64_t inval : 1;
106 		uint64_t reserved_47_63 : 17;
107 	} s;
108 };
109 
110 union cpt_lf_ctx_err {
111 	uint64_t u;
112 	struct {
113 		uint64_t flush_st_flt : 1;
114 		uint64_t busy_flr : 1;
115 		uint64_t busy_sw_flush : 1;
116 		uint64_t reload_faulted : 1;
117 		uint64_t reserved_4_63 : 1;
118 	} s;
119 };
120 
121 union cpt_lf_ctx_reload {
122 	uint64_t u;
123 	struct {
124 		uint64_t cptr : 46;
125 		uint64_t reserved_46_63 : 18;
126 	} s;
127 };
128 
129 union cpt_lf_inprog {
130 	uint64_t u;
131 	struct cpt_lf_inprog_s {
132 		uint64_t inflight : 9;
133 		uint64_t reserved_9_15 : 7;
134 		uint64_t eena : 1;
135 		uint64_t grp_drp : 1;
136 		uint64_t reserved_18_30 : 13;
137 		uint64_t grb_partial : 1;
138 		uint64_t grb_cnt : 8;
139 		uint64_t gwb_cnt : 8;
140 		uint64_t reserved_48_63 : 16;
141 	} s;
142 };
143 
144 union cpt_lf_q_inst_ptr {
145 	uint64_t u;
146 	struct cpt_lf_q_inst_ptr_s {
147 		uint64_t dq_ptr : 20;
148 		uint64_t reserved_20_31 : 12;
149 		uint64_t nq_ptr : 20;
150 		uint64_t reserved_52_62 : 11;
151 		uint64_t xq_xor : 1;
152 	} s;
153 };
154 
155 union cpt_lf_q_base {
156 	uint64_t u;
157 	struct cpt_lf_q_base_s {
158 		uint64_t fault : 1;
159 		uint64_t stopped : 1;
160 		uint64_t reserved_2_6 : 5;
161 		uint64_t addr : 46;
162 		uint64_t reserved_53_63 : 11;
163 	} s;
164 };
165 
166 union cpt_lf_q_size {
167 	uint64_t u;
168 	struct cpt_lf_q_size_s {
169 		uint64_t size_div40 : 15;
170 		uint64_t reserved_15_63 : 49;
171 	} s;
172 };
173 
174 union cpt_lf_misc_int {
175 	uint64_t u;
176 	struct cpt_lf_misc_int_s {
177 		uint64_t reserved_0_0 : 1;
178 		uint64_t nqerr : 1;
179 		uint64_t irde : 1;
180 		uint64_t nwrp : 1;
181 		uint64_t reserved_4_4 : 1;
182 		uint64_t hwerr : 1;
183 		uint64_t fault : 1;
184 		uint64_t reserved_7_63 : 57;
185 	} s;
186 };
187 
188 union cpt_lf_q_grp_ptr {
189 	uint64_t u;
190 	struct {
191 		uint64_t dq_ptr : 15;
192 		uint64_t reserved_31_15 : 17;
193 		uint64_t nq_ptr : 15;
194 		uint64_t reserved_47_62 : 16;
195 		uint64_t xq_xor : 1;
196 	} s;
197 };
198 
199 union cpt_inst_w4 {
200 	uint64_t u64;
201 	struct {
202 		uint64_t dlen : 16;
203 		uint64_t param2 : 16;
204 		uint64_t param1 : 16;
205 		uint64_t opcode_major : 8;
206 		uint64_t opcode_minor : 8;
207 	} s;
208 };
209 
210 union cpt_inst_w5 {
211 	uint64_t u64;
212 	struct {
213 		uint64_t dptr : 60;
214 		uint64_t gather_sz : 4;
215 	} s;
216 };
217 
218 union cpt_inst_w6 {
219 	uint64_t u64;
220 	struct {
221 		uint64_t rptr : 60;
222 		uint64_t scatter_sz : 4;
223 	} s;
224 };
225 
226 union cpt_inst_w7 {
227 	uint64_t u64;
228 	struct {
229 		uint64_t cptr : 60;
230 		uint64_t ctx_val : 1;
231 		uint64_t egrp : 3;
232 	} s;
233 };
234 
235 struct cpt_inst_s {
236 	union cpt_inst_w0 {
237 		struct {
238 			uint64_t nixtxl : 3;
239 			uint64_t doneint : 1;
240 			uint64_t nixtx_addr : 60;
241 		} s;
242 		struct {
243 			uint64_t nixtxl : 3;
244 			uint64_t doneint : 1;
245 			uint64_t chan : 12;
246 			uint64_t l2_len : 8;
247 			uint64_t et_offset : 8;
248 			uint64_t match_id : 16;
249 			uint64_t sso_pf_func : 16;
250 		} hw_s;
251 		uint64_t u64;
252 	} w0;
253 
254 	uint64_t res_addr;
255 
256 	union cpt_inst_w2 {
257 		struct {
258 			uint64_t tag : 32;
259 			uint64_t tt : 2;
260 			uint64_t grp : 10;
261 			uint64_t reserved_172_175 : 4;
262 			uint64_t rvu_pf_func : 16;
263 		} s;
264 		uint64_t u64;
265 	} w2;
266 
267 	union cpt_inst_w3 {
268 		struct {
269 			uint64_t qord : 1;
270 			uint64_t reserved_194_193 : 2;
271 			uint64_t wqe_ptr : 61;
272 		} s;
273 		uint64_t u64;
274 	} w3;
275 
276 	union cpt_inst_w4 w4;
277 
278 	union {
279 		union cpt_inst_w5 w5;
280 		uint64_t dptr;
281 	};
282 
283 	union {
284 		union cpt_inst_w6 w6;
285 		uint64_t rptr;
286 	};
287 
288 	union cpt_inst_w7 w7;
289 };
290 
291 union cpt_res_s {
292 	struct cpt_cn10k_res_s {
293 		uint64_t compcode : 7;
294 		uint64_t doneint : 1;
295 		uint64_t uc_compcode : 8;
296 		uint64_t rlen : 16;
297 		uint64_t spi : 32;
298 
299 		uint64_t esn;
300 	} cn10k;
301 
302 	struct cpt_cn9k_res_s {
303 		uint64_t compcode : 8;
304 		uint64_t uc_compcode : 8;
305 		uint64_t doneint : 1;
306 		uint64_t reserved_17_63 : 47;
307 
308 		uint64_t reserved_64_127;
309 	} cn9k;
310 
311 	uint64_t u64[2];
312 };
313 
314 /* [CN10K, .) */
315 struct cpt_parse_hdr_s {
316 	/* WORD 0 */
317 	union {
318 		uint64_t u64;
319 		struct {
320 			uint8_t pad_len : 3;
321 			uint8_t num_frags : 3;
322 			uint8_t pkt_out : 2;
323 
324 			uint8_t err_sum : 1;
325 			uint8_t reas_sts : 4;
326 			uint8_t reserved_53 : 1;
327 			uint8_t et_owr : 1;
328 			uint8_t pkt_fmt : 1;
329 
330 			uint16_t match_id : 16;
331 
332 			uint32_t cookie : 32;
333 		};
334 	} w0;
335 
336 	/* WORD 1 */
337 	uint64_t wqe_ptr;
338 
339 	/* WORD 2 */
340 	union {
341 		uint64_t u64;
342 		struct {
343 			uint8_t fi_pad : 3;
344 			uint8_t fi_offset : 5;
345 			uint8_t il3_off;
346 			uint16_t orig_pf_func;
347 			uint16_t reserved_145_160;
348 			uint16_t frag_age;
349 		};
350 	} w2;
351 
352 	/* WORD 3 */
353 	union {
354 		uint64_t u64;
355 		struct {
356 			uint32_t spi;
357 			uint16_t reserved_209_224;
358 			uint8_t uc_ccode;
359 			uint8_t hw_ccode;
360 		};
361 	} w3;
362 
363 	/* WORD 4 */
364 	union {
365 		uint64_t u64;
366 		uint64_t esn;
367 		uint64_t frag1_wqe_ptr;
368 	};
369 };
370 
371 union cpt_frag_info {
372 	uint16_t info;
373 	struct {
374 		uint16_t f_off : 13;
375 		uint16_t f_mf : 1;
376 		uint16_t f_rsv : 2;
377 	};
378 };
379 
380 struct cpt_frag_info_s {
381 	/* WORD 0 */
382 	union {
383 		uint64_t u64;
384 		struct {
385 			/* CPT HW swaps each 8B word implicitly */
386 			union cpt_frag_info f0;
387 			union cpt_frag_info f1;
388 			union cpt_frag_info f2;
389 			union cpt_frag_info f3;
390 		};
391 	} w0;
392 
393 	/* WORD 1 */
394 	union {
395 		uint64_t u64;
396 		struct {
397 			/* CPT HW swaps each 8B word implicitly */
398 			uint16_t frag_size0;
399 			uint16_t frag_size1;
400 			uint16_t frag_size2;
401 			uint16_t frag_size3;
402 		};
403 	} w1;
404 };
405 
406 union cpt_fc_write_s {
407 	struct {
408 		uint32_t qsize;
409 		uint32_t reserved_32_63;
410 		uint64_t reserved_64_127;
411 	} s;
412 	uint64_t u64[2];
413 };
414 
415 #endif /* __CPT_HW_H__ */
416