xref: /dpdk/config/riscv/meson.build (revision b0d0c84b3c0ffcdd0c3ef307c4966f06bd296db7)
1# SPDX-License-Identifier: BSD-3-Clause
2# Copyright(c) 2017 Intel Corporation.
3# Copyright(c) 2017 Cavium, Inc
4# Copyright(c) 2021 PANTHEON.tech s.r.o.
5# Copyright(c) 2022 StarFive
6# Copyright(c) 2022 SiFive
7# Copyright(c) 2022 Semihalf
8
9if not is_linux
10    error('Only Linux is supported at this point in time.')
11endif
12
13if not dpdk_conf.get('RTE_ARCH_64')
14    error('Only 64-bit compiles are supported for this platform type')
15endif
16
17dpdk_conf.set('RTE_ARCH', 'riscv')
18dpdk_conf.set('RTE_ARCH_RISCV', 1)
19dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
20
21# common flags to all riscv builds, with lowest priority
22flags_common = [
23    ['RTE_ARCH_RISCV', true],
24    ['RTE_CACHE_LINE_SIZE', 64],
25    # Manually set wall time clock frequency for the target. If 0, then it is
26    # read from /proc/device-tree/cpus/timebase-frequency. This property is
27    # guaranteed on Linux, as riscv time_init() requires it.
28    ['RTE_RISCV_TIME_FREQ', 0],
29]
30
31## SoC-specific options.
32# The priority is like this: arch > vendor > common.
33#
34# Note that currently there's no way of getting vendor/microarchitecture id
35# values in userspace which is why the logic of choosing the right flag
36# combination is strictly based on the values passed from a cross-file.
37vendor_generic = {
38    'description': 'Generic RISC-V',
39    'flags': [
40        ['RTE_MACHINE', '"riscv"'],
41        ['RTE_USE_C11_MEM_MODEL', true],
42        ['RTE_MAX_LCORE', 128],
43        ['RTE_MAX_NUMA_NODES', 2]
44    ],
45    'arch_config': {
46        'generic': {'machine_args': ['-march=rv64gc']}
47    }
48}
49
50arch_config_riscv = {
51    '0x8000000000000007': {
52        'machine_args':  ['-march=rv64gc', '-mtune=sifive-7-series'],
53        'flags': []
54    },
55}
56
57vendor_sifive = {
58    'description': 'SiFive',
59    'flags': [
60        ['RTE_MACHINE', '"riscv"'],
61        ['RTE_USE_C11_MEM_MODEL', true],
62        ['RTE_MAX_LCORE', 4],
63        ['RTE_MAX_NUMA_NODES', 1],
64    ],
65    'arch_config': arch_config_riscv
66}
67
68vendors = {
69    'generic': vendor_generic,
70    '0x489': vendor_sifive
71}
72
73# Native/cross vendor/arch detection
74if not meson.is_cross_build()
75    if machine == 'default'
76        # default build
77        vendor_id = 'generic'
78        arch_id = 'generic'
79        message('generic RISC-V')
80    else
81        vendor_id = 'generic'
82        arch_id = 'generic'
83        warning('RISC-V arch discovery not available, using generic!')
84    endif
85else
86    # cross build
87    vendor_id = meson.get_external_property('vendor_id')
88    arch_id = meson.get_external_property('arch_id')
89endif
90
91if not vendors.has_key(vendor_id)
92    error('Unsupported RISC-V vendor: @0@. '.format(vendor_id) +
93          'Please add support for it or use the generic ' +
94          '(-Dmachine=generic) build.')
95endif
96vendor_config = vendors[vendor_id]
97
98message('RISC-V vendor: ' + vendor_config['description'])
99message('RISC-V architecture id: ' + arch_id)
100
101arch_config = vendor_config['arch_config']
102if not arch_config.has_key(arch_id)
103    # unknown micro-architecture id
104    error('Unsupported architecture @0@ of vendor @1@. '
105          .format(arch_id, vendor_id) +
106          'Please add support for it or use the generic ' +
107          '(-Dmachine=generic) build.')
108endif
109arch_config = arch_config[arch_id]
110
111# Concatenate flags respecting priorities.
112dpdk_flags = flags_common + vendor_config['flags'] + arch_config.get('flags', [])
113
114# apply supported machine args
115machine_args = [] # Clear previous machine args
116foreach flag: arch_config['machine_args']
117    if cc.has_argument(flag)
118        machine_args += flag
119    endif
120endforeach
121
122# apply flags
123foreach flag: dpdk_flags
124    if flag.length() > 0
125        dpdk_conf.set(flag[0], flag[1])
126    endif
127endforeach
128message('Using machine args: @0@'.format(machine_args))
129