1 /* IA-32 common hooks.
2 Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "diagnostic-core.h"
26 #include "tm.h"
27 #include "tm_p.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
30 #include "opts.h"
31 #include "flags.h"
32
33 /* Define a set of ISAs which are available when a given ISA is
34 enabled. MMX and SSE ISAs are handled separately. */
35
36 #define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX
37 #define OPTION_MASK_ISA_3DNOW_SET \
38 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET)
39
40 #define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE
41 #define OPTION_MASK_ISA_SSE2_SET \
42 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE_SET)
43 #define OPTION_MASK_ISA_SSE3_SET \
44 (OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE2_SET)
45 #define OPTION_MASK_ISA_SSSE3_SET \
46 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE3_SET)
47 #define OPTION_MASK_ISA_SSE4_1_SET \
48 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSSE3_SET)
49 #define OPTION_MASK_ISA_SSE4_2_SET \
50 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_1_SET)
51 #define OPTION_MASK_ISA_AVX_SET \
52 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET)
53 #define OPTION_MASK_ISA_FMA_SET \
54 (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
55 #define OPTION_MASK_ISA_AVX2_SET \
56 (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
57
58 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
59 as -msse4.2. */
60 #define OPTION_MASK_ISA_SSE4_SET OPTION_MASK_ISA_SSE4_2_SET
61
62 #define OPTION_MASK_ISA_SSE4A_SET \
63 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_SSE3_SET)
64 #define OPTION_MASK_ISA_FMA4_SET \
65 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_SSE4A_SET \
66 | OPTION_MASK_ISA_AVX_SET)
67 #define OPTION_MASK_ISA_XOP_SET \
68 (OPTION_MASK_ISA_XOP | OPTION_MASK_ISA_FMA4_SET)
69 #define OPTION_MASK_ISA_LWP_SET \
70 OPTION_MASK_ISA_LWP
71
72 /* AES and PCLMUL need SSE2 because they use xmm registers */
73 #define OPTION_MASK_ISA_AES_SET \
74 (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET)
75 #define OPTION_MASK_ISA_PCLMUL_SET \
76 (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
77
78 #define OPTION_MASK_ISA_ABM_SET \
79 (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
80
81 #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
82 #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
83 #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
84 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
85 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
86 #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
87 #define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
88 #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
89
90 #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
91 #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
92 #define OPTION_MASK_ISA_F16C_SET \
93 (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
94
95 /* Define a set of ISAs which aren't available when a given ISA is
96 disabled. MMX and SSE ISAs are handled separately. */
97
98 #define OPTION_MASK_ISA_MMX_UNSET \
99 (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_3DNOW_UNSET)
100 #define OPTION_MASK_ISA_3DNOW_UNSET \
101 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_A_UNSET)
102 #define OPTION_MASK_ISA_3DNOW_A_UNSET OPTION_MASK_ISA_3DNOW_A
103
104 #define OPTION_MASK_ISA_SSE_UNSET \
105 (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2_UNSET)
106 #define OPTION_MASK_ISA_SSE2_UNSET \
107 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE3_UNSET)
108 #define OPTION_MASK_ISA_SSE3_UNSET \
109 (OPTION_MASK_ISA_SSE3 \
110 | OPTION_MASK_ISA_SSSE3_UNSET \
111 | OPTION_MASK_ISA_SSE4A_UNSET )
112 #define OPTION_MASK_ISA_SSSE3_UNSET \
113 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE4_1_UNSET)
114 #define OPTION_MASK_ISA_SSE4_1_UNSET \
115 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2_UNSET)
116 #define OPTION_MASK_ISA_SSE4_2_UNSET \
117 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
118 #define OPTION_MASK_ISA_AVX_UNSET \
119 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
120 | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
121 | OPTION_MASK_ISA_AVX2_UNSET)
122 #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
123 #define OPTION_MASK_ISA_AVX2_UNSET OPTION_MASK_ISA_AVX2
124
125 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
126 as -mno-sse4.1. */
127 #define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
128
129 #define OPTION_MASK_ISA_SSE4A_UNSET \
130 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_FMA4_UNSET)
131
132 #define OPTION_MASK_ISA_FMA4_UNSET \
133 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_XOP_UNSET)
134 #define OPTION_MASK_ISA_XOP_UNSET OPTION_MASK_ISA_XOP
135 #define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP
136
137 #define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES
138 #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
139 #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
140 #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
141 #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
142 #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
143 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
144 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
145 #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
146 #define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
147 #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
148
149 #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
150 #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
151 #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
152
153 /* Implement TARGET_HANDLE_OPTION. */
154
155 bool
ix86_handle_option(struct gcc_options * opts,struct gcc_options * opts_set ATTRIBUTE_UNUSED,const struct cl_decoded_option * decoded,location_t loc)156 ix86_handle_option (struct gcc_options *opts,
157 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
158 const struct cl_decoded_option *decoded,
159 location_t loc)
160 {
161 size_t code = decoded->opt_index;
162 int value = decoded->value;
163
164 switch (code)
165 {
166 case OPT_mmmx:
167 if (value)
168 {
169 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX_SET;
170 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_SET;
171 }
172 else
173 {
174 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX_UNSET;
175 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_UNSET;
176 }
177 return true;
178
179 case OPT_m3dnow:
180 if (value)
181 {
182 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_SET;
183 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_SET;
184 }
185 else
186 {
187 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_3DNOW_UNSET;
188 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_UNSET;
189 }
190 return true;
191
192 case OPT_m3dnowa:
193 return false;
194
195 case OPT_msse:
196 if (value)
197 {
198 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE_SET;
199 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_SET;
200 }
201 else
202 {
203 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE_UNSET;
204 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_UNSET;
205 }
206 return true;
207
208 case OPT_msse2:
209 if (value)
210 {
211 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2_SET;
212 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_SET;
213 }
214 else
215 {
216 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE2_UNSET;
217 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_UNSET;
218 }
219 return true;
220
221 case OPT_msse3:
222 if (value)
223 {
224 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3_SET;
225 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_SET;
226 }
227 else
228 {
229 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE3_UNSET;
230 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_UNSET;
231 }
232 return true;
233
234 case OPT_mssse3:
235 if (value)
236 {
237 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3_SET;
238 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_SET;
239 }
240 else
241 {
242 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSSE3_UNSET;
243 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_UNSET;
244 }
245 return true;
246
247 case OPT_msse4_1:
248 if (value)
249 {
250 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1_SET;
251 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_SET;
252 }
253 else
254 {
255 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_1_UNSET;
256 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_UNSET;
257 }
258 return true;
259
260 case OPT_msse4_2:
261 if (value)
262 {
263 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2_SET;
264 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_SET;
265 }
266 else
267 {
268 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_2_UNSET;
269 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_UNSET;
270 }
271 return true;
272
273 case OPT_mavx:
274 if (value)
275 {
276 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX_SET;
277 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_SET;
278 }
279 else
280 {
281 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX_UNSET;
282 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_UNSET;
283 }
284 return true;
285
286 case OPT_mavx2:
287 if (value)
288 {
289 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
290 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
291 }
292 else
293 {
294 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX2_UNSET;
295 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_UNSET;
296 }
297 return true;
298
299 case OPT_mfma:
300 if (value)
301 {
302 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA_SET;
303 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_SET;
304 }
305 else
306 {
307 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA_UNSET;
308 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_UNSET;
309 }
310 return true;
311
312 case OPT_msse4:
313 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_SET;
314 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_SET;
315 return true;
316
317 case OPT_mno_sse4:
318 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_UNSET;
319 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_UNSET;
320 return true;
321
322 case OPT_msse4a:
323 if (value)
324 {
325 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A_SET;
326 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_SET;
327 }
328 else
329 {
330 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4A_UNSET;
331 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_UNSET;
332 }
333 return true;
334
335 case OPT_mfma4:
336 if (value)
337 {
338 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4_SET;
339 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_SET;
340 }
341 else
342 {
343 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA4_UNSET;
344 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_UNSET;
345 }
346 return true;
347
348 case OPT_mxop:
349 if (value)
350 {
351 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP_SET;
352 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_SET;
353 }
354 else
355 {
356 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XOP_UNSET;
357 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_UNSET;
358 }
359 return true;
360
361 case OPT_mlwp:
362 if (value)
363 {
364 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP_SET;
365 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_SET;
366 }
367 else
368 {
369 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LWP_UNSET;
370 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_UNSET;
371 }
372 return true;
373
374 case OPT_mabm:
375 if (value)
376 {
377 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM_SET;
378 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_SET;
379 }
380 else
381 {
382 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ABM_UNSET;
383 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_UNSET;
384 }
385 return true;
386
387 case OPT_mbmi:
388 if (value)
389 {
390 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI_SET;
391 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_SET;
392 }
393 else
394 {
395 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI_UNSET;
396 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_UNSET;
397 }
398 return true;
399
400 case OPT_mbmi2:
401 if (value)
402 {
403 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2_SET;
404 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_SET;
405 }
406 else
407 {
408 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI2_UNSET;
409 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_UNSET;
410 }
411 return true;
412
413 case OPT_mtbm:
414 if (value)
415 {
416 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM_SET;
417 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_SET;
418 }
419 else
420 {
421 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_TBM_UNSET;
422 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_UNSET;
423 }
424 return true;
425
426 case OPT_mpopcnt:
427 if (value)
428 {
429 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT_SET;
430 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_SET;
431 }
432 else
433 {
434 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_POPCNT_UNSET;
435 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_UNSET;
436 }
437 return true;
438
439 case OPT_msahf:
440 if (value)
441 {
442 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF_SET;
443 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_SET;
444 }
445 else
446 {
447 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SAHF_UNSET;
448 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_UNSET;
449 }
450 return true;
451
452 case OPT_mcx16:
453 if (value)
454 {
455 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CX16_SET;
456 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_SET;
457 }
458 else
459 {
460 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CX16_UNSET;
461 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_UNSET;
462 }
463 return true;
464
465 case OPT_mmovbe:
466 if (value)
467 {
468 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
469 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
470 }
471 else
472 {
473 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
474 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
475 }
476 return true;
477
478 case OPT_mcrc32:
479 if (value)
480 {
481 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CRC32_SET;
482 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_SET;
483 }
484 else
485 {
486 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CRC32_UNSET;
487 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_UNSET;
488 }
489 return true;
490
491 case OPT_maes:
492 if (value)
493 {
494 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AES_SET;
495 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_SET;
496 }
497 else
498 {
499 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AES_UNSET;
500 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_UNSET;
501 }
502 return true;
503
504 case OPT_mpclmul:
505 if (value)
506 {
507 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL_SET;
508 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_SET;
509 }
510 else
511 {
512 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCLMUL_UNSET;
513 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_UNSET;
514 }
515 return true;
516
517 case OPT_mfsgsbase:
518 if (value)
519 {
520 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE_SET;
521 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_SET;
522 }
523 else
524 {
525 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FSGSBASE_UNSET;
526 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_UNSET;
527 }
528 return true;
529
530 case OPT_mrdrnd:
531 if (value)
532 {
533 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND_SET;
534 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_SET;
535 }
536 else
537 {
538 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDRND_UNSET;
539 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_UNSET;
540 }
541 return true;
542
543 case OPT_mf16c:
544 if (value)
545 {
546 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C_SET;
547 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_SET;
548 }
549 else
550 {
551 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_F16C_UNSET;
552 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_UNSET;
553 }
554 return true;
555
556 /* Comes from final.c -- no real reason to change it. */
557 #define MAX_CODE_ALIGN 16
558
559 case OPT_malign_loops_:
560 warning_at (loc, 0, "-malign-loops is obsolete, use -falign-loops");
561 if (value > MAX_CODE_ALIGN)
562 error_at (loc, "-malign-loops=%d is not between 0 and %d",
563 value, MAX_CODE_ALIGN);
564 else
565 opts->x_align_loops = 1 << value;
566 return true;
567
568 case OPT_malign_jumps_:
569 warning_at (loc, 0, "-malign-jumps is obsolete, use -falign-jumps");
570 if (value > MAX_CODE_ALIGN)
571 error_at (loc, "-malign-jumps=%d is not between 0 and %d",
572 value, MAX_CODE_ALIGN);
573 else
574 opts->x_align_jumps = 1 << value;
575 return true;
576
577 case OPT_malign_functions_:
578 warning_at (loc, 0,
579 "-malign-functions is obsolete, use -falign-functions");
580 if (value > MAX_CODE_ALIGN)
581 error_at (loc, "-malign-functions=%d is not between 0 and %d",
582 value, MAX_CODE_ALIGN);
583 else
584 opts->x_align_functions = 1 << value;
585 return true;
586
587 case OPT_mbranch_cost_:
588 if (value > 5)
589 {
590 error_at (loc, "-mbranch-cost=%d is not between 0 and 5", value);
591 opts->x_ix86_branch_cost = 5;
592 }
593 return true;
594
595 default:
596 return true;
597 }
598 }
599
600 static const struct default_options ix86_option_optimization_table[] =
601 {
602 /* Enable redundant extension instructions removal at -O2 and higher. */
603 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
604 /* Turn off -fschedule-insns by default. It tends to make the
605 problem with not enough registers even worse. */
606 { OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 },
607
608 #ifdef SUBTARGET_OPTIMIZATION_OPTIONS
609 SUBTARGET_OPTIMIZATION_OPTIONS,
610 #endif
611 { OPT_LEVELS_NONE, 0, NULL, 0 }
612 };
613
614 /* Implement TARGET_OPTION_INIT_STRUCT. */
615
616 static void
ix86_option_init_struct(struct gcc_options * opts)617 ix86_option_init_struct (struct gcc_options *opts)
618 {
619 if (TARGET_MACHO)
620 /* The Darwin libraries never set errno, so we might as well
621 avoid calling them when that's the only reason we would. */
622 opts->x_flag_errno_math = 0;
623
624 opts->x_flag_pcc_struct_return = 2;
625 opts->x_flag_asynchronous_unwind_tables = 2;
626 opts->x_flag_vect_cost_model = 1;
627 }
628
629 /* On the x86 -fsplit-stack and -fstack-protector both use the same
630 field in the TCB, so they can not be used together. */
631
632 static bool
ix86_supports_split_stack(bool report ATTRIBUTE_UNUSED,struct gcc_options * opts ATTRIBUTE_UNUSED)633 ix86_supports_split_stack (bool report ATTRIBUTE_UNUSED,
634 struct gcc_options *opts ATTRIBUTE_UNUSED)
635 {
636 bool ret = true;
637
638 #ifndef TARGET_THREAD_SPLIT_STACK_OFFSET
639 if (report)
640 error ("%<-fsplit-stack%> currently only supported on GNU/Linux");
641 ret = false;
642 #else
643 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
644 {
645 if (report)
646 error ("%<-fsplit-stack%> requires "
647 "assembler support for CFI directives");
648 ret = false;
649 }
650 #endif
651
652 return ret;
653 }
654
655 #undef TARGET_DEFAULT_TARGET_FLAGS
656 #define TARGET_DEFAULT_TARGET_FLAGS \
657 (TARGET_DEFAULT \
658 | TARGET_SUBTARGET_DEFAULT \
659 | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
660
661 #undef TARGET_HANDLE_OPTION
662 #define TARGET_HANDLE_OPTION ix86_handle_option
663
664 #undef TARGET_OPTION_OPTIMIZATION_TABLE
665 #define TARGET_OPTION_OPTIMIZATION_TABLE ix86_option_optimization_table
666 #undef TARGET_OPTION_INIT_STRUCT
667 #define TARGET_OPTION_INIT_STRUCT ix86_option_init_struct
668
669 #undef TARGET_SUPPORTS_SPLIT_STACK
670 #define TARGET_SUPPORTS_SPLIT_STACK ix86_supports_split_stack
671
672 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
673