| /openbsd-src/sys/dev/pci/drm/radeon/ |
| H A D | rv730_dpm.c | 244 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
245 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
247 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
251 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
252 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
295 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
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| H A D | rv740_dpm.c | 337 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
338 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
341 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
345 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
346 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
379 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
380 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
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| H A D | cypress_dpm.c | 778 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
785 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
792 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
797 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
798 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
799 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
802 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
803 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
804 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
806 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
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| H A D | sumo_dpm.c | 347 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
411 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
670 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
762 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
844 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
845 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
862 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
863 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1053 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1054 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()
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| H A D | rv770_dpm.c | 291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
297 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
701 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
706 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
707 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
708 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
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| H A D | trinity_dpm.c | 805 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
925 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
926 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
939 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
940 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1287 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1310 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1365 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1366 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1372 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
[all …]
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| H A D | kv_dpm.c | 1537 if ((table->entries[i].clk >= new_ps->levels[0].sclk) || in kv_set_valid_clock_range()
1545 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1551 if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > in kv_set_valid_clock_range()
1552 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
1562 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
1571 new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1577 if ((new_ps->levels[0].sclk - in kv_set_valid_clock_range()
1580 new_ps->levels[new_ps->num_levels -1].sclk)) in kv_set_valid_clock_range()
1986 if (ps->levels[i].sclk < sclk) in kv_apply_state_adjust_rules()
1987 ps->levels[i].sclk = sclk; in kv_apply_state_adjust_rules()
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| H A D | ni_dpm.c | 1985 table->driverState.levels[0] = table->initialState.level; in ni_init_smc_table()
2307 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in ni_populate_smc_sp()
2309 smc_state->levels[ps->performance_level_count - 1].bSP = in ni_populate_smc_sp()
2411 smc_state->levels[0].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2415 smc_state->levels[0].aT = cpu_to_be32(0); in ni_populate_smc_t()
2440 a_t = be32_to_cpu(smc_state->levels[i].aT) & ~CG_R_MASK; in ni_populate_smc_t()
2442 smc_state->levels[i].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2448 smc_state->levels[i + 1].aT = cpu_to_be32(a_t); in ni_populate_smc_t()
2499 smc_state->levels[0].dpm2.MaxPS = 0; in ni_populate_power_containment_values()
2500 smc_state->levels[0].dpm2.NearTDPDec = 0; in ni_populate_power_containment_values()
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| /openbsd-src/gnu/llvm/llvm/utils/ |
| H A D | clang-parse-diagnostics-file | 30 levels = {'error': False, 'fatal error': False, 'ignored': False,
33 levels['error'] = True
35 levels['fatal error'] = True
37 levels['ignored'] = True
39 levels['note'] = True
41 levels['warning'] = True
81 if levels[d.get('level')] or opts.all]
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| /openbsd-src/lib/libc/db/btree/ |
| H A D | bt_debug.c | 245 int levels; in __bt_stat() local
270 for (i = P_ROOT, levels = 0 ;; ++levels) { in __bt_stat()
273 if (levels == 0) in __bt_stat()
274 levels = 1; in __bt_stat()
283 levels, levels == 1 ? "" : "s", nkeys); in __bt_stat()
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| /openbsd-src/gnu/usr.bin/perl/cpan/Sys-Syslog/t/ |
| H A D | facilities-routing.t | 29 my @levels = qw< emerg alert crit err warning notice info debug >;
59 plan tests => @facilities * @levels * 2;
76 for my $level (@levels) {
88 for my $level (@levels) {
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| /openbsd-src/gnu/llvm/lldb/packages/Python/lldbsuite/test/tools/lldb-vscode/ |
| H A D | lldbvscode_testcase.py | 148 levels=None, dump=False): argument
151 levels=levels,
162 def get_stackFrames(self, threadId=None, startFrame=None, levels=None, argument
167 levels=levels,
174 levels=1)
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| /openbsd-src/lib/libcrypto/x509/ |
| H A D | x509_policy.c | 764 * |levels| has some non-empty intersection with |user_policies|, and zero
766 * function modifies |levels| and should only be called at the end of policy
770 has_explicit_policy(STACK_OF(X509_POLICY_LEVEL) *levels, in has_explicit_policy() argument
782 num_levels = sk_X509_POLICY_LEVEL_num(levels); in has_explicit_policy()
783 level = sk_X509_POLICY_LEVEL_value(levels, num_levels - 1); in has_explicit_policy()
825 level = sk_X509_POLICY_LEVEL_value(levels, i); in has_explicit_policy()
848 prev = sk_X509_POLICY_LEVEL_value(levels, i - 1); in has_explicit_policy()
881 STACK_OF(X509_POLICY_LEVEL) *levels = NULL; in X509_policy_check()
899 levels = sk_X509_POLICY_LEVEL_new_null(); in X509_policy_check()
900 if (levels in X509_policy_check()
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| /openbsd-src/gnu/usr.bin/perl/cpan/Math-BigInt/t/ |
| H A D | upgrade2.t | 6 # Test 2 levels of upgrade classes. This used to cause a segv.
18 pass('sqrt on a big int does not segv if there are 2 upgrade levels');
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| /openbsd-src/gnu/usr.bin/perl/cpan/Sys-Syslog/ |
| H A D | Makefile.PL | 137 my @levels = qw(
178 NAMES => [ @levels, @facilities, @options, @others_macros ],
182 my @names = map { ref $_ ? $_->{name} : $_ } @levels, @facilities, @options;
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| /openbsd-src/gnu/gcc/fixincludes/ |
| H A D | fixinc.in | 195 levels=2
199 while [ -n "$dirs" ] && [ $levels -gt 0 ]
201 levels=`expr $levels - 1`
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| /openbsd-src/gnu/usr.bin/gcc/gcc/fixinc/ |
| H A D | fixincl.sh | 174 levels=2
178 while [ -n "$dirs" ] && [ $levels -gt 0 ]
180 levels=`expr $levels - 1`
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| /openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/smumgr/ |
| H A D | fiji_smumgr.c | 1014 struct SMU73_Discrete_GraphicsLevel *levels = in fiji_populate_all_graphic_levels() local
1025 &levels[i]); in fiji_populate_all_graphic_levels()
1031 levels[i].DeepSleepDivId = 0; in fiji_populate_all_graphic_levels()
1035 levels[0].EnabledForActivity = 1; in fiji_populate_all_graphic_levels()
1038 levels[dpm_table->sclk_table.count - 1].DisplayWatermark = in fiji_populate_all_graphic_levels()
1052 levels[i].pcieDpmLevel = in fiji_populate_all_graphic_levels()
1077 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1080 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1083 levels[1].pcieDpmLevel = mid_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1086 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in fiji_populate_all_graphic_levels()
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| H A D | polaris10_smumgr.c | 1050 struct SMU74_Discrete_GraphicsLevel *levels = in polaris10_populate_all_graphic_levels() local
1059 uint32_t dpm0_sclkfrequency = levels[0].SclkSetting.SclkFrequency; in polaris10_populate_all_graphic_levels()
1077 levels[i].DeepSleepDivId = 0; in polaris10_populate_all_graphic_levels()
1082 if (dpm0_sclkfrequency != levels[0].SclkSetting.SclkFrequency) { in polaris10_populate_all_graphic_levels()
1112 levels[i].pcieDpmLevel = in polaris10_populate_all_graphic_levels()
1137 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in polaris10_populate_all_graphic_levels()
1140 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in polaris10_populate_all_graphic_levels()
1143 levels[1].pcieDpmLevel = mid_pcie_level_enabled; in polaris10_populate_all_graphic_levels()
1146 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in polaris10_populate_all_graphic_levels()
1219 struct SMU74_Discrete_MemoryLevel *levels = in polaris10_populate_all_memory_levels() local
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| H A D | vegam_smumgr.c | 878 struct SMU75_Discrete_GraphicsLevel *levels = in vegam_populate_all_graphic_levels() local
896 levels[i].UpHyst = (uint8_t) in vegam_populate_all_graphic_levels()
898 levels[i].DownHyst = (uint8_t) in vegam_populate_all_graphic_levels()
902 levels[i].DeepSleepDivId = 0; in vegam_populate_all_graphic_levels()
914 levels[i].EnabledForActivity = in vegam_populate_all_graphic_levels()
923 levels[i].pcieDpmLevel = in vegam_populate_all_graphic_levels()
948 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in vegam_populate_all_graphic_levels()
951 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in vegam_populate_all_graphic_levels()
954 levels[1].pcieDpmLevel = mid_pcie_level_enabled; in vegam_populate_all_graphic_levels()
957 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in vegam_populate_all_graphic_levels()
[all …]
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| /openbsd-src/lib/libpcap/ |
| H A D | optimize.c | 141 struct block **levels; variable
219 b->link = levels[level]; in find_levels_r()
220 levels[level] = b; in find_levels_r()
232 memset((char *)levels, 0, n_blocks * sizeof(*levels)); in find_levels()
261 for (b = levels[i]; b; b = b->link) { in find_dom()
300 for (b = levels[i]; b != 0; b = b->link) { in find_edom()
328 for (b = levels[i]; b; b = b->link) { in find_closure()
469 for (p = levels[i]; p; p = p->link) { in find_ud()
475 for (p = levels[i]; p; p = p->link) { in find_ud()
1448 for (p = levels[i]; p; p = p->link) in opt_blks()
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| /openbsd-src/sys/dev/fdt/ |
| H A D | rkpinctrl.c | 207 int levels[4] = { 2, 4, 8, 12 }; in rk3288_strength() local
224 if (strength >= levels[level]) in rk3288_strength()
354 int levels[4] = { 2, 4, 8, 12 }; in rk3308_strength() local
367 if (strength >= levels[level]) in rk3308_strength()
500 int levels[4] = { 2, 4, 8, 12 }; in rk3328_strength() local
513 if (strength >= levels[level]) in rk3328_strength()
690 const int *levels; in rk3399_strength() local
703 levels = rk3399_strength_levels[type]; in rk3399_strength()
705 if (strength >= levels[level] && levels[level] > 0) in rk3399_strength()
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| /openbsd-src/gnu/usr.bin/perl/ext/Devel-Peek/ |
| H A D | Peek.xs | 39 int levels, tots = 0, levela, tota = 0, levelas, totas = 0; in DeadCode()
70 levelm = levels = levelref = levelas = 0; in DeadCode()
100 levels++; in DeadCode()
106 i, levelref, levelm, levels, levela, levelas); in DeadCode()
110 tots += levels; in DeadCode()
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| /openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu8_hwmgr.c | 377 /* Here use 4 levels, make sure not exceed */ in smu8_get_system_info_data()
1366 return smu8_ps->levels[0].engineClock; in smu8_dpm_patch_boot_state()
1368 return smu8_ps->levels[smu8_ps->level-1].engineClock; in smu8_dpm_patch_boot_state()
1380 smu8_ps->levels[0] = data->boot_power_level; in smu8_dpm_get_pp_table_entry_callback()
1402 smu8_ps->levels[index].engineClock = table->entries[clock_info_index].clk; in smu8_dpm_get_pp_table_entry_callback()
1403 smu8_ps->levels[index].vddcIndex = (uint8_t)table->entries[clock_info_index].v;
1408 smu8_ps->levels[index].dsDividerIndex = 5; in smu8_dpm_get_num_of_pp_table_entries()
1409 smu8_ps->levels[index].ssDividerIndex = 5; in smu8_dpm_get_num_of_pp_table_entries()
1623 level->coreClock = ps->levels[level_index].engineClock; in smu8_get_performance_level()
1627 if (ps->levels[ in smu8_get_performance_level()
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| /openbsd-src/sys/dev/pci/drm/amd/pm/legacy-dpm/ |
| H A D | amdgpu_kv_dpm.c | 1774 if ((table->entries[i].clk >= new_ps->levels[0].sclk) || in kv_set_valid_clock_range()
1782 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1788 if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].clk) > in kv_set_valid_clock_range()
1789 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
1799 if (table->entries[i].sclk_frequency >= new_ps->levels[0].sclk || in kv_set_valid_clock_range()
1808 new_ps->levels[new_ps->num_levels - 1].sclk) in kv_set_valid_clock_range()
1814 if ((new_ps->levels[0].sclk - in kv_set_valid_clock_range()
1817 new_ps->levels[new_ps->num_levels - 1].sclk)) in kv_set_valid_clock_range()
2247 if (ps->levels[i].sclk < sclk) in kv_apply_state_adjust_rules()
2248 ps->levels[i].sclk = sclk; in kv_apply_state_adjust_rules()
[all …]
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