| /openbsd-src/gnu/llvm/lld/ELF/Arch/ |
| H A D | PPCInsns.def | 20 PCREL_OPT(STW, PSTW, OPC_AND_RST);
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| H A D | PPC64.cpp | 58 STW = 36, enumerator
87 STW = 0x90000000, enumerator
847 return STW; in getPPCDFormOp()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 66 StOpc = BPF::STW; in expandMEMCPY()
94 BuildMI(*BB, MI, dl, get(BPF::STW)) in expandMEMCPY()
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| H A D | BPFMISimplifyPatchable.cpp | 122 Opcode == BPF::STW || Opcode == BPF::STD) in checkADDrr()
139 if (Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW || in checkADDrr()
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| H A D | BPFInstrInfo.td | 417 def STW : STOREi64<BPF_W, "u32", truncstorei32>;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 175 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
183 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
191 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
199 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
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| H A D | PPCPreEmitPeephole.cpp | 74 case PPC::STW: in hasPCRelativeForm()
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| H A D | PPCRegisterInfo.cpp | 108 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
991 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW)) in lowerCRSpilling()
1148 addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW)) in lowerCRBitSpilling()
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| H A D | PPCFrameLowering.cpp | 662 : PPC::STW ); in emitPrologue()
675 const MCInstrDesc &StoreWordInst = TII.get(isPPC64 ? PPC::STW8 : PPC::STW); in emitPrologue()
2448 MBB.insert(MI, addFrameReference(BuildMI(*MF, DL, TII.get(PPC::STW)) in spillCalleeSavedRegisters()
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| H A D | PPCFastISel.cpp | 637 Opc = PPC::STW; in PPCEmitStore()
705 case PPC::STW : Opc = PPC::STWX; break; in PPCEmitStore()
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| H A D | PPCMIPeephole.cpp | 500 case PPC::STW: in simplifyCode()
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| H A D | PPCInstrInfo.cpp | 2895 case PPC::STW: in isClusterableLdStOpcPair()
2897 return SecondOpc == PPC::STW || SecondOpc == PPC::STW8; in isClusterableLdStOpcPair()
4245 case PPC::STWX: III.ImmOpcode = PPC::STW; break; in instrHasImmForm()
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| H A D | P9InstrResources.td | 896 (instregex "STW(8)?$"),
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| H A D | P10InstrResources.td | 1832 STW, STW8,
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| H A D | PPCInstrInfo.td | 2003 def STW : DForm_1<36, (outs), (ins gprc:$rS, memri:$dst),
4913 def : Pat<(atomic_store_32 DForm:$ptr, i32:$val), (STW gprc:$val, memri:$ptr)>;
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| H A D | PPCISelDAGToDAG.cpp | 7442 case PPC::STW: in PeepholePPC64()
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| H A D | PPCISelLowering.cpp | 12014 TII->get(Subtarget.isPPC64() ? PPC::STD : PPC::STW)) in emitEHSjLjSetJmp()
12046 MIB = BuildMI(mainMBB, DL, TII->get(PPC::STW)) in emitEHSjLjSetJmp()
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| /openbsd-src/sys/arch/hppa/hppa/ |
| H A D | db_disasm.c | 517 #define STW 0x1a, 0x00, 0, 0 /* STORE WORD */ macro
995 { STW, 0, "stw", stDasm },
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 152 return IsStore ? PPC::STW : PPC::LWZ; in selectLoadStoreOp()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.td | 1554 // STW P, Rr+1:Rr
1593 // STW P+, Rr+1:Rr
1630 // STW -P, Rr+1:Rr
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| /openbsd-src/gnu/usr.bin/binutils-2.17/cpu/ |
| H A D | mt.cpu | 278 LDW STW - - - - - -
1002 (dni stw "STW SrcReg2, SrcReg1, Imm"
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| /openbsd-src/gnu/usr.bin/binutils/opcodes/ |
| H A D | ChangeLog-0001 | 2098 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
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| /openbsd-src/gnu/usr.bin/binutils-2.17/opcodes/ |
| H A D | ChangeLog-0001 | 2098 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
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| /openbsd-src/share/misc/ |
| H A D | airport | 1627 STW:Stavropol, Russia
|