| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 99 Register &SrcReg2, int64_t &CmpMask,
106 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
| H A D | LanaiInstrInfo.cpp | 178 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
187 CmpMask = ~0; in analyzeCompare()
193 CmpMask = ~0; in analyzeCompare()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 526 Register &SrcReg2, int64_t &CmpMask,
533 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
| H A D | X86InstrInfo.cpp | 3975 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
3989 CmpMask = ~0; in analyzeCompare()
3992 CmpMask = CmpValue = 0; in analyzeCompare()
4002 CmpMask = 0; in analyzeCompare()
4011 CmpMask = 0; in analyzeCompare()
4024 CmpMask = ~0; in analyzeCompare()
4027 CmpMask = CmpValue = 0; in analyzeCompare()
4036 CmpMask = 0; in analyzeCompare()
4048 CmpMask = ~0; in analyzeCompare()
4312 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
[all …]
|
| H A D | X86ISelLowering.cpp | 27370 SDValue CmpMask = getScalarMaskingNode(Cmp, Mask, SDValue(), in LowerINTRINSIC_WO_CHAIN() local
27376 CmpMask, DAG.getIntPtrConstant(0, dl)); in LowerINTRINSIC_WO_CHAIN()
46810 APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : BCNumElts); in combineSetCCMOVMSK() local
46813 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
46827 APInt CmpMask = APInt::getLowBitsSet(32, IsAnyOf ? 0 : NumElts / 2); in combineSetCCMOVMSK() local
46834 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
46910 unsigned CmpMask = IsAnyOf ? 0 : 0xFFFFFFFF; in combineSetCCMOVMSK() local
46918 DAG.getConstant(CmpMask, DL, MVT::i32)); in combineSetCCMOVMSK()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 244 Register &SrcReg2, int64_t &CmpMask,
249 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
| H A D | AArch64InstrInfo.cpp | 1116 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
1132 CmpMask = ~0; in analyzeCompare()
1150 CmpMask = ~0; in analyzeCompare()
1159 CmpMask = ~0; in analyzeCompare()
1168 CmpMask = ~0; in analyzeCompare()
1461 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 474 int64_t CmpImm = 0, CmpMask = 0; in findInductionRegister() local
476 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm); in findInductionRegister()
1455 int64_t CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1457 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 292 Register &SrcReg2, int64_t &CmpMask,
300 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
| H A D | ARMBaseInstrInfo.cpp | 2802 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
2811 CmpMask = ~0; in analyzeCompare()
2819 CmpMask = ~0; in analyzeCompare()
2826 CmpMask = MI.getOperand(1).getImm(); in analyzeCompare()
2839 int CmpMask, bool CommonUse) { in isSuitableForMask() argument
2843 if (CmpMask != MI->getOperand(2).getImm()) in isSuitableForMask()
3028 MachineInstr &CmpInstr, Register SrcReg, Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
3035 if (CmpMask != ~0) { in optimizeCompareInstr()
3036 if (!isSuitableForMask(MI, SrcReg, CmpMask, false) || isPredicated(*MI)) { in optimizeCompareInstr()
3044 if (!isSuitableForMask(PotentialAND, SrcReg, CmpMask, true) || in optimizeCompareInstr()
[all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 628 int64_t CmpMask, CmpValue; in optimizeCmpInstr() local
629 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
635 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 327 Register &SrcReg2, int64_t &CmpMask,
331 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
|
| H A D | SIInstrInfo.cpp | 8505 Register &SrcReg2, int64_t &CmpMask, in analyzeCompare() argument
8539 CmpMask = ~0; in analyzeCompare()
8556 CmpMask = ~0; in analyzeCompare()
8564 Register SrcReg2, int64_t CmpMask, in optimizeCompareInstr() argument
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2777 int64_t CmpMask, CmpValue; in optimizeCmpPostRA() local
2778 if (!analyzeCompare(CmpMI, SrcReg, SrcReg2, CmpMask, CmpValue)) in optimizeCmpPostRA()
2782 if (CmpValue || !CmpMask || SrcReg2) in optimizeCmpPostRA()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8740 const unsigned CmpMask = 0b110; in verifyCompareConds() local
8741 const unsigned MaskedOpcode = CmpMask & RefCond; in verifyCompareConds()
8743 if (MaskedOpcode == CmpMask) in verifyCompareConds()
|